Commit graph

26750 commits

Author SHA1 Message Date
Ian Campbell
cf3c03b173 exynos: Increase command line buffer size (CONFIG_SYS_CBSIZE)
I was running into this limit with a not overly long PXE append line.

Since the PXE code wants to print the resulting command line increase
CONFIG_SYS_PBSIZE too.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:11:03 +09:00
Ian Campbell
e6825e0362 exynos5: Use config_distro_bootcmd.h
This replaces the existing CONFIG_BOOTCOMMAND for exynos5250 and 5420.

exynos4 platforms seem to have existing complex extra env configuration for
booting and so are excluded here. Hence the bootcmd.h is added to
exynos5-common.h.

I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot
tested on arndale.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:11:03 +09:00
Ian Campbell
adc7d20631 exynos: Enable config_distro_defaults.h
...and remove explicit setting of things which this implies. This is done for
all exynos platforms (4 & 5) so it is added to exynos-common.h

I'm mainly interested in CONFIG_CMD_BOOTZ and CONFIG_SUPPORT_RAW_INITRD

I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot
tested on arndale.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:11:03 +09:00
Vadim Bendebury
4f29862487 Peach-Pi: Use the enhanced usb_copy() prototype
Exynos5800 IROM has a different, from 5250 and 5420, prototype of the
usb_copy() function. Luckily the earlier version did not expect any
arguments, which means the same code could be used with old and new
SoCs, the old ones just ignoring the arguments.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Akshay Saraswat
0e03e82465 Exynos5: ddr3: Choose between single or double channel config
Add a 4G configuration and choose it based on the number of banks
declared in config file. A board with 4 SDRAM banks declared (as
per CONFIG_NR_DRAM_BANKS) will end up with the 2G confiuration.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Akshay Saraswat
43581c8338 Config: Exynos5420: Refactor SDRAM Bank and Size
Since, not every board may have all memory channels configured
and all available banks of DMC used, we wish to refactor configs
for Memory Bank size and numbers as per board memory config.
For Example, Peach-Pit has 2GB memory and will be using only 4 banks
but Peach-Pi has 3.5GB memory and will be using all 7 available
SDRAM banks.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Alim Akhtar
061091098a DMC: Exynos5: Enable update mode for DREX controller
As per Exynos5800 UM ver 0.00 section 17.13.2.1
CONCONTROL register bit 3 [update_mode], Exynos5800 does not
support the PHY initiated update. And it is recommanded to
set this field to 1'b1 during initialization. This patch sets this bit.
Applying MC-initiated mode makes DDL tracking ON, that helps in
compensate MIF voltage variation.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Akshay Saraswat
79043d84da Config: Exynos5800: Enable build for Peach-Pi
This adds following things :
- New config and defconfig for Peach-Pi board.
- Alterations in Kconfig and MAINTAINERS.
- Addition of CONFIG_EXYNOS5800.
- ADdition of exynos5800-peach-pi in dts list.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Akshay Saraswat
e6b723fc70 Exynos5800: Add DTS for new board Peach-Pi
We have a new board Peach-Pi similar to Peach-Pit. Peach-Pi
differs from Peach-Pit in configuration factors like display
resolution, memory size, SoC version etc.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Akshay Saraswat
aa14b42d53 Exynos5800: Introduce new proid for Exynos5800
This patch intends to add a new proid for Exynos5800 which is a
variant of Exynos5420. Product id for Exynos5800 is 0x5422.
Both Exynos5420 and Exynos5800 are pin to pin compitable. This
gives us an advantage of reusing Exynos5420 clock, pinmux, memory
and other settings.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-11-17 19:03:38 +09:00
Tom Rini
2086e388d5 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2014-11-14 16:39:32 -05:00
Tom Rini
6393c43c18 Merge branch 'master' of git://git.denx.de/u-boot-video 2014-11-14 15:05:53 -05:00
Yangbo Lu
94b383e7d8 powerpc/85xx: enable some P1/P2 boards mtdparts for nor flash
Enable these boards mtdparts for nor flash:
p1020rdb-pd, p1021rdb-pc, p1022ds, p1025twr, and p2020rdb-pc.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
2014-11-14 11:13:12 -08:00
Valentin Longchamp
a0744285ee keymile/powerpc: move to the architecture-generic board system
This converts all the Keymile powerpc boards to the generic board
initialization.

This includes the 3 Keymile powerpc subsystems: km82xx, km83xx,
and kmp204x.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:15 -08:00
Valentin Longchamp
e83a7e9453 powerpc/mpc83xx: Zero boot_flags arg for calling board_init_f()
The argument boot_flags of board_init_f() is not used at all in the
powerpc specific board.c init sequence. Now with the generic init
sequence, this boot_flags arg is used by board_init_f().

This patch sets the r3 register that is used to pass the boot_flags
argument from the start.S board_init_f() call to 0 prior to the function
call to avoid unknown content to end up in gd->flags.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:15 -08:00
Ashish Kumar
7ac1a24a85 powerpc/BSC9131RDB: Enable creation of dynamic partitions for NAND
* fdt_fixup_mtdparts is called from ft_board_setup
 * Run "mtdparts default" to create NAND partition on uboot
 * Use mtdparts to create partitions dynamically rather
    than using static partitions in device tree

Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:14 -08:00
Ashish Kumar
42a9e2fe1b powerpc/BSC9132QDS: Enable creation of dynamic partition for NAND and NOR
* fdt_fixup_mtdparts is called from ft_board_setup
 * run "mtdparts default" to create NAND, NOR partition on uboot
 * Use mtdparts to create partitions dynamically rather
    than using static partitions in device tree

Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:14 -08:00
Prabhakar Kushwaha
aa5a3d8d46 powerpc/mpc85xx: Use IFC accessor function
IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.

So use IFC acessor functions instead of in_be32().

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:14 -08:00
Priyanka Jain
0921de6744 t104xrdb: Add Errata A_007662, A_008007 workaround in pbi.cfg
-A_007662 states that for x1 link width, PCIe2 controller trains in
 Gen1 speed while configured for Gen2 speed.
 Workaround:Set the width to x1 and speed to Gen2 by writing to
 CCSR registers in PBI phase

-A_008007 states that PVR register may show random value.
 Workaround: Reset PVR register using DCSR space in PBI phase

Add PBI based software workaround for A_007662 and A_008007
in t104x_pbi.cfg. This is required for SPL-based bootloaders
like NAND-boot, SD-boot, SPI-boot

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:14 -08:00
Chunhe Lan
ab06b236f7 powerpc/t4rdb: Add support of CPLD
This support of CPLD includes

    - Files and register definitions
    - Command to switch alternate bank
    - Command to switch default bank

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:14 -08:00
ramneek mehresh
a53dd53001 85xx/b4:Correct USB DR controller liodn entry
LIODN entry for B4860/B4420 mentions USB controller as "mph"
insread of "dr". This results in PAMU not permitting bus
transactions for USB DR controller on B4860 resulting in
USB function failure. Replacing "fsl-usb2-mph" with
"fsl-usb2-dr" allows USB DR controller bus transactions

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com>
Reviewed-by: Sun Yusong-R58495 <yorksun@freescale.com>
2014-11-14 11:12:13 -08:00
Paul Gortmaker
2bf4207b8a sbc8548: enable and test CONFIG_SYS_GENERIC_BOARD
Tested on the following baseline (note "dirty" since I enabled
ALT_BOOT in the config in order to use the alternate boot bank.)

Everything seems to work fine with no additional changes.  The
banner warning message is now gone.

 ---

U-Boot 2014.10-rc1-00075-ge49f14af1349-dirty (Aug 14 2014 - 10:26:15)

CPU:   8548E, Version: 2.1, (0x80390021)
Core:  e500, Version: 2.2, (0x80210022)
Clock Configuration:
       CPU0:990  MHz,
       CCB:396  MHz,
       DDR:198  MHz (396 MT/s data rate), LBC:99   MHz
L1:    D-cache 32 KiB enabled
       I-cache 32 KiB enabled
I2C:   ready
DRAM:  Detected UDIMM
    SDRAM: 128 MiB
256 MiB (DDR2, 64-bit, CL=3, ECC off)
Flash: 72 MiB
L2:    512 KiB enabled
*** Warning - bad CRC, using default environment

PCI: Host, 64 bit, 66 MHz, sync, arbiter
  00:01.0     - 8086:1026 - Network controller
PCI1: Bus 00 - 00

PCIe1: Root Complex, x1 gen1, regs @ 0xe000a000
  02:00.0     - 1148:9e00 - Network controller
PCIe1: Bus 01 - 02
In:    serial
Out:   serial
Err:   serial
Net:   eTSEC0 [PRIME], eTSEC1
Hit any key to stop autoboot:  0
=> ver

U-Boot 2014.10-rc1-00075-ge49f14af1349-dirty (Aug 14 2014 - 10:26:15)
powerpc-linux-gcc (GCC) 4.5.2
GNU ld (GNU Binutils) 2.21
=>

 ---

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:13 -08:00
Shaohui Xie
ae6b458306 driver/net/fm/memac_phy: set NEG bit for external MDIOs
NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some
platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failure
on XAUI PHY, so set this bit definitely to align with the RM.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:13 -08:00
Shaohui Xie
ff5fb2a36d Fman/mEMAC: mEMAC fix for 10G MAC and PHY
1. use Payload length check disable when enable MAC;
2. add XGMII support for setting MAC interface mode;
3. only enable auto negotiation for Non-XGMII mode;
4. return 0xffff if clause 22 is used to read 10G phy_id;

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-By: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:13 -08:00
Valentin Longchamp
a5fbe7422e mpc85xx/kmp204x: raise u-boot size to 768KB
Until now this defined to be 512KB and the total binary size actually
was on the edge of this limit. Most of the powerpc boards have thus
moved to 768KB.

Since on the current kmp204x boards there is 1MB reserved for u-boot on
the SPI boot flash, there is no problem to set the limit to 768KB as
well to be on line with the other powerpc boards and to eventually
configure in some additional features (and binary size) to u-boot.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-14 11:12:01 -08:00
Tom Rini
45043cf804 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2014-11-14 13:53:49 -05:00
Soeren Moch
05d492a323 arm: mx6: add support for TBS2910 Matrix ARM miniPC
Add initial support for TBS2910 Matrix ARM miniPC.
Support includes MMC, Ethernet, UARTs, HDMI, USB, SATA, PCI, I2C, RTC.

Signed-off-by: Soeren Moch <smoch@web.de>
2014-11-13 18:09:23 +01:00
Fabio Estevam
3302c275b3 mx6sabresd: Staticize when possible
Annotate 'static' when appropriate for the variables used locally.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-13 18:06:18 +01:00
Fabio Estevam
952fdc4e83 mx6sabresd: Fix error handling in board_mmc_init()
When an invalid USDHC port is passed we should return -EINVAL instead of 0.

Also, return the error immediately on fsl_esdhc_initialize() failure.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-13 18:06:13 +01:00
Nikolay Dimitrov
11076f0cac mx6: video_skip: Fix crash on NULL pointer
Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg>
Cc: Stefano Babic <sbabic@denx.de>
2014-11-13 17:56:15 +01:00
Tom Rini
0d485b9095 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2014-11-13 10:35:13 -05:00
John Tobias
75f2ba4220 imx6: SPL support for iMX6 SabreSD
This patch will enable the support for SPL on iMX6 SabreSD.
It tested on SD2 and SD3 mmc port (Switch 1 or 2 of SW6)

Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-11-13 16:25:10 +01:00
John Tobias
1558200a3f imx6: add spl in the header file
add the spl info in the header file.
Also, added a macro statement in m6sabre_common.h to avoid compiler
warning.

Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
2014-11-13 16:24:59 +01:00
John Tobias
e451e9ba8d kconfig: imx6: add SUPPORT_SPL
add SUPPORT_SPL feature for iMX6 SabreSD. It need to use
mx6sabresd_spl_defconfig to compile it.

Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
2014-11-13 16:23:55 +01:00
John Tobias
340d1d3a0e imx6: add data configuration file for SPL
It's a trim version of mx6q_4x_mt41j128.cfg. It just removed
the related settings for DDR

Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
2014-11-13 16:23:55 +01:00
John Tobias
988529745e imx6: add spl config for mx6sabresd
add a build configuration file for mx6sabresd with spl support

Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
2014-11-13 16:23:55 +01:00
Ye.Li
83bb3215df imx: mx6q/dlsabreauto: And NAND flash support
The i.MX6Q/DL sabreauto board has one NAND socket, set the
CONFIG_NAND_MXS and relevant NAND configurations to enable the
MXS NAND flash driver.
Add board level codes to set IOMUX and clock for GPMI-NAND and
BCH module.

Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-13 16:23:55 +01:00
Ye.Li
610efbe0c5 imx: mx6q/dl sabre_common: Move MMC ENV offset to 512KB position
Set the CONFIG_ENV_OFFSET from 384KB to 512KB offset, so we will have larger space
for u-boot image.
When enabling NAND flash support feature, the u-boot image size has exceeded the
384KB, which causes overlay to the environment variables storage.

Signed-off-by: Ye.Li <B37916@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-13 16:23:55 +01:00
Christian Gmeiner
cb0b6986b0 ot1200: fix card detect for usdhc4
Today I got the final board and found out that a different
connector is used as the one on my development board. The
new connector has swaped pins for cd and wp.

This change is tested on a production ready board.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2014-11-13 16:23:38 +01:00
Fabio Estevam
4ccaf5ddeb mx53loco: Change 'fdt_file' dynamically
Since kernel 3.15 there are two dtb's for the imx53-qsb board:

imx53-qsb.dtb - For the boards with DA9053 PMIC
imx53-qsrb.dtb - For the boards with MC34708 PMIC

Change the 'fdt_file' dynamically, so that the correct dtb can be used depending
on the board variant.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2014-11-13 16:22:26 +01:00
Christian Gmeiner
39c7d5a222 ot1200: add support for EHCI
U-Boot 2014.10-17457-g0b23780-dirty (Nov 10 2014 - 11:41:04)

CPU:   Freescale i.MX6D rev1.2 at 792 MHz
Reset cause: WDOG
Board: ot1200
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected M25P16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB
In:    serial
Out:   serial
Err:   serial
Net:   using phy at 0
FEC [PRIME]
Hit any key to stop autoboot:  0
=> usb start
(Re)start USB...
USB0:   Port not available.
USB1:   USB EHCI 1.00
scanning bus 1 for devices... 4 USB Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller
  |
  +-2  Hub (480 Mb/s, 2mA)
    |
    +-3  Mass Storage (480 Mb/s, 80mA)
    |    USBest Technology USB Mass Storage Device 0000000000028B
    |
    +-4  Vendor specific (480 Mb/s, 2mA)

=>

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2014-11-13 16:22:26 +01:00
Tom Rini
3ad207a2bf Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-11-13 09:32:45 -05:00
Marek Vasut
bdf1638a75 arm: mx6: Fix missing Kconfig option for Novena
Add two missing Kconfig options for Novena and drop the SPL
from the Novena config.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-13 09:30:03 -05:00
Zoltan HERPAI
64a97599b7 sunxi: gmac: Update bananapi fixup to the new CONFIG_TARGET_<BOARD> structure
The magic bit toucher needs to be updated to reflect the new board Kconfig structure

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-11-13 14:49:02 +01:00
Hans de Goede
76946dfe69 sun6i: ehci: Add sun6i ehci support
Add support for the 2 ehci controllers found on the sun6i (A31) soc.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Marek Vasut <marex@denx.de>
2014-11-13 14:49:02 +01:00
Hans de Goede
115200ceb0 sunxi: ehci: Add proper Kconfig options to select the usb Vbus gpio-s
Add proper Kconfig options to select the usb Vbus gpio-s, besides moving to
Kconfig being the right thing to do, an added advantage of this is that it
allows for boards without Vbus gpio-s.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-11-13 14:49:02 +01:00
Hans de Goede
505eceec87 sun6i: Add Mele M9 board
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-11-13 14:49:02 +01:00
Hans de Goede
8c2c9cfa7b sun6i: Enable SPL
Enable the SPL now that we've all the necessary bits in place.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-11-13 14:49:01 +01:00
Hans de Goede
6dbfda81c0 sun6i: Poke magic sram controller register to avoid cache issues
Without this the cache will only work in write-through mode, and as soon as
it is put in write-back mode things break.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-11-13 14:49:01 +01:00
Hans de Goede
9a07eb0ba0 sun6i: Add dram initialization code
Add full support for dram initialization, using a fixed clock and autodetection
of the memory organization (numbers of channels, bus-width, etc.).

This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK,
extended with extra initialization sequences and the autodetect algorithm
from boot0.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2014-11-13 14:49:01 +01:00