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Config: Exynos5420: Refactor SDRAM Bank and Size

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Since, not every board may have all memory channels configured
and all available banks of DMC used, we wish to refactor configs
for Memory Bank size and numbers as per board memory config.
For Example, Peach-Pit has 2GB memory and will be using only 4 banks
but Peach-Pi has 3.5GB memory and will be using all 7 available
SDRAM banks.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Akshay Saraswat 2014-11-13 22:38:19 +05:30 committed by Minkyu Kang
parent 061091098a
commit 43581c8338
4 changed files with 12 additions and 4 deletions
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4
include/configs/exynos5420-common.h
View file

@ -57,10 +57,6 @@
*/
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
/* DRAM Memory Banks */
#define CONFIG_NR_DRAM_BANKS 7
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
/* Miscellaneous configurable options */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"

4
include/configs/peach-pi.h
View file

@ -43,4 +43,8 @@
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
/* DRAM Memory Banks */
#define CONFIG_NR_DRAM_BANKS 7
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
#endif /* __CONFIG_PEACH_PI_H */

4
include/configs/peach-pit.h
View file

@ -43,4 +43,8 @@
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
/* DRAM Memory Banks */
#define CONFIG_NR_DRAM_BANKS 4
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
#endif /* __CONFIG_PEACH_PIT_H */

4
include/configs/smdk5420.h
View file

@ -23,4 +23,8 @@
#define CONFIG_IDENT_STRING " for SMDK5420"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
/* DRAM Memory Banks */
#define CONFIG_NR_DRAM_BANKS 7
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
#endif /* __CONFIG_SMDK5420_H */