Move this uncommon header out of the common header.
Fix up some style problems in flash.h while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
This function related to timer and most of the timer functions are in
time.h, so move this function there.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Merge tag 'u-boot-atmel-2020.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features for 2020.04 cycle
This feature set is a patch series from Tudor Ambarus which includes
parsing of the spi flash SFDP parser for SST flashes, and using those
tables to retrieve unique saved per device MAC address. This is then
used as base mac address on the SAMA5D2 Wireless SOM EK board.
The SST26VF064BEUI spi-nor flash is programmed at the factory with a
globally unique address stored in the SFDP vendor parameter table and
it is permanently writeprotected. Retrieve the EUI-48 address and set it
as ethaddr env.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
is included in SPL/TPL without any control for boards. Some boards may
want to disable this to reduce code size where GPIOs are not needed in
SPL or TPL.
Add a new Kconfig option to permit this. Default it to 'y' so that
existing boards work correctly.
Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to
preserve the current behaviour. Also update the 74x164 GPIO driver since
it cannot build with SPL.
This allows us to remove the hacks in config_uncmd_spl.h and
Makefile.uncmd_spl (eventually those files should be removed).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.
Move them over.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function belongs in time.h so move it over and add a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present this function sits in its own file but it does not really
justify it. There are similar string functions in vsprintf.h, so move it
there. Also add the missing function comment.
Use the vsprintf.h include file explicitly where needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
sama5's SFR has at offset 0x04 the DDR Configuration Register,
while sam9x60's SFR contains the EBI Chip Select Register. Add
a union to reconcile both boards.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[tudor.ambarus@microchip.com:
- fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest macros
- drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros
- drop inclusion of asm/arch/at91sam9_smc.h]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Add a function in SFR implementation that will open the DDR input
buffers.
This can be called at DRAM initialization time.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip
WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This converts the following to Kconfig:
CONFIG_ARCH_CPU_INIT
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Tested-by: Felix Brack <fb@ltec.ch>
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Merge tag 'u-boot-atmel-fixes-2019.07-a' of git://git.denx.de/u-boot-atmel
First set of u-boot-atmel fixes for 2019.07 cycle
By default the configuration of the PMC is to have an external crystal
connected that requires driving on both XIN and XOUT pins.
The bypass configuration means that only XIN will be used, the SoC will not
do any driving, and the XIN needs to be provided with a proper signal.
This is the MOSCXTBY bit in the PMC main clock generator register.
The SPL needs to properly initialize the PMC registers before switching
to external clock signal and raising the clock to the cruise speed.
Also created Kconfig for this specific configuration.
By default this is disabled.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This fixes SPL linker script size checks for 3 lds files where the size
checks were implemented as "x < YYY_MAX_SIZE".
Fix the size checks to be "x <= YYY_MAX_SIZE" instead.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
With the new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).
The watchdog servicing is enabled via CONFIG_WATCHDOG.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
The SAMA5D2 ICP Board features the SAMA5D27 SoC,
together with QSPI Flash, Wilc3000 wireless device and
EtherCat support.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The GARDENA smart Gateway boards are equipped with an Atmel / Microchip
AT91SAM9G25 SoC and with 128 MiB of RAM and 256 MiB of NAND storage.
This patch adds support for this board including SPL support. Therefore
the AT91Boostrap is not needed on this platform any more.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This patch adds _image_binary_end to the SPL linker script. This will be
used be the upcoming GARDENA AT91SAM based platform, which uses DT in
SPL and configures CONFIGURE_SPL_SEPARATE_BSS.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This patch enables and starts the watchdog on the AT91 platform if
configured. The WD timeout value is read in the AT91 WD device driver
from the DT, using the "timeout-sec" DT property. If not provided in
the DT, the default value of 2 seconds is used.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
This patch adds a call to spl_early_init() to board_init_f() which is
needed when CONFIG_SPL_OF_CONTROL is configured. This is necessary for
the early SPL setup including the DTB setup for later usage.
Please note that this call might also be needed for non SPL_OF_CONTROL
board, like the smartweb target. But smartweb fails to build with this
call because its binary grows too big. So I disabled it for these kind
of targets for now.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested on the taurus board:
Tested-by: Heiko Schocher <hs@denx.de>
Make sure that lowlevel_init is not compiled when
CONFIG_SKIP_LOWLEVEL_INIT_ONLY is configured.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested on the taurus board:
Tested-by: Heiko Schocher <hs@denx.de>
When introducing the SAMA5D27 SoCs, the SAMA5D2 series got an additional
chip id. The check if the cpu is sama5d2 was changed from a preprocessor
definition (inlining a call to 'get_chip_id()') to a C function,
probably to not call get_chip_id twice?
That however broke a check in the macb ethernet driver. That driver is
more generic and also used for other platforms. I suppose this solution
was implemented to use it in 'gem_is_gigabit_capable()', without having
to stricly depend on the at91 platform:
#ifndef cpu_is_sama5d2
#define cpu_is_sama5d2() 0
#endif
That only works as long as cpu_is_sama5d2 is a preprocessor definition.
(The same is still true for sama5d4 by the way.) So this is a straight
forward fix for the workaround.
The not working check on the SAMA5D2 CPU lead to an issue on a custom
board with a LAN8720A ethernet phy connected to the SoC:
=> dhcp
ethernet@f8008000: PHY present at 1
ethernet@f8008000: Starting autonegotiation...
ethernet@f8008000: Autonegotiation complete
ethernet@f8008000: link up, 1000Mbps full-duplex (lpa: 0xffff)
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
BOOTP broadcast 5
BOOTP broadcast 6
BOOTP broadcast 7
BOOTP broadcast 8
BOOTP broadcast 9
BOOTP broadcast 10
BOOTP broadcast 11
BOOTP broadcast 12
BOOTP broadcast 13
BOOTP broadcast 14
BOOTP broadcast 15
BOOTP broadcast 16
BOOTP broadcast 17
Retry time exceeded; starting again
Notice the wrong reported link speed, although both SoC and phy only
support 100 MBit/s!
The real issue on reliably detecting the features of that cadence
ethernet mac IP block, is probably more complicated, though.
Fixes: 245cbc583d ("ARM: at91: Get the Chip ID of SAMA5D2 SiP")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than
CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the
same script for both SPL and TPL. Add logic to scripts/Makefile.spl to
pass in the right value when preprocessing the script.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Add test for the SPL binary size and the bss section size.
This will throw an error at build time if the SPL sections
do not fit in the designated RAM area, thus avoiding oversizing the SPL.
Based on original work by Wenyou Yang.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Convert the Watchdog driver for AT91SAM9x processors to support
the driver model and device tree. Changes "CONFIG_AT91SAM9_WATCHDOG"
to new "CONFIG_WDT_AT91" Kconfig option.
Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com>
The interruption support had be removed for ARM architecture and
the function get_timer_masked() is no more used except in some
the timer.c files.
This patch clean each timer.c which implement this function and
remove the associated prototype in u-boot-arm.h
For timer.c, I don't verify if the weak version of get_timer
(in lib/time.c) can be used
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The interruption support had be removed for ARM architecture and
the function udelay_masked() is no more used except in some timer.c
files and have the same content than udelay() or __udelay().
This patch update each timer.c implementing this function and
remove the associated prototype in u-boot-arm.h.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Four different boards had different options for enabling cache
that were virtually all the same. This consolidates these
common functions into arch/arm/cpu/arm926ejs/cache.c
This also has the positive side-effect of enabling cache on
the Davinci (da850) boards.
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add mach-at91 to the list of consolidations]
Signed-off-by: Tom Rini <trini@konsulko.com>
CMD_DM is used for debug purpose and it shouldn't be enabled by default
via Kconfig. Unfortunately this is in the tree for quite a long time
that's why solution is to use imply DM for all targets which are
enabling DM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Fix Kconfig bool, default, select and imply options to be
alphabetically sorted.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The various Aries Embedded boards have been orphaned for a year and no
one has come forward to take care of them. Remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
- spl_board_init is empty on smartweb so drop that function
- When CONFIG_AT91SAM9_WATCHDOG is set we do not disable the watchdog in
SPL and instead let full U-Boot handle it. Instead of an empty
function just do not call a function.
Signed-off-by: Tom Rini <trini@konsulko.com>
When a pin is muxed to a peripheral or as a GPIO, the only
configuration that can be set is the pullup. It is too restrictive
so this patch allows to give a full configuration.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under
armv7 folder. This led to a misconception of creating separate folders
for armv7m and armv7r. There is no reason to create separate folder for
other armv7 based architectures when it can co-exist with few Kconfig
symbols.
As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later
separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and
can co exist in the same folder.
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPI
This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
AT91 ma5d4evk board uses atmel spi driver, enable DM_SPI to
use dm functionality.
Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Enable Driver model for AT91 Vinco boards.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Enable DM_SPI for atmel SPI driver on taurus board.
Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add USB clock driver to configure the input clock and the divider
in the PMC_USB register to generate a 48MHz and a 12MHz signal to
the USB Host OHCI.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
The goal of this patch is to clean up the code related to choosing SPL
MMC boot mode.
The spl_boot_mode() now is called only in spl_mmc_load_image() function,
which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled.
To achieve the goal, all per mach/arch implementations eligible for
unification has been replaced with one __weak implementation.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP)
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
This board is based on the Atmel sama5d3 eval boards.
Supporting the following features:
- Boot from NAND Flash
- Ethernet
- FIT
- SPL
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
This board is based on the Atmel 9x5 eval board.
Supporting the following features:
- Boot from NAND Flash
- Ethernet
- FIT
- SPL
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
Add the SAMA5D2 PTC EK board and remove the SAMA5D2 PTC ENGI board
which was a prototype.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Add a header for SAMA5D2 SMC since it's not compatible with
SAMA5D3 one.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[wenyou: fix the wrong base address of the SMC register]
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Last user of this option went away in commit:
fdc7718999 ("board: usb_a9263: Update to support DT and DM")
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the CONFIG_XXXX_BOOT to indicate the boot media, instead of
the CONFIG_SYS_USE_XXXX option, which is declared by
CONFIG_SYS_EXTRA_OPTIONS option.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
As said in READRE.kconfig, include/configs/*.h will be removed
after all options are switched to Kconfig. As the first step,
remove the follow line from include/configs/*.h.
#include <asm/hardware.h>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
To prepare to remove the SoCs options such as SAMA5D2, SAMA5D3
and SAMA5D4 from the CONFIG_SYS_EXTRA_OPTIONS option which is
deprecated, add the SoC options to Kconfig.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
The SAMA5D27-SiP (System in Package) integrates the SAMA5D2
with 1Gbit DDR2-SDRAM in a single package.
The SAMA5D27 SOM1 embeds a 64Mbit QSPI flash, KSZ8081 Phy and
Mac-address EEPROM.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The SAMA5D2 SiP(System in Package) has different Chip IDs in the
CHIPID and CHIP_EXID registers.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the boot device for booting from the QSPI flash.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Refer to the commit 70f8c8316ad(PMC: add new mck function to lower
rate while switching) from AT91Bootstrap.
While switching to a lower clock source, we must switch the clock
source first instead of last. Otherwise, we could end up with
too high frequency on internal bus and peripherals.
This happens on SAMA5D2 as exitting from the ROM code.
Add a function pmc_mck_init_down() to allow this sequence.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As said in 29.5.7 section of SAMA5D2 datasheet, before switching to
the crystal oscillator, a check must be carried out to ensure that
the oscillator is present and that its freqency is valid.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a function to display the company's logo and board information
via the API from DM_VIDEO. This function can be shared by other
atmel boards, so locate it in board/atmel/common folder.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.
The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.
The patch is cloned from the patch of mailing-list:
[PATCH v2] clk: at91: utmi: set the mainck rate
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
[trini: Depend on SPL_DM]
Signed-off-by: Tom Rini <trini@konsulko.com>
Create board/$(VENDOR)/common folder to accommodate the common code
shared by other atmel boards, now put the code to set ethernet mac
address from eeprom, which uses the i2c eeprom driver.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config
node), all the lingering definitions in header files will cause
warnings/errors due to the redefinition of the configuration item.
As we don't want to pollute the defconfig files (and values should
usually be identical for entire architectures), the defaults are moved
into Kconfig. Kconfig will always pick the first default that
matches, so please keep these values at the end of each file (to allow
any board-specific Kconfig, which will be included earlier) to
override with an unconditional default setting.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to be able to migrate the various SoC EHCI CONFIG options we
first need to finish the switch from CONFIG_USB_EHCI to
CONFIG_USB_EHCI_HCD.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The MMC SPL locates the BSS section to a different memory region
from text, then use "_image_binary_end" variable to point to the
correct device tree location.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Because the MMC SPL puts the bbs section in the ddr memory, move
calling mem_init() before calling spl_init().
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
When OF_CONTROL is enabled, MMC boot device should not be detected
automatically, it should be MMC1 fixedly only the status "enabled"
is available.
Add NAND Flash boot device as well.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The intention of the removal is the preparation to introduce the
new AT91 PIO pinctrl driver.
Use the union to make the PIO3 and PIO2's registers be together
and make their offset aligned.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When the CONFIG_ATMEL_LEGACY is undefined, according to the following
defines, at91_set_gpio_value() references to at91_set_pio_value(x, y)
with two parameters.
#define at91_set_gpio_value(x, y) at91_set_pio_value(x, y)
#define at91_get_gpio_value(x) at91_get_pio_value(x)
But there isn't the implementation of at91_set_pio_value(x, y) with
two parameters in U-Boot. This is an error.
Same as at91_get_gpio_value(x) define.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Today, we have cases where we wish to build all of U-Boot in Thumb2 mode for
various reasons. We also have cases where we only build SPL in Thumb2 mode due
to size constraints and wish to build the rest of the system in ARM mode. So
in this migration we introduce a new symbol as well, SPL_SYS_THUMB_BUILD to
control if we build everything or just SPL (or in theory, just U-Boot) in
Thumb2 mode.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
