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arm: at91: Enable watchdog support

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This patch enables and starts the watchdog on the AT91 platform if
configured. The WD timeout value is read in the AT91 WD device driver
from the DT, using the "timeout-sec" DT property. If not provided in
the DT, the default value of 2 seconds is used.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
This commit is contained in:
Stefan Roese 2019-04-03 07:37:40 +02:00 committed by Eugen Hristev
parent 05d4b8e4ad
commit 256c2ff0cc
3 changed files with 58 additions and 10 deletions
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48
arch/arm/mach-at91/clock.c
View file

@ -5,12 +5,17 @@
*/
#include <common.h>
#include <dm.h>
#include <wdt.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_wdt.h>
#define EN_UPLL_TIMEOUT 500
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
void at91_periph_clk_enable(int id)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
@ -118,3 +123,46 @@ void at91_pllicpr_init(u32 icpr)
writel(icpr, &pmc->pllicpr);
}
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
static ulong next_reset;
ulong now;
if (!watchdog_dev)
return;
now = get_timer(0);
/* Do not reset the watchdog too often */
if (now > next_reset) {
next_reset = now + 1000; /* reset every 1000ms */
wdt_reset(watchdog_dev);
}
}
int arch_early_init_r(void)
{
struct at91_wdt_priv *priv;
/* Init watchdog */
if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
debug("Watchdog: Not found by seq!\n");
if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
puts("Watchdog: Not found!\n");
return 0;
}
}
priv = dev_get_priv(watchdog_dev);
if (!priv) {
printf("Watchdog: priv not available!\n");
return 0;
}
wdt_start(watchdog_dev, priv->timeout * 1000, 0);
printf("Watchdog: Started\n");
return 0;
}

10
arch/arm/mach-at91/include/mach/at91_wdt.h
View file

@ -25,6 +25,12 @@ typedef struct at91_wdt {
u32 sr;
} at91_wdt_t;
struct at91_wdt_priv {
void __iomem *regs;
u32 regval;
u32 timeout;
};
#endif
/* Watchdog Control Register */
@ -43,4 +49,8 @@ typedef struct at91_wdt {
#define AT91_WDT_MR_WDDBGHLT 0x10000000
#define AT91_WDT_MR_WDIDLEHLT 0x20000000
/* Hardware timeout in seconds */
#define WDT_MAX_TIMEOUT 16
#define WDT_DEFAULT_TIMEOUT 2
#endif

10
drivers/watchdog/at91sam9_wdt.c
View file

@ -31,16 +31,6 @@ DECLARE_GLOBAL_DATA_PTR;
*/
#define WDT_SEC2TICKS(s) (((s) << 8) - 1)
/* Hardware timeout in seconds */
#define WDT_MAX_TIMEOUT 16
#define WDT_DEFAULT_TIMEOUT 2
struct at91_wdt_priv {
void __iomem *regs;
u32 regval;
u32 timeout;
};
/*
* Set the watchdog time interval in 1/256Hz (write-once)
* Counter is 12 bit.