mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 21:54:01 +00:00
arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under armv7 folder. This led to a misconception of creating separate folders for armv7m and armv7r. There is no reason to create separate folder for other armv7 based architectures when it can co-exist with few Kconfig symbols. As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and can co exist in the same folder. Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
parent
2a5180535c
commit
acf1500138
23 changed files with 76 additions and 76 deletions
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@ -180,7 +180,7 @@ config CPU_ARM1176
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select HAS_VBAR
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select SYS_CACHE_SHIFT_5
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config CPU_V7
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config CPU_V7A
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bool
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select HAS_VBAR
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select HAS_THUMB2
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@ -207,7 +207,7 @@ config SYS_CPU
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default "arm946es" if CPU_ARM946ES
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default "arm1136" if CPU_ARM1136
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default "arm1176" if CPU_ARM1176
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default "armv7" if CPU_V7
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default "armv7" if CPU_V7A
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default "armv7m" if CPU_V7M
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default "pxa" if CPU_PXA
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default "sa1100" if CPU_SA1100
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@ -221,7 +221,7 @@ config SYS_ARM_ARCH
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default 5 if CPU_ARM946ES
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default 6 if CPU_ARM1136
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default 6 if CPU_ARM1176
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default 7 if CPU_V7
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default 7 if CPU_V7A
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default 7 if CPU_V7M
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default 5 if CPU_PXA
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default 4 if CPU_SA1100
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@ -244,7 +244,7 @@ config SYS_CACHELINE_SIZE
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config SYS_ARCH_TIMER
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bool "ARM Generic Timer support"
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depends on CPU_V7 || ARM64
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depends on CPU_V7A || ARM64
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default y if ARM64
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help
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The ARM Generic Timer (aka arch-timer) provides an architected
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@ -254,7 +254,7 @@ config SYS_ARCH_TIMER
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config ARM_SMCCC
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bool "Support for ARM SMC Calling Convention (SMCCC)"
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depends on CPU_V7 || ARM64
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depends on CPU_V7A || ARM64
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select ARM_PSCI_FW
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help
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Say Y here if you want to enable ARM SMC Calling Convention.
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@ -440,7 +440,7 @@ config TARGET_SPEAR600
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config TARGET_STV0991
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bool "Support stv0991"
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select CPU_V7
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select CPU_V7A
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select DM
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select DM_SERIAL
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select DM_SPI
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@ -493,36 +493,36 @@ config ARCH_BCM283X
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config TARGET_VEXPRESS_CA15_TC2
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bool "Support vexpress_ca15_tc2"
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select CPU_V7
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select CPU_V7A
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select PL011_SERIAL
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config TARGET_VEXPRESS_CA5X2
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bool "Support vexpress_ca5x2"
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select CPU_V7
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select CPU_V7A
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select PL011_SERIAL
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config TARGET_VEXPRESS_CA9X4
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bool "Support vexpress_ca9x4"
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select CPU_V7
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select CPU_V7A
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select PL011_SERIAL
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config TARGET_BCM23550_W1D
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bool "Support bcm23550_w1d"
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select CPU_V7
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select CPU_V7A
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imply CRC32_VERIFY
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imply FAT_WRITE
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config TARGET_BCM28155_AP
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bool "Support bcm28155_ap"
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select CPU_V7
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select CPU_V7A
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imply CRC32_VERIFY
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imply FAT_WRITE
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config TARGET_BCMCYGNUS
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bool "Support bcmcygnus"
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select CPU_V7
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select CPU_V7A
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imply CRC32_VERIFY
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imply CMD_HASH
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imply FAT_WRITE
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@ -533,7 +533,7 @@ config TARGET_BCMCYGNUS
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config TARGET_BCMNSP
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bool "Support bcmnsp"
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select CPU_V7
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select CPU_V7A
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config TARGET_BCMNS2
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bool "Support Broadcom Northstar2"
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@ -557,7 +557,7 @@ config ARCH_EXYNOS
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config ARCH_S5PC1XX
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bool "Samsung S5PC1XX"
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select CPU_V7
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select CPU_V7A
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select DM
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select DM_SERIAL
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select DM_GPIO
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@ -565,7 +565,7 @@ config ARCH_S5PC1XX
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config ARCH_HIGHBANK
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bool "Calxeda Highbank"
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select CPU_V7
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select CPU_V7A
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select PL011_SERIAL
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config ARCH_INTEGRATOR
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@ -576,7 +576,7 @@ config ARCH_INTEGRATOR
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config ARCH_KEYSTONE
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bool "TI Keystone"
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select CPU_V7
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select CPU_V7A
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select SUPPORT_SPL
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select SYS_THUMB_BUILD
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select CMD_POWEROFF
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@ -587,7 +587,7 @@ config ARCH_KEYSTONE
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config ARCH_OMAP2PLUS
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bool "TI OMAP2+"
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select CPU_V7
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select CPU_V7A
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select SPL_BOARD_INIT if SPL
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select SPL_STACK_R if SPL
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select SUPPORT_SPL
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@ -626,13 +626,13 @@ config ARCH_MX28
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config ARCH_MX7ULP
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bool "NXP MX7ULP"
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select CPU_V7
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select CPU_V7A
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select ROM_UNIFIED_SECTIONS
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imply MXC_GPIO
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config ARCH_MX7
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bool "Freescale MX7"
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select CPU_V7
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select CPU_V7A
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select SYS_FSL_HAS_SEC if SECURE_BOOT
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select SYS_FSL_SEC_COMPAT_4
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select SYS_FSL_SEC_LE
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@ -642,7 +642,7 @@ config ARCH_MX7
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config ARCH_MX6
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bool "Freescale MX6"
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select CPU_V7
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select CPU_V7A
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select SYS_FSL_HAS_SEC if SECURE_BOOT
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select SYS_FSL_SEC_COMPAT_4
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select SYS_FSL_SEC_LE
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@ -656,7 +656,7 @@ endif
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config ARCH_MX5
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bool "Freescale MX5"
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select CPU_V7
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select CPU_V7A
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select BOARD_EARLY_INIT_F
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imply MXC_GPIO
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@ -692,7 +692,7 @@ config ARCH_SNAPDRAGON
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config ARCH_SOCFPGA
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bool "Altera SOCFPGA family"
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select CPU_V7
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select CPU_V7A
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select SUPPORT_SPL
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select OF_CONTROL
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select SPL_OF_CONTROL
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@ -750,7 +750,7 @@ config ARCH_SUNXI
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config ARCH_VF610
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bool "Freescale Vybrid"
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select CPU_V7
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select CPU_V7A
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select SYS_FSL_ERRATUM_ESDHC111
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imply CMD_MTDPARTS
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imply NAND
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@ -758,7 +758,7 @@ config ARCH_VF610
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config ARCH_ZYNQ
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bool "Xilinx Zynq based platform"
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select BOARD_LATE_INIT
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select CPU_V7
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select CPU_V7A
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select SUPPORT_SPL
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select OF_CONTROL
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select SPL_BOARD_INIT if SPL
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@ -1000,7 +1000,7 @@ config TARGET_LS1088ARDB
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config TARGET_LS1021AQDS
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bool "Support ls1021aqds"
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select BOARD_LATE_INIT
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select CPU_V7
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select CPU_V7A
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select SUPPORT_SPL
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@ -1014,7 +1014,7 @@ config TARGET_LS1021AQDS
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config TARGET_LS1021ATWR
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bool "Support ls1021atwr"
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select BOARD_LATE_INIT
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select CPU_V7
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select CPU_V7A
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select SUPPORT_SPL
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@ -1027,7 +1027,7 @@ config TARGET_LS1021ATWR
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config TARGET_LS1021AIOT
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bool "Support ls1021aiot"
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select BOARD_LATE_INIT
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select CPU_V7
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select CPU_V7A
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select SUPPORT_SPL
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@ -1143,7 +1143,7 @@ config STM32
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config ARCH_STI
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bool "Support STMicrolectronics SoCs"
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select CPU_V7
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select CPU_V7A
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select DM
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select DM_SERIAL
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select BLK
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0+
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ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TEGRA),yy)
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CONFIG_CPU_V7=
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CONFIG_CPU_V7A=
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CONFIG_CPU_ARM720T=y
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endif
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@ -14,7 +14,7 @@ arch-$(CONFIG_CPU_SA1100) =-march=armv4
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arch-$(CONFIG_CPU_PXA) =
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arch-$(CONFIG_CPU_ARM1136) =-march=armv5
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arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
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arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \
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arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
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$(call cc-option, -march=armv7, -march=armv5))
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arch-$(CONFIG_ARM64) =-march=armv8-a
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@ -38,7 +38,7 @@ tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100
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tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
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tune-$(CONFIG_CPU_ARM1136) =
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tune-$(CONFIG_CPU_ARM1176) =
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tune-$(CONFIG_CPU_V7) =
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tune-$(CONFIG_CPU_V7A) =
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tune-$(CONFIG_ARM64) =
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# Evaluate tune cc-option calls now
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@ -1,4 +1,4 @@
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if CPU_V7
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if CPU_V7A
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config CPU_V7_HAS_NONSEC
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bool
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@ -52,7 +52,7 @@ config ARMV7_PSCI_NR_CPUS
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config ARMV7_LPAE
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bool "Use LPAE page table format" if EXPERT
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depends on CPU_V7
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depends on CPU_V7A
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default n
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---help---
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Say Y here to use the long descriptor page table format. This is
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@ -451,7 +451,7 @@ enum dcache_option {
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DCACHE_WRITEBACK = TTB_SECT | TTB_SECT_MAIR(2),
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DCACHE_WRITEALLOC = TTB_SECT | TTB_SECT_MAIR(3),
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};
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#elif defined(CONFIG_CPU_V7)
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#elif defined(CONFIG_CPU_V7A)
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/* Short-Descriptor Translation Table Level 1 Bits */
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#define TTB_SECT_NS_MASK (1 << 19)
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#define TTB_SECT_NG_MASK (1 << 17)
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@ -493,7 +493,7 @@ enum {
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MMU_SECTION_SIZE = 1 << MMU_SECTION_SHIFT,
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};
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#ifdef CONFIG_CPU_V7
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#ifdef CONFIG_CPU_V7A
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/* TTBR0 bits */
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#define TTBR0_BASE_ADDR_MASK 0xFFFFC000
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#define TTBR0_RGN_NC (0 << 3)
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@ -160,7 +160,7 @@ static inline void mmu_setup(void)
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asm volatile("mcr p15, 0, %0, c10, c2, 0"
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: : "r" (MEMORY_ATTRIBUTES) : "memory");
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}
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#elif defined(CONFIG_CPU_V7)
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#elif defined(CONFIG_CPU_V7A)
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if (is_hyp()) {
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/* Set HTCR to disable LPAE */
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asm volatile("mcr p15, 4, %0, c2, c0, 2"
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@ -45,15 +45,15 @@ config AT91SAM9X5
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config SAMA5D2
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bool
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select CPU_V7
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select CPU_V7A
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config SAMA5D3
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bool
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select CPU_V7
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select CPU_V7A
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config SAMA5D4
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bool
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select CPU_V7
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select CPU_V7A
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choice
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prompt "Atmel AT91 board select"
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@ -159,7 +159,7 @@ config TARGET_SAMA5D2_XPLAINED
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config TARGET_SAMA5D27_SOM1_EK
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bool "SAMA5D27 SOM1 EK board"
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select CPU_V7
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select CPU_V7A
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select SUPPORT_SPL
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select BOARD_EARLY_INIT_F
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select BOARD_LATE_INIT
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@ -254,7 +254,7 @@ config TARGET_WB45N
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config TARGET_WB50N
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bool "Support Laird WB50N"
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select BOARD_LATE_INIT
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select CPU_V7
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select CPU_V7A
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select SUPPORT_SPL
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select BOARD_EARLY_INIT_F
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@ -297,6 +297,6 @@ source "board/laird/wb50n/Kconfig"
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config SPL_LDSCRIPT
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default "arch/arm/mach-at91/arm926ejs/u-boot-spl.lds" if CPU_ARM926EJS
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default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if CPU_V7
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default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if CPU_V7A
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endif
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@ -16,4 +16,4 @@ endif
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obj-y += clock.o
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obj-$(CONFIG_CPU_ARM920T) += arm920t/
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obj-$(CONFIG_CPU_ARM926EJS) += arm926ejs/
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obj-$(CONFIG_CPU_V7) += armv7/
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obj-$(CONFIG_CPU_V7A) += armv7/
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@ -2,7 +2,7 @@ ifeq ($(CONFIG_CPU_ARM926EJS),y)
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PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,)
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endif
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ifeq ($(CONFIG_CPU_V7),y)
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ifeq ($(CONFIG_CPU_V7A),y)
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ifndef CONFIG_SPL_BUILD
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ALL-y += u-boot.img
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endif
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@ -7,7 +7,7 @@ config BCM2836
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bool "Broadcom BCM2836 SoC support"
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depends on ARCH_BCM283X
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select ARMV7_LPAE
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select CPU_V7
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select CPU_V7A
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config BCM2837
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bool "Broadcom BCM2837 SoC support"
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@ -18,7 +18,7 @@ config BCM2837_32B
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depends on ARCH_BCM283X
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select BCM2837
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select ARMV7_LPAE
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select CPU_V7
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select CPU_V7A
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config BCM2837_64B
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bool "Broadcom BCM2837 SoC 64-bit support"
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@ -6,7 +6,7 @@ choice
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config ARCH_EXYNOS4
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bool "Exynos4 SoC family"
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select CPU_V7
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select CPU_V7A
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select BOARD_EARLY_INIT_F
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help
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Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
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@ -15,7 +15,7 @@ config ARCH_EXYNOS4
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config ARCH_EXYNOS5
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bool "Exynos5 SoC family"
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select CPU_V7
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select CPU_V7A
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select BOARD_EARLY_INIT_F
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select SHA_HW_ACCEL
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imply CRC32_VERIFY
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@ -4,7 +4,7 @@
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# Minkyu Kang <mk7.kang@samsung.com>
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obj-y += soc.o
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obj-$(CONFIG_CPU_V7) += clock.o pinmux.o power.o system.o
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obj-$(CONFIG_CPU_V7A) += clock.o pinmux.o power.o system.o
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obj-$(CONFIG_ARM64) += mmu-arm64.o
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obj-$(CONFIG_EXYNOS5420) += sec_boot.o
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@ -20,7 +20,7 @@ void *secondary_boot_addr = (void *)_main;
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void reset_cpu(ulong addr)
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{
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#ifdef CONFIG_CPU_V7
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#ifdef CONFIG_CPU_V7A
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writel(0x1, samsung_get_base_swreset());
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#endif
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}
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@ -6,7 +6,7 @@ config HAVE_MVEBU_EFUSE
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config ARMADA_32BIT
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bool
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select CPU_V7
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select CPU_V7A
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select SUPPORT_SPL
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select SPL_DM
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select SPL_DM_SEQ_ALIAS
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@ -14,7 +14,7 @@ endif
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config TARGET_QEMU_ARM_32BIT
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bool "Support qemu_arm"
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depends on ARCH_QEMU
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select CPU_V7
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select CPU_V7A
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select ARCH_SUPPORT_PSCI
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select SYS_ARCH_TIMER
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@ -6,7 +6,7 @@ choice
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|
||||
config RCAR_32
|
||||
bool "Renesas ARM SoCs R-Car Gen1/Gen2 (32bit)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
|
||||
config RCAR_GEN3
|
||||
bool "Renesas ARM SoCs R-Car Gen3 (64bit)"
|
||||
|
|
|
@ -2,7 +2,7 @@ if ARCH_ROCKCHIP
|
|||
|
||||
config ROCKCHIP_RK3036
|
||||
bool "Support Rockchip RK3036"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select SUPPORT_SPL
|
||||
select SPL
|
||||
imply USB_FUNCTION_ROCKUSB
|
||||
|
@ -15,7 +15,7 @@ config ROCKCHIP_RK3036
|
|||
|
||||
config ROCKCHIP_RK3128
|
||||
bool "Support Rockchip RK3128"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
help
|
||||
The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
|
||||
including NEON and GPU, Mali-400 graphics, several DDR3 options
|
||||
|
@ -24,7 +24,7 @@ config ROCKCHIP_RK3128
|
|||
|
||||
config ROCKCHIP_RK3188
|
||||
bool "Support Rockchip RK3188"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select SPL_BOARD_INIT if SPL
|
||||
select SUPPORT_SPL
|
||||
select SPL
|
||||
|
@ -46,7 +46,7 @@ config ROCKCHIP_RK3188
|
|||
|
||||
config ROCKCHIP_RK322X
|
||||
bool "Support Rockchip RK3228/RK3229"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select SUPPORT_SPL
|
||||
select SPL
|
||||
select ROCKCHIP_BROM_HELPER
|
||||
|
@ -59,7 +59,7 @@ config ROCKCHIP_RK322X
|
|||
|
||||
config ROCKCHIP_RK3288
|
||||
bool "Support Rockchip RK3288"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select SPL_BOARD_INIT if SPL
|
||||
select SUPPORT_SPL
|
||||
select SPL
|
||||
|
@ -151,7 +151,7 @@ config ROCKCHIP_RK3399
|
|||
|
||||
config ROCKCHIP_RV1108
|
||||
bool "Support Rockchip RV1108"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
help
|
||||
The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
|
||||
and a DSP.
|
||||
|
|
|
@ -25,7 +25,7 @@ config SYS_SOC
|
|||
config TARGET_STM32MP1
|
||||
bool "Support stm32mp1xx"
|
||||
select ARCH_SUPPORT_PSCI
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select CPU_V7_HAS_NONSEC
|
||||
select CPU_V7_HAS_VIRT
|
||||
select PINCTRL_STM32
|
||||
|
|
|
@ -136,7 +136,7 @@ choice
|
|||
|
||||
config MACH_SUN4I
|
||||
bool "sun4i (Allwinner A10)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select ARM_CORTEX_CPU_IS_UP
|
||||
select DRAM_SUN4I
|
||||
select SUNXI_GEN_SUN4I
|
||||
|
@ -144,7 +144,7 @@ config MACH_SUN4I
|
|||
|
||||
config MACH_SUN5I
|
||||
bool "sun5i (Allwinner A13)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select ARM_CORTEX_CPU_IS_UP
|
||||
select DRAM_SUN4I
|
||||
select SUNXI_GEN_SUN4I
|
||||
|
@ -153,7 +153,7 @@ config MACH_SUN5I
|
|||
|
||||
config MACH_SUN6I
|
||||
bool "sun6i (Allwinner A31)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select CPU_V7_HAS_NONSEC
|
||||
select CPU_V7_HAS_VIRT
|
||||
select ARCH_SUPPORT_PSCI
|
||||
|
@ -166,7 +166,7 @@ config MACH_SUN6I
|
|||
|
||||
config MACH_SUN7I
|
||||
bool "sun7i (Allwinner A20)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select CPU_V7_HAS_NONSEC
|
||||
select CPU_V7_HAS_VIRT
|
||||
select ARCH_SUPPORT_PSCI
|
||||
|
@ -177,7 +177,7 @@ config MACH_SUN7I
|
|||
|
||||
config MACH_SUN8I_A23
|
||||
bool "sun8i (Allwinner A23)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select CPU_V7_HAS_NONSEC
|
||||
select CPU_V7_HAS_VIRT
|
||||
select ARCH_SUPPORT_PSCI
|
||||
|
@ -189,7 +189,7 @@ config MACH_SUN8I_A23
|
|||
|
||||
config MACH_SUN8I_A33
|
||||
bool "sun8i (Allwinner A33)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select CPU_V7_HAS_NONSEC
|
||||
select CPU_V7_HAS_VIRT
|
||||
select ARCH_SUPPORT_PSCI
|
||||
|
@ -201,7 +201,7 @@ config MACH_SUN8I_A33
|
|||
|
||||
config MACH_SUN8I_A83T
|
||||
bool "sun8i (Allwinner A83T)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select DRAM_SUN8I_A83T
|
||||
select SUNXI_GEN_SUN6I
|
||||
select MMC_SUNXI_HAS_NEW_MODE
|
||||
|
@ -209,7 +209,7 @@ config MACH_SUN8I_A83T
|
|||
|
||||
config MACH_SUN8I_H3
|
||||
bool "sun8i (Allwinner H3)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select CPU_V7_HAS_NONSEC
|
||||
select CPU_V7_HAS_VIRT
|
||||
select ARCH_SUPPORT_PSCI
|
||||
|
@ -218,7 +218,7 @@ config MACH_SUN8I_H3
|
|||
|
||||
config MACH_SUN8I_R40
|
||||
bool "sun8i (Allwinner R40)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select CPU_V7_HAS_NONSEC
|
||||
select CPU_V7_HAS_VIRT
|
||||
select ARCH_SUPPORT_PSCI
|
||||
|
@ -229,7 +229,7 @@ config MACH_SUN8I_R40
|
|||
|
||||
config MACH_SUN8I_V3S
|
||||
bool "sun8i (Allwinner V3s)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select CPU_V7_HAS_NONSEC
|
||||
select CPU_V7_HAS_VIRT
|
||||
select ARCH_SUPPORT_PSCI
|
||||
|
@ -241,7 +241,7 @@ config MACH_SUN8I_V3S
|
|||
|
||||
config MACH_SUN9I
|
||||
bool "sun9i (Allwinner A80)"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select DRAM_SUN9I
|
||||
select SUN6I_PRCM
|
||||
select SUNXI_HIGH_SRAM
|
||||
|
|
|
@ -50,7 +50,7 @@ config TEGRA_NO_BPMP
|
|||
|
||||
config TEGRA_ARMV7_COMMON
|
||||
bool "Tegra 32-bit common options"
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select SPL
|
||||
select SPL_BOARD_INIT if SPL
|
||||
select SUPPORT_SPL
|
||||
|
|
|
@ -5,7 +5,7 @@ config SYS_CONFIG_NAME
|
|||
|
||||
config ARCH_UNIPHIER_32BIT
|
||||
bool
|
||||
select CPU_V7
|
||||
select CPU_V7A
|
||||
select CPU_V7_HAS_NONSEC
|
||||
select ARMV7_NONSEC
|
||||
select ARCH_SUPPORT_PSCI
|
||||
|
|
|
@ -31,5 +31,5 @@ obj-y += dram/
|
|||
|
||||
obj-$(CONFIG_DEBUG_UART_UNIPHIER) += debug-uart/
|
||||
|
||||
obj-$(CONFIG_CPU_V7) += arm32/
|
||||
obj-$(CONFIG_CPU_V7A) += arm32/
|
||||
obj-$(CONFIG_ARM64) += arm64/
|
||||
|
|
|
@ -1103,7 +1103,7 @@ config BOOTP_PXE_CLIENTARCH
|
|||
config BOOTP_VCI_STRING
|
||||
string
|
||||
depends on CMD_BOOTP
|
||||
default "U-Boot.armv7" if CPU_V7 || CPU_V7M
|
||||
default "U-Boot.armv7" if CPU_V7A || CPU_V7M
|
||||
default "U-Boot.armv8" if ARM64
|
||||
default "U-Boot.arm" if ARM
|
||||
default "U-Boot"
|
||||
|
|
|
@ -19,7 +19,7 @@
|
|||
#include <dm.h>
|
||||
#include <serial.h>
|
||||
|
||||
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7)
|
||||
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7A)
|
||||
/*
|
||||
* ARMV6 & ARMV7
|
||||
*/
|
||||
|
|
Loading…
Reference in a new issue