Commit graph

853 commits

Author SHA1 Message Date
Rui Miguel Silva
f98457d70a arm: add support to corstone1000 platform
Corstone1000 is a platform from arm, which includes pre
verified Corstone SSE710 sub-system that combines Cortex-A and
Cortex-M processors [0].

This code adds the support for the Cortex-A35 implementation
at host side, it contains also the necessary bits to support
the Corstone 1000 FVP (Fixed Virtual Platform) [1] and also the
FPGA MPS3 board implementation of this platform. [2]

0: https://developer.arm.com/documentation/102360/0000
1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
2: https://developer.arm.com/documentation/dai0550/c/

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-06-22 12:35:15 -04:00
Patrick Delaunay
eae488b779 stm32mp1: fix reference for STMicroelectronics
Replace reference to the correct name STMicroelectronics

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-17 14:12:27 +02:00
Patrick Delaunay
2ff0866b45 configs: stm32mp1: move SUPPORT_SPL in STM32MP15x
The SPL is only supported by STM32MP15x not by all the
SOC with STM32MP arch.
Only TFABOOT is supported in next products.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-06-17 09:58:21 +02:00
William Zhang
f8209d3051 arm: bcmbca: introduce the bcmbca architecture and 47622 SOC
This is the initial support for Broadcom's ARM-based 47622 SOC.

In this change, our first SOC is an armv7 platform called 47622. The
initial support includes a bare-bone implementation and dts with ARM
PL011 uart.

The SOC-specific code resides in arch/arm/mach-bcmbca/<soc> and board
related code is in board/broadcom/bcmba.

The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-06-10 13:37:32 -04:00
Pali Rohár
948da7773e arm: Add new config option ARCH_VERY_EARLY_INIT
When this option is set then ARM _main() function would call
arch_very_early_init() function at the beginning. It would be before
calling any other functions like debug_uart_init() and also before
initializing C runtime environment.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16 11:31:33 +02:00
Jim Liu
84335544ea arm: nuvoton: Add support for Nuvoton NPCM750 BMC
Add basic support for the Nuvoton NPCM750 EVB (Poleg).

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-05-05 09:28:47 -04:00
Mark Kettenis
a609353e82 arm: apple: Point stdout-path to framebuffer when keyboard present
Unless you have a spare Apple Silicon machine, getting access to
the serial port on Apple Silicon machines requires special
hardware. Given that most machines come with a built-in screen
the framebuffer is likely to be the most convenient output device
for most users. While U-Boot will output to both serial and
framebuffer, OSes might not. Therefore set stdout-path to point
at /chosen/framebuffer when a keyboard is connected to the machine.

This behaviour can be overridden by setting the "stdout" variable
in the U-Boot environment. I addition to that keep the serial
console as the default when running under the m1n1 hypervisor.
The m1n1 hypervisor virtualizes the serial port such that it
can be easily accessed from any other machine with a USB port.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Janne Grunau <j@jannau.net>
Tested-by: Janne Grunau <j@jannau.net>
2022-04-22 15:56:39 -04:00
Tom Rini
6e2af641e4 u-boot-imx-20220422
-------------------
 
 - Switch to DM_SERIAL
 - Drop MMCROOT
 - several cleanup
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11815
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Merge tag 'u-boot-imx-20220422' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220422
-------------------

- Switch to DM_SERIAL
- Drop MMCROOT
- several cleanup

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11815
2022-04-22 08:12:20 -04:00
Peng Fan
4e65175ea7 arch: arm: Kconfig: set default COUNTER_FREQUENCY
Set default COUNTER_FREQUENCY according to config header file
under include/configs/
i.MX6UL/ULL/7D/8QM/8QXP all has system counter frequency run at 8MHz,
so set default value for them.
SUNXI/EXYNOS/ROCKCHIP_RK3128/ROCKCHIP_RK3288/ROCKCHIP_RK322X/ROCKCHIP_RK3036
at 24MHz. ARCH_LX2160A at 25MHz
ARCH_ZYNQMP at 100MHz
2022-04-21 14:32:40 -04:00
Peng Fan
bf8c4ced3c arch: arm: move COUNTER_FREQUENCY from versal to arm
Make COUNTER_FREQUENCY usable to armv8 and armv7-a, not limited to
versal. And update help message.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 14:32:40 -04:00
Tom Rini
e50f66e364 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mrvl_uart.sh: Remove script (Pali)
- Fix Espressobin build for configs where ENV is not in SPI (Rogier)
- mvebu: a37xx: Add support for reading OTP (Pali)
- mvebu: uDPU: Ethernet fixes and misc DT and defconfig changes (Robert)
- mvebu: Add support for reading LD0 and LD1 eFuse (Pali)
- kwboot: Replace fstat()+st_size by lseek()+SEEK_END (Pali)
- mvebu: turris_omnia: Enable CONFIG_CMD_FUSE (Pali)
- arm: Add CONFIG_SPL_SYS_NO_VECTOR_TABLE used on 32bit MVEBU (Pali)
- mvebu: a37xx: Add support for writing Security OTP values (Pali)
- mvebu: turris: Misc enhancements and cleanups / fixes (Pali)
- Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet (Tony)
2022-04-21 11:44:54 -04:00
Sean Anderson
1dd56db5e0 treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used
If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-21 09:08:57 -04:00
Marcel Ziswiler
fc102c87c1 board: toradex: drop colibri pxa270 support
The Colibri PXA270 has been end-of-life since quite a while and would
require more and more maintenance (e.g. DM conversions).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-21 12:48:30 +02:00
Pali Rohár
372779abc3 arm: Introduce new CONFIG_SPL_SYS_NO_VECTOR_TABLE option
Move OMAP4 specific option for disabling overwriting vector table into
config option CONFIG_SPL_SYS_NO_VECTOR_TABLE.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-21 12:31:36 +02:00
Gaurav Jain
cb5d0419f5 crypto/fsl: i.MX8: Enable Job ring driver model.
i.MX8(QM/QXP) - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:19:21 +02:00
Gaurav Jain
75d3a9f8fd i.MX7ULP: Enable Job ring driver model.
added crypto node in device tree.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Gaurav Jain
4f1375d4e8 i.MX7: Enable Job ring driver model.
i.MX7D - added support for JR driver model.

removed sec_init() call, sec is initialized based on
job ring information processed from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Gaurav Jain
2cddfcbc75 crypto/fsl: i.MX8M: Enable Job ring driver model.
i.MX8MM/MN/MP/MQ - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Tom Rini
4de720e98d Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
A big part is the DM pinctrl driver, which allows us to get rid of quite
some custom pinmux code and make the whole port much more robust. Many
thanks to Samuel for that nice contribution! There are some more or less
cosmetic warnings about missing clocks right now, I will send the trivial
fixes for that later.
Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0
(secure images) support. Both features are unused at the moment, but I
have an always-secure board that will use that once the DT lands in the
kernel.
On top of those big things we have some smaller fixes, improving the
I2C DM support, fixing some H6/H616 early clock setup and improving the
eMMC boot partition support.

The gitlab CI completed successfully, including the build test for all
161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100
board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
2022-04-05 08:33:32 -04:00
Samuel Holland
b799eabc7e sunxi: pinctrl: Create the driver skeleton
Create a do-nothing driver for each sunxi pin controller variant.

Since only one driver can automatically bind to a DT node, since the
GPIO driver already requires a manual binding process, and since the
pinctrl driver needs access to some of the same information, refactor
the GPIO driver to be bound by the pinctrl driver. This commit should
cause no functional change.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04 23:23:50 +01:00
Sean Anderson
385d69d76b arm: smh: Add option to detect semihosting
These functions are intended to support detecting semihosting and
falling back gracefully to alternative implementations. The test starts
by making semihosting call. SYS_ERRNO is chosen because it should not
mutate any state. If this semihosting call results in an exception
(rather than being caught by the debugger), then the exception handler
should call disable_semihosting() and resume execution after the call.

Ideally, this would just be part of semihosting by default, and not a
separate config. However, to reduce space ARM SPL doesn't include
exception vectors by default. This means we can't detect if a
semihosting call failed unless we enable them. To avoid forcing them to
be enabled, we use a separate config option. It might also be possible
to try and detect whether a debugger has enabled (by reading HDE from
DSCR), but I wasn't able to figure out a way to do this from all ELs.

This patch just introduces the generic code to handle detection. The
next patch will implement it for arm64 (but not arm32).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
8e1c9fe243 spl: Add semihosting boot method
This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.

To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.

I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:

- Implementing DDR initialization through JTAG (typically with dozens of
  lines of TCL) and then loading U-Boot. The DDR initialization
  typically uses hard-coded register writes, and is not easily adapted
  to different boards. BOOT_DEVICE_SMH allows booting with SPL,
  leveraging U-Boot's existing DDR initialization code. This is the
  method used by NXP's CodeWarrior IDE on Layerscape processors (see
  AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
  then loading U-Boot. This is tricky, because the debugger must stop the
  boot after the bootloader has completed its work. Trying to load
  U-Boot too early can cause failure to boot. This is the method used by
  Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
  image to load U-Boot at the appropriate place. This can be a bit
  tricky, because the load address is dependent on the header size. An
  elf with symbols must also be used in order to stop at the appropriate
  point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
  where SPL automatically stops and tells the host where to place the
  image.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Andre Przywara
8a0a8ff52c vexpress64: fvp: add distro_boot support
So far the FVP model just supports booting through semihosting, so by
loading files from the host the model is running on. This allows for
quick booting of new kernels (or replacing DTBs), but prevents more
featureful boots like using UEFI.

Enable the distro_boot feature, and provide a list of possible boot
sources that U-Boot should check:
- For backwards compatibility we start with semihosting, which gets its
  commands migrated from CONFIG_BOOTCOMMAND into the distro_boot
  infrastructure. This is also slightly tweaked to fail graceful in case
  the required files could not be found.
- Next we try to use a user provided script, that could be easily
  placed into memory using the model command line.
- Since we gained virtio support with the enablement of OF_CONTROL,
  let's check virtio block devices next. This is where UEFI boot can
  be easily used, for instance by providing a distro installer .iso
  file through virtio-blk.
- Networking is now provided by virtio as well, so enable the default
  PXE and DHCP boot flows, mostly because we can.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:58:16 -04:00
Andre Przywara
5865038257 vexpress64: move hardware setting from defconfig to Kconfig
The defconfigs for the Arm Juno board and the FVP model are quite large,
setting a lot of platform-fixed variables like SYS_TEXT_BASE.
As those values are not really a user choice, let's provide default
values for them in our Kconfig file, so a lot of cruft can be removed
from the defconfig files.
This also moves the driver selection out of there, since this is again
not something a user should really decide on. Instead we allow users to
enable or disable subsystems, and select the appropriate drivers based
on that in the Kconfig file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:57:46 -04:00
Andre Przywara
c0fce92956 vexpress64: fvp: enable OF_CONTROL
The FVP base model is relying on a DT for Linux operation, so there is
no reason we would need to rely on hardcoded information for U-Boot.
Letting U-Boot use a DT will open up the usage of actual peripherals,
beyond the support for semihosting only.

Enable OF_CONTROL in the Kconfig, and use the latest dts files from
Linux. Depending on whether we use the boot-wrapper or TF-A, there is
already a DTB provided or not, respectively.

To cover the boot-wrapper, we add an arm64 Linux kernel header, which
allows the boot-wrapper to treat U-Boot like a Linux kernel. U-Boot will
find the pointer to the DTB in x0, and will use it.

Even though TF-A carries a DT, at the moment this is not made available
to non-secure world, so to not break users, we use the U-Boot provided
DTB copy in that case. For some reason TF-A puts some DT like structure
at the address x0 is pointing at, but that is very small and doesn't
carry any hardware information. Make the code to ignore those small DTBs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:55:38 -04:00
Andre Przywara
fac7fc43cf vexpress64: Kconfig: move board definitions out of arch/arm
At the moment we define three "VExpress64" boards in arch/arm/Kconfig,
plus have a second Kconfig file in board/armltd/Kconfig.
One of those three boards is actually bogus (TARGET_VEXPRESS64_AEMV8A),
that stanza looks like being forgotten in a previous cleanup.

To remove the clutter from the generic Kconfig file, just define some
ARCH_VEXPRESS64 symbol there, enable some common options, and do the
board/model specific configuration in the board/armltd Kconfig file.

That allows to streamline and fine tune the configuration later, and
to also pull a lot of "non user choices" out of the defconfigs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-01 14:55:38 -04:00
Tom Rini
c6c0e56ff8 keymile: Move sourcing of common Kconfig
The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms.  We cannot however safely source
this file from multiple locations.  This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources).  However, moving some target selection to
one of these files exposes the underlying problem.  Rework things so
that we have this file sourced in arch/Kconfig.

Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-04-01 10:28:46 -04:00
Tom Rini
2abf048ab7 Prepare v2022.04-rc4
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Merge tag 'v2022.04-rc4' into next

Prepare v2022.04-rc4
2022-03-14 17:40:36 -04:00
weichangzheng
b9d0f00a9d arm: add initial support for the Phytium Pomelo Board
This adds platform code and the device tree for the Phytium Pomelo Board.
The initial support comprises the UART and the PCIE.

Signed-off-by: weichangzheng <nicholas_zheng@outlook.com>
2022-03-10 13:57:04 -05:00
Simon Glass
7fe32b3442 event: Convert arch_cpu_init_dm() to use events
Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Andre Przywara
81a46c152a sunxi: Kconfig: Fix up SPI configuration
Commit 7945caf22c ("arm: sunxi: Enable SPI/SPI-FLASH support for A64")
selected CONFIG_SPI by default on all Allwinner A64 boards, even though
only 4 out of the 14 A64 boards have a SPI flash chip. All other SoCs
had to manually select DM_SPI and friends, even though they are a
platform property (the sunxi SPI driver is DM_SPI only).

Clean this up to allow easy selection of SPI flash support in U-Boot
proper, by selecting DM_SPI and DM_SPI_FLASH *if* CONFIG_SPI is
selected, for *all* Allwinner SoCs. This simplifies the defconfig for
two Libretech boards already.

Also remove the forced CONFIG_SPI from the A64 Kconfig, instead let the
four boards which allow SPI booting select this explicitly.

Any board wishing to support SPI flash in U-Boot proper now just defines
CONFIG_SPI and CONFIG_SPI_FLASH_<vendor> in its defconfig, Kconfig takes
care of the rest.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-03-10 17:32:13 +05:30
Philippe Reynes
a241ccdc44 bcm96753ref: add initial support
This add the initial support of the broadcom reference
board bcm96753ref with a bcm6753 SoC.

This board has 1 GB of RAM, 256 MB of flash (nand),
2 USB port, 1 UART, and 4 ethernet ports.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Philippe Reynes
1d5555fae4 bcm6753: add initial support
This add the initial support of the broadcom bcm6753 SoC family.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07 11:36:12 -05:00
Tom Rini
6d21dd313b Convert CONFIG_BOARD_POSTCLK_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_POSTCLK_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03 16:51:19 -05:00
Tom Rini
24b628a8f8 Xilinx changes for v2022.04-rc3
microblaze:
 - Fix exception handler
 
 zynqmp:
 - Show information about secure images
 - DT changes (som u-boot file removal)
 - Fix zynqmp_pm_cfg_obj_convert.py
 - Fix platform boot
 
 xilinx:
 - Fix bootm_size calculation
 - Remove GPIO_EXTRA_HEADER selection
 
 power:
 - Add zynqmp power management driver
 
 scsi:
 - Add phy support to ceva driver
 
 zynq qspi:
 - Fix unaligned accesses and check baudrate setup
 - Add support for spi memory operations
 
 net:
 - Fix 64bit calculation in axi_emac
 
 video:
 - Add missing gpio dependency for seps driver
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Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver
2022-02-21 08:32:02 -05:00
Michal Simek
11381fba99 arm64: zynqmp: Fix debug uart initialization
The commit 0dba45864b ("arm: Init the debug UART") calls
debug_uart_init() from crt0.S but it won't work because SOC is not
configured yet. That's why create board_debug_uart_init() which calls
psu_init() via new psu_uboot_init() earlier before the first access to UART
in SPL. In full U-Boot call psu_uboot_init() only when
CONFIG_ZYNQMP_PSU_INIT_ENABLED is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/878dc2daaa8685346f889989fbfb98b2e44da7fb.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:29 +01:00
Michal Simek
05f0f269b7 ARM: zynq: Fix debug uart initialization
The commit 0dba45864b ("arm: Init the debug UART") calls
debug_uart_init() from crt0.S but it won't work because SOC is not
configured yet. That's why create board_debug_uart_init() which calls
ps7_init() earlier before the first access to UART.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/18e67e02a0c7190839a1ef3a11f3fd6babcf34cc.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:24 +01:00
Michal Simek
753a29522c xilinx: Remove GPIO_EXTRA_HEADER selection
Platform specific headers are empty that's why there is no need to include
them. That's why remove them for Zynq/ZynqMP and Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/625b1be0b813e2b9a5323c0529f9c567bfe13e75.1643960446.git.michal.simek@xilinx.com
2022-02-15 13:06:13 +01:00
Mark Kettenis
7184e2997e spi: apple: Add driver for Apple SPI controller
Add a driver for the SPI controller integrated on Apple SoCs.
This is necessary to support the keyboard on Apple Silicon laopts
since their keyboard uses an Apple-specific HID over SPI protocol.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
2022-02-10 16:44:23 -05:00
Mark Kettenis
81fafbbeba power: domain: apple: Add reset support
The power management controller found on Apple SoCs als provides
a way to reset all devices within a power domain. This is needed
to cleanly shutdown the NVMe controller before we hand over
control to the OS.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-02-10 16:44:23 -05:00
Mark Kettenis
456305ec59 mailbox: apple: Add driver for Apple IOP mailbox
This mailbox driver provides a communication channel with the
Apple IOP controllers found on Apple SoCs.  These IOP controllers
are used to implement various functions such as the System
Manegement Controller (SMC) and NVMe storage.  It allows sending
and receiving a 96-bit message over a single channel.

The header file with the struct used for mailbox messages is taken
straight from Linux.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
2022-02-10 16:44:23 -05:00
Andre Przywara
2564fce7ee sunxi: move Cortex SMPEN setting into start.S
According to their TRMs, Cortex ARMv7 CPUs with SMP support require the
ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB
maintenance operations are done. As we do those things still in start.S,
we need to move the SMPEN bit setting there, too.

This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR
very early in start.S, and moves sunxi boards over to use that instead
of the custom code we had in our board.c file (where it was called
technically too late).

In practice we got away with this so far, because at this point all the
other cores were still in reset, so any broadcasting would have been
ignored anyway. But it is architecturally cleaner to do it early, and
we move a core specific piece of code out of board.c.

This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few
years back, and moves the respective logic into the new Kconfig entry.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-04 00:09:36 +00:00
Mathew McBride
a1d2fd3874 board: traverse: add initial Ten64 support
The Ten64 is a networking-oriented MiniITX board
using the NXP LS1088A SoC.

This patch provides the bare minimum to support
Ten64 boards under U-Boot for distroboot.

Some related drivers have not yet been submitted
and this basic support lacks some of the
opinionated defaults provided by our firmware
distribution.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:04:24 +05:30
Simon Glass
d6b318de2f Convert CONFIG_TIMESTAMP to Kconfig
This converts the following to Kconfig:
   CONFIG_TIMESTAMP

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-21 14:01:34 -05:00
Tom Rini
068415eade Xilinx changes for v2022.04-rc1
gpio:
 - Add modepin driver
 
 net:
 - Save random mac addresses to eth variable
 
 zynqmp gem:
 - Add support for mdio bus DT description
 - Add support for reset and SGMII phy configuration
 - Reduce timeout for MDIO accesses
 
 zynqmp clk:
 - Fix clock handling for gem and usb
 
 phy:
 - Add zynqmp phy/serdes driver
 
 serial:
 - Add one missing compatible string
 
 microblaze:
 - Symbol alignement
 - SPL fixups
 - Code cleanups
 
 zynqmp:
 - Various dt changes, DP pre-reloc, gem resets, gem clocks
 - Switch SOM to shared psu configuration
 - Move dcache handling to firmware driver
 - Workaround gmii2rgmii DT description issue
 - Enable broadcasts again
 - Change firmware enablement logic
 - Small adjustement in firmware driver
 
 versal:
 - Support new mmc@ DT nodes
 - Fix run time variable handling
 - Add missing I2C_PMC ID for power domain
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 IVhJAKCAiNx/joEeFBJ0XgThtJzFhCjdMwCfYKY9Ewz4L0n2I56lDgR3UJroct0=
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Merge tag 'xilinx-for-v2022.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc1

gpio:
- Add modepin driver

net:
- Save random mac addresses to eth variable

zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses

zynqmp clk:
- Fix clock handling for gem and usb

phy:
- Add zynqmp phy/serdes driver

serial:
- Add one missing compatible string

microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups

zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver

versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
2022-01-19 11:43:44 -05:00
Michal Simek
71efd45a5f arm64: zynqmp: Change firmware dependency
In case of mini U-Boot configurations there is no need to enable firmware
driver which just consume space for nothing. That's why add an option to
disable it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d439399160ff3374f2b39f54f7dd70fa8c8bfea0.1642162121.git.michal.simek@xilinx.com
2022-01-19 11:36:11 +01:00
Mark Kettenis
97187d5e37 power: domain: Add Apple pmgr driver
This driver supports power domains for the power management
controller found on Apple SoCs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-17 06:56:01 +09:00
Mark Kettenis
9a8e3736da arm: apple: Use watchdog timer for system reset
Rely on the new watchdog timer driver and the sysreset uclass to
reset the system.  This gets rid of hard-coded addresses and
should work on systems based on the new M1 Pro and M1 Max SoCs
as well.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <sjg@chromium.org>
2022-01-13 06:55:46 +01:00
T Karthik Reddy
3b441cf4e4 zynqmp: gpio: Add support for zynqmp gpio modepin driver
ZynqMP modepin driver has capability to get/set/check status of modepin
gpios. These modepins are accessed using xilinx firmware. In modepin
register, [3:0] bits set direction, [7:4] bits read IO, [11:8] bits
set/clear IO.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2d802d98fd56d95d764532a33e844d935e0cebb3.1635505900.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Tom Rini
440c00de69 Convert CONFIG_SYS_KWD_CONFIG to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_KWD_CONFIG

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:19 -05:00