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board: toradex: drop colibri pxa270 support

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The Colibri PXA270 has been end-of-life since quite a while and would
require more and more maintenance (e.g. DM conversions).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit is contained in:
Marcel Ziswiler 2022-04-13 11:33:32 +02:00 committed by Stefano Babic
parent 2395625209
commit fc102c87c1
9 changed files with 1 additions and 447 deletions
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6
arch/arm/Kconfig
View file

@ -1833,11 +1833,6 @@ config TARGET_TEN64
Support for Traverse Technologies Ten64 board, based
on NXP LS1088A.
config TARGET_COLIBRI_PXA270
bool "Support colibri_pxa270"
select CPU_PXA27X
select GPIO_EXTRA_HEADER
config ARCH_UNIPHIER
bool "Socionext UniPhier SoCs"
select BOARD_LATE_INIT
@ -2301,7 +2296,6 @@ source "board/seeed/npi_imx6ull/Kconfig"
source "board/socionext/developerbox/Kconfig"
source "board/st/stv0991/Kconfig"
source "board/tcl/sl50/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/traverse/ten64/Kconfig"
source "board/variscite/dart_6ul/Kconfig"
source "board/vscom/baltos/Kconfig"

23
board/toradex/colibri_pxa270/Kconfig
View file

@ -1,23 +0,0 @@
if TARGET_COLIBRI_PXA270
config SYS_BOARD
default "colibri_pxa270"
config SYS_VENDOR
default "toradex"
config SYS_CONFIG_NAME
default "colibri_pxa270"
config TDX_CFG_BLOCK
default y
config TDX_HAVE_NOR
default y
config TDX_CFG_BLOCK_OFFSET
default "262144"
source "board/toradex/common/Kconfig"
endif

6
board/toradex/colibri_pxa270/MAINTAINERS
View file

@ -1,6 +0,0 @@
COLIBRI_PXA270 BOARD
M: Marek Vasut <marek.vasut@gmail.com>
S: Maintained
F: board/toradex/colibri_pxa270/
F: include/configs/colibri_pxa270.h
F: configs/colibri_pxa270_defconfig

7
board/toradex/colibri_pxa270/Makefile
View file

@ -1,7 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Toradex Colibri PXA270 Support
#
# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
obj-y := colibri_pxa270.o

153
board/toradex/colibri_pxa270/colibri_pxa270.c
View file

@ -1,153 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Toradex Colibri PXA270 Support
*
* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
* Copyright (C) 2016-2019 Marcel Ziswiler <marcel.ziswiler@toradex.com>
*/
#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <init.h>
#include <net.h>
#include <asm/arch/hardware.h>
#include <asm/arch/pxa.h>
#include <asm/arch/regs-mmc.h>
#include <asm/arch/regs-uart.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <dm/platdata.h>
#include <dm/platform_data/pxa_mmc_gen.h>
#include <dm/platform_data/serial_pxa.h>
#include <netdev.h>
#include <serial.h>
#include <usb.h>
#include <asm/mach-types.h>
#include <linux/delay.h>
#include "../common/tdx-common.h"
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/* We have RAM, disable cache */
dcache_disable();
icache_disable();
/* arch number of Toradex Colibri PXA270 */
gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
/* address of boot parameters */
gd->bd->bi_boot_params = 0xa0000100;
return 0;
}
int checkboard(void)
{
puts("Model: Toradex Colibri PXA270\n");
return 0;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
{
return ft_common_board_setup(blob, bd);
}
#endif
int dram_init(void)
{
pxa2xx_dram_init();
gd->ram_size = PHYS_SDRAM_1_SIZE;
return 0;
}
#ifdef CONFIG_CMD_USB
int board_usb_init(int index, enum usb_init_type init)
{
writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
UHCHR);
writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
while (UHCHR & UHCHR_FSBIR)
;
writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
/* Clear any OTG Pin Hold */
if (readl(PSSR) & PSSR_OTGPH)
writel(readl(PSSR) | PSSR_OTGPH, PSSR);
writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
writel(readl(UHCRHDA) | 0x100, UHCRHDA);
/* Set port power control mask bits, only 3 ports. */
writel(readl(UHCRHDB) | (0x7 << 17), UHCRHDB);
/* enable port 2 */
writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
return 0;
}
int board_usb_cleanup(int index, enum usb_init_type init)
{
return 0;
}
void usb_board_stop(void)
{
writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
udelay(11);
writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
writel(readl(UHCCOMS) | 1, UHCCOMS);
udelay(10);
writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
}
#endif
#ifdef CONFIG_DRIVER_DM9000
int board_eth_init(struct bd_info *bis)
{
return dm9000_initialize(bis);
}
#endif
#ifdef CONFIG_CMD_MMC
#if !CONFIG_IS_ENABLED(DM_MMC)
int board_mmc_init(struct bd_info *bis)
{
pxa_mmc_register(0);
return 0;
}
#else /* !CONFIG_IS_ENABLED(DM_MMC) */
static const struct pxa_mmc_plat mmc_plat = {
.base = (struct pxa_mmc_regs *)MMC0_BASE,
};
U_BOOT_DRVINFO(pxa_mmcs) = {
.name = "pxa_mmc",
.plat = &mmc_plat,
};
#endif /* !CONFIG_IS_ENABLED(DM_MMC) */
#endif
static const struct pxa_serial_plat serial_plat = {
.base = (struct pxa_uart_regs *)FFUART_BASE,
.port = FFUART_INDEX,
.baudrate = CONFIG_BAUDRATE,
};
U_BOOT_DRVINFO(pxa_serials) = {
.name = "serial_pxa",
.plat = &serial_plat,
};

19
board/toradex/common/tdx-cfg-block.c
View file

@ -22,11 +22,6 @@
#else
#define is_cpu_type(cpu) (0)
#endif
#if defined(CONFIG_CPU_PXA27X)
#include <asm/arch-pxa/pxa.h>
#else
#define cpu_is_pxa27x(cpu) (0)
#endif
#include <cli.h>
#include <console.h>
#include <env.h>
@ -369,10 +364,7 @@ static int get_cfgblock_interactive(void)
/* Unknown module by default */
tdx_hw_tag.prodid = 0;
if (cpu_is_pxa27x())
sprintf(message, "Is the module the 312 MHz version? [y/N] ");
else
sprintf(message, "Is the module an IT version? [y/N] ");
sprintf(message, "Is the module an IT version? [y/N] ");
len = cli_readline(message);
it = console_buffer[0];
@ -500,11 +492,6 @@ static int get_cfgblock_interactive(void)
tdx_hw_tag.prodid = COLIBRI_T20_256MB;
else
tdx_hw_tag.prodid = COLIBRI_T20_512MB;
} else if (cpu_is_pxa27x()) {
if (it == 'y' || it == 'Y')
tdx_hw_tag.prodid = COLIBRI_PXA270_312MHZ;
else
tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ;
}
#if defined(CONFIG_TARGET_APALIS_T30) || defined(CONFIG_TARGET_COLIBRI_T30)
else if (!strcmp("tegra30", soc)) {
@ -552,10 +539,6 @@ static int get_cfgblock_interactive(void)
tdx_hw_tag.ver_minor = console_buffer[2] - '0';
tdx_hw_tag.ver_assembly = console_buffer[3] - 'A';
if (cpu_is_pxa27x() && tdx_hw_tag.ver_major == 1)
tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ -
COLIBRI_PXA270_V1_312MHZ);
while (len < 8) {
sprintf(message, "Enter module serial number: ");
len = cli_readline(message);

57
configs/colibri_pxa270_defconfig
View file

@ -1,57 +0,0 @@
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_COLIBRI_PXA270=y
CONFIG_SYS_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x20000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_SYS_LOAD_ADDR=0xa0000000
CONFIG_ENV_ADDR=0x80000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=262144
CONFIG_TIMESTAMP=y
CONFIG_SYS_MONITOR_BASE=0x00000000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if fatload mmc 0 0xa0000000 uImage; then bootm 0xa0000000; fi; if usb reset && fatload usb 0 0xa0000000 uImage; then bootm 0xa0000000; fi; bootm 0xc0000;"
CONFIG_SYS_DEVICE_NULLDEV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_DM=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_DM=y
CONFIG_PXA_MMC_GENERIC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_DRIVER_DM9000=y
CONFIG_DM_SERIAL=y
CONFIG_PXA_SERIAL=y
CONFIG_USB=y
# CONFIG_REGEX is not set
CONFIG_OF_LIBFDT=y

150
include/configs/colibri_pxa270.h
View file

@ -1,150 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Toradex Colibri PXA270 configuration file
*
* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
* Copyright (C) 2015-2016 Marcel Ziswiler <marcel@ziswiler.com>
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Board Configuration Options
*/
/*
* Environment settings
*/
/*
* Serial Console Configuration
*/
/*
* Bootloader Components Configuration
*/
/* I2C support */
#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
#define CONFIG_SYS_I2C_PXA
#define CONFIG_PXA_STD_I2C
#define CONFIG_PXA_PWR_I2C
#endif
/* LCD support */
#ifdef CONFIG_LCD
#define CONFIG_PXA_LCD
#define CONFIG_PXA_VGA
#endif
/*
* Networking Configuration
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_DM9000_BASE 0x08000000
#define DM9000_IO (CONFIG_DM9000_BASE)
#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
#endif
/*
* Clock Configuration
*/
#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
/*
* DRAM Map
*/
#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
/*
* NOR FLASH
*/
#ifdef CONFIG_CMD_FLASH
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
#define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_LOCK_TOUT (25 * CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ)
#endif
#define CONFIG_SYS_MONITOR_LEN 0x40000
/* Skip factory configuration block */
/*
* GPIO settings
*/
#define CONFIG_SYS_GPSR0_VAL 0x00000000
#define CONFIG_SYS_GPSR1_VAL 0x00020000
#define CONFIG_SYS_GPSR2_VAL 0x0002c000
#define CONFIG_SYS_GPSR3_VAL 0x00000000
#define CONFIG_SYS_GPCR0_VAL 0x00000000
#define CONFIG_SYS_GPCR1_VAL 0x00000000
#define CONFIG_SYS_GPCR2_VAL 0x00000000
#define CONFIG_SYS_GPCR3_VAL 0x00000000
#define CONFIG_SYS_GPDR0_VAL 0xc8008000
#define CONFIG_SYS_GPDR1_VAL 0xfc02a981
#define CONFIG_SYS_GPDR2_VAL 0x92c3ffff
#define CONFIG_SYS_GPDR3_VAL 0x0061e804
#define CONFIG_SYS_GAFR0_L_VAL 0x80100000
#define CONFIG_SYS_GAFR0_U_VAL 0xa5c00010
#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50008
#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
#define CONFIG_SYS_GAFR2_U_VAL 0x4109a002
#define CONFIG_SYS_GAFR3_L_VAL 0x54000310
#define CONFIG_SYS_GAFR3_U_VAL 0x00005401
#define CONFIG_SYS_PSSR_VAL 0x30
/*
* Clock settings
*/
#define CONFIG_SYS_CKEN 0x00500240
#define CONFIG_SYS_CCCR 0x02000290
/*
* Memory settings
*/
#define CONFIG_SYS_MSC0_VAL 0x9ee1c5f2
#define CONFIG_SYS_MSC1_VAL 0x9ee1f994
#define CONFIG_SYS_MSC2_VAL 0x9ee19ee1
#define CONFIG_SYS_MDCNFG_VAL 0x090009c9
#define CONFIG_SYS_MDREFR_VAL 0x2003a031
#define CONFIG_SYS_MDMRS_VAL 0x00220022
#define CONFIG_SYS_FLYCNFG_VAL 0x00010001
#define CONFIG_SYS_SXCNFG_VAL 0x40044004
/*
* PCMCIA and CF Interfaces
*/
#define CONFIG_SYS_MECR_VAL 0x00000000
#define CONFIG_SYS_MCMEM0_VAL 0x00028307
#define CONFIG_SYS_MCMEM1_VAL 0x00014307
#define CONFIG_SYS_MCATT0_VAL 0x00038787
#define CONFIG_SYS_MCATT1_VAL 0x0001c787
#define CONFIG_SYS_MCIO0_VAL 0x0002830f
#define CONFIG_SYS_MCIO1_VAL 0x0001430f
#include "pxa-common.h"
#endif /* __CONFIG_H */

27
include/configs/pxa-common.h
View file

@ -1,27 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Toradex Colibri PXA270 configuration file
*
* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
*/
#ifndef __CONFIG_PXA_COMMON_H__
#define __CONFIG_PXA_COMMON_H__
/*
* OHCI USB
*/
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_BOARD_INIT
#ifdef CONFIG_CPU_PXA27X
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
#else
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#endif
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4c000000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "pxa-ohci"
#endif
#endif /* __CONFIG_PXA_COMMON_H__ */