Commit graph

13925 commits

Author SHA1 Message Date
Bin Meng
bc728b1bc0 x86: irq: Remove chipset specific irq router drivers
At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.

Now we remove these specific drivers and make all x86 boards use
the common one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
0a6fb5b577 x86: cougarcanyon2: Enable CPU driver and SMP support
This enables the 206ax cpu driver on Intel Cougar Canyon 2 board,
so that SMP can be supported too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
8407f5fcdc x86: chromebook_link: Remove dm-pre-reloc property in the cpu nodes
The 206ax cpu driver does not require pre-relocation flag to work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
a8542ad81f x86: ivybridge: Drop CONFIG_USBDEBUG
This is not used anywhere. Clean this up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
7d0bc172e5 x86: ivybridge: Enable 206ax cpu driver for FSP build
At present this 206ax cpu driver is only built when FSP is not used.
This updates the Makefile to enable the build for both cases.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
80abc8165e x86: cougarcanyon2: Update dts for SPI lock down
It turns out that like Braswell, Intel FSP for IvyBridge requires
SPI controller settings to be locked down, as the U-Boot ICH SPI
driver fails with the following message on Cougar Canyon 2 board:

  "ICH SPI: Opcode 9f not found"

Update the SPI node property to indicate this fact.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
b173b4ea34 x86: ivybridge: Imply USB_XHCI_HCD
The Panther Point chipset connected to Ivybridge has xHC integrated,
imply it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
341dda352d x86: baytrail: Correct the comment of IACORE_VIDS bit ranges
The guaranteed vid bit ranges in IACORE_VIDS MSR is actually
[22:16]. This corrects the comment for it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Tom Rini
7868909ed5 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-06-12 13:25:24 -04:00
Dennis Gilmore
ae28a5f830 arm: mvebu: Add Helios4 Armada 38x initial support
The helios4 is built on the SolidRun Armada 38x SOM.
The port os based on the ClearFog board, using information from
https://github.com/helios-4/u-boot-marvell as well as dtb input
from https://github.com/helios-4/linux-marvell

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-12 13:17:19 +02:00
Vinitha V Pillai
2d91b53331 LS1012AFRWY: Add Secure Boot support
Added the following:
1. defconfig for LS1012AFRWY Secure boot
2. PfE Validation support

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-11 12:34:45 -07:00
Bhaskar Upadhaya
9629ccdde7 board: ls1012a: FRWY-LS1012A board support
FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE
MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
[yorks: rebase and fix SPDX tag]
[yorks: fix board/freescale/ls1012afrdm/Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-11 12:34:45 -07:00
Bhaskar Upadhaya
7191d45348 board: Kconfig: Re-Arrangement of PPA firmware and header addresses
PPA firmware and header address may vary depending upon different
boards, configure ppa firmware and header address in board specific
Kconfig.

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08 16:43:19 -07:00
Mans Rullgard
66a00be287 ARM: orion5x: fix use of callee-saved registers in lowloevel_init
The lowlevel_init function uses r4 and r6 without preserving their
values as required by the AAPCS.  Use r0 and r2 instead as these
are call-clobbered.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
2018-06-07 09:12:26 -04:00
Tom Rini
3eceff642c Merge branch 'master' of git://git.denx.de/u-boot-samsung 2018-06-06 09:08:16 -04:00
Patrice Chotard
6b6255cd8a mach-stm32: Enable SPL_RESET_SUPPORT flag
Since commit 0e373c0ade ("spl: add SPL_RESET_SUPPORT"),
reset is supported in SPL, enable this flag for STM32F SoCs family.

This allows to remove a specific case in RCC mfd driver.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-06-05 20:19:09 -04:00
Chris Packham
87a62bce28 ARM: add SBx81LIFKW board
This is a series of line cards for Allied Telesis's SBx8100 chassis
switch. The CPU block is common to the SBx81GS24a, SBx81XS6, SBx81XS16
and SBx81GT40 cards collectively referred to as SBx81LIFKW in u-boot.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Chris Packham
2c3c6bc6fb ARM: kirkwood: remove automatic I2C config if DM_I2C is enabled
The mach/config.h file would helpfully define CONFIG_SYS_I2C and
CONFIG_SYS_I2C_MVTWSI if CONFIG_CMD_I2C was defined by the board. This
conflicts with the way DM_I2C works. As a transitional measure don't
automatically define these if CONFIG_DM_I2C is defined. It should be
possible to remove this once all kirkwood boards are migrated to DM.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Michael Walle
134a6b6884 arm: kirkwood: lsxl: Add SPI driver model support
This patch shows how to enable driver model support for the LS-CHLv2 and
LS-XHL boards.

There are a couple of open questions:
 - do I need the u-boot,dm-pre-reloc tags in the device tree?
 - should mach/config.h define CONFIG_DM_SEQ_ALIAS?
 - how can we split this patch or are there any other pending patches
   which does the same and I didn't catch these.

This patch is based on the http://git.denx.de/u-boot-marvell.git (master
branch) and needs the following patches, which are still pending:
  https://patchwork.ozlabs.org/patch/909618/
  https://patchwork.ozlabs.org/patch/909617/
  https://patchwork.ozlabs.org/patch/909973/

Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Jon Nettleton
4ea813d333 arm: mvebu: switch clearfog to use device-tree i2c and gpio
This switches the clearfog boards to use DM based gpio and i2c
drivers.  The io expanders are configured via their device-tree
entries.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: add DT i2c aliases]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:29:09 +02:00
Rabeeh Khoury
28be54dc59 mvebu: a38x: Force receiver detected on PCIe lanes
Some QCA988x based modules presence is not detected by the SERDES lanes,
so force this detection which will trigger the LTSSM state machine to
negotiate link.

An example of such a card is WLE900VX.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-05 07:25:42 +02:00
Ramon Fried
77e0ecdb4a db410c: Added pre-relocation attribute to pinctrl
u-boot,dm-pre-reloc was missing from pinctrl and it's
children node. causing failure to configure pin mux
before relocation.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-04 11:25:30 -04:00
Tom Rini
809e0e398a Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-06-04 08:55:00 -04:00
Jagan Teki
2e8dbe14e7 board: sun50i: Add Amarula A64-Relic initial support
Amarula A64-Relic is A64 based IoT device, which support
- Allwinner A64 Cortex-A53
- Mali-400MP2 GPU
- AXP803 PMIC
- 1GB DDR3 RAM
- 8GB eMMC
- AP6330 Wifi/BLE
- MIPI-DSI
- CSI: OV5640 sensor
- USB OTG
- 12V DC power supply

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-06-04 18:09:25 +05:30
Tom Rini
b5351a4390 SPDX: Fixup tags from latest EFI PR
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-03 16:10:22 -04:00
Simon Glass
329da4850c Define board_quiesce_devices() in a shared location
This undocumented function relies on arch-specific code to declare a nop
weak version. Add the weak function in common code instead to avoid having
to duplicate the same function in each arch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Simon Glass
bb223b7f20 efi: sandbox: Add required linker sections
The EFI loader code requires certain linker sections to exist. Add these
for sandbox so that the EFI loader code will link.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Simon Glass
30eef21fa0 sandbox: Add a setjmp() implementation
Add an implementation of setjmp() and longjmp() which rely on the
underlying host C library. Since we cannot know how large the jump buffer
needs to be, pick something that should be suitable and check it at
runtime. At present we need access to the underlying struct as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
78f90aaeec arm: armv7: allow unaligned memory access
The UEFI spec mandates that unaligned memory access should be enabled if
supported by the CPU architecture.

This patch implements the function unaligned_access() to reset the aligned
access flag in the system control register (SCTLR). It is called when the
bootefi command is invoked.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix SPDX identifier]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Heinrich Schuchardt
f2560e2dea efi_loader: build CRT0 and RELOC on x86_64
The efi selftest and the hello application require CRT0 and RELOC to be
built.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Heinrich Schuchardt
508d856704 efi_selftest: allow building relocation code on x86_64
Variables EFI_RELOC and EFI_CRT0 have to be defined to build the
EFI unit tests. This patch ensures this for the x86 architecure.

If we compile with EFI_STUB, the bitness depends on CONFIG_EFI_STUB_64BIT.
Otherwise the bitness depends on CONFIG_X86_64.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:20 +02:00
Tom Rini
040b2583c3 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-06-02 16:58:27 -04:00
Tom Rini
582d97b6d3 Xilinx changes for v2018.07 second pull
zynqmp:
 - Show reset reason
 - Remove emulation platform
 - Update pmufw version
 - Simplify mmc bootmode
 - Remove dc2 useless configuration file
 - Cleanup mini config
 - Defconfig syncup
 - zcu100, zcu104 and zcu111 dts fixes
 
 xilinx:
 - Use live-tree functions in some drivers
 - Add support for Avnet Minized and Antminer S9
 
 fpga:
 - Add secure bitstream loading support
 
 mmc:
 - Add hs200 mode support
 
 usb xhci:
 - Header fix
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlsRRy4ACgkQykllyylKDCEovgCdGWsr4XFQfDZxCEMmsg2vyJF2
 0egAnj6Td1k6yTzQPDXwCtExZJfS/vgl
 =QxUz
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2018.07-2' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07 second pull

zynqmp:
- Show reset reason
- Remove emulation platform
- Update pmufw version
- Simplify mmc bootmode
- Remove dc2 useless configuration file
- Cleanup mini config
- Defconfig syncup
- zcu100, zcu104 and zcu111 dts fixes

xilinx:
- Use live-tree functions in some drivers
- Add support for Avnet Minized and Antminer S9

fpga:
- Add secure bitstream loading support

mmc:
- Add hs200 mode support

usb xhci:
- Header fix
2018-06-01 13:50:15 -04:00
Tom Rini
caa2a2e5ab Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-06-01 09:52:15 -04:00
Siva Durga Prasad Paladugu
a18d09ea38 fpga: zynqmp: Add secure bitstream loading for ZynqMP
This patch adds support for loading secure bitstreams on ZynqMP
platforms. The secure bitstream images has to be generated using
Xilinx bootgen tool.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-01 11:37:31 +02:00
Marek Vasut
0bb5d24852 ARM: dts: rmobile: Sync R8A77990 Ebisu DTS with Linux
Import the R8A77990 and Ebisu DTS from linux-next to get the latest
version. This makes AVB ethernet work in U-Boot since the ethernet
node is now present in DT, as well as GPIOs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:22 +02:00
Marek Vasut
63e22517a3 ARM: renesas: Add R8A77990 E3 Ebisu board
Add support for the R8A77990 Ebisu board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:21 +02:00
Takeshi Kihara
031fa18f70 ARM: dts: rmobile: Add Renesas Ebisu board support
Basic support for the Renesas Ebisu board based on R-Car E3:
  - Memory,
  - Main crystal,
  - Serial console,

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[shimoda: rebase and add SPDX-License-Identifier]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Yoshihiro Shimoda
19df5959d0 ARM: dts: rmobile: Add Renesas R8A77990 SoC support
This patch adds basic support for the Renesas R-Car E3 (R8A77990) SoC:
  - PSCI
  - CPU (single)
  - Cache controller
  - Main clocks and controller
  - Interrupt controller
  - Timer
  - PMU
  - Reset controller
  - Product register
  - System controller
  - UART for console

Inspried by a patch by Takeshi Kihara in the BSP.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Marek Vasut
a0410a6ff2 ARM: renesas: Add R8A77990 E3 SoC ID
Add ID and Kconfig entry for the Renesas R8A77990 E3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Tom Rini
c90c43cda8 Merge tag 'arc-updates-for-2018.07-rc1' of git://git.denx.de/u-boot-arc
Here we do a couple of minor fixes like:
 - Move .ivt section to the very beginning of the image
   by default which allows us to use that image put right
   at reset vector (usually 0x0)

 - Improve relocation fix-up which became required once
   we moved .ivt and understood a problem with existing implementation
   where we relied on a particular placement of sections.
   Now we don't care about placement because we just explicitly
   check for .text and in case of ARCompact .ivt sections

 - Re-implemnt do_reset() such that it calls reset_cpu() which
   could implmented for a particular board

And hte most important part we introduce support for yet another
devboard from Synopsys - EMDK.
2018-05-31 14:17:36 -04:00
Alexey Brodkin
2c3f9261c8 ARC: Add support for EM Development Kit board
Synopsys DesignWare ARC EM Development Kit (ARC EMDK) is
an FPGA-based development platform from Synopsys aimed to speed-up
development of software for ARC EM cores and entire subsystems based on
ARC EM like Data Fusion, Secure and Sensor & Control subsystems.

U-Boot is supposed to be used as a primary bootloader on EMDK allowing
users to easily load and start their application from micro-SD card.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
7af51f12bc ARC: Use elf32-bigarc in case of -EB
As it is stated in LD manual [1] the second entry in OUTPUT_FORMAT
corresponds to "-EB" command-line option which for us is "elf32-bigarc".

[1] https://sourceware.org/binutils/docs/ld/Format-Commands.html#Format-Commands

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
eb5c853938 ARC: Reset: Implement weak reset_cpu()
This will allow for board-specific implementation of reset.
Default version will just stop execution with help of BRK instruction.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
8f187142e5 ARC: Reset: Use __builtin_arc_brk() instead of open-coded ASM
For quite some time we have a GCC's built-in which inserts BRK
instruction so let's use it instead of simple insertion of in-line
assembly.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
ef2cd492ad ARC: Move .ivt section to the very beginning of the image
This is useful for cases when U-Boot image is put in ROM and
reset vector points to 0 where the very beginnign of the image reside.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
ce3071287e ARC: Improve relocation fix-ups
We used to have the one and only linker script for all ARC boards
and so we relied on a particular order of symbols there.

Because of that we used __ivt_end as the marker of the end of all the
code which won't be true any longer if we move .ivt section to any other
place. That said we'd better check for each section separately.

A couple of other improvements:
 1. There's no point to include the marker of section end in interested
    range because its address is beyond the section, i.e. we should
    compare with "<" but not "<=".

 2. .ivt section for ARCv2 cores is just an array of 32-bit ints and
    they are not swapped even on little-endia cores while in case of
    ARCompact cores .ivt contains valid code so swapping is required.

 3. Just in case add check for ARC600 which is also ARCompact
    and its .ivt is normal code.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
7530bb2175 ARC: Make sure .ivt section is not purged by garbage collector
Fixes commit fac4790491 ("arc: Eliminate unused code and data with GCC's garbage collector"),
see [1].

Since in case of ARCv2 .ivt only contains addrresses of
interrupt/exception handlers linker doesn't understand that this section
actually make a lot of sense and decides to get rid of it if we use
"--gc-sections".

And KEEP does exactly this, see [2].

[1] http://git.denx.de/?p=u-boot.git;a=commit;h=fac4790491f69b29755d92db2cad508849573ff7
[2] https://sourceware.org/binutils/docs/ld/Input-Section-Keep.html#Input-Section-Keep

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
d0a5023a35 ARC: Cache: Don't compare I$ and D$ line lengths
We don't care much about I$ line length really as there're
no per-line ops on I$ instead we only do full invalidation of it
on occasion of relocation and right before jumping to the OS.

Also as compared to Linux kernel where we don't support different
lengths of I$ and D$ lines in U-Boot we have to deal with such an
exotic configs if the target board is not supposed to run Linux kernel.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Eugeniu Rosca
507cef3d15 test: dm: Fix wrong aliases property names
After importing v4.17-rc1 Linux commit 9130ba884640 ("scripts/dtc:
Update to upstream version v1.4.6-9-gaadd0b65c987"), sandbox build
reports below warnings:

arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'

Silent them by applying the 's/_/-/' substitution in the names of the
'fdt_dummy0', 'fdt_dummy1', 'fdt_dummy2', 'fdt_dummy3' properties.

Similar DTC warnings have been recently fixed in Linux kernel, e.g. via
v4.17-rc1 commit d366c30d19f4 ("ARM: dts: STi: Fix aliases property name
for STi boards").

If done alone, the DTS update generates a failure of the
`ut dm fdt_translation` unit test in sandbox environment as seen below:

$ ./u-boot -d arch/sandbox/dts/test.dtb
---<-snip->---
=> ut dm fdt_translation
Test: dm_test_fdt_translation: test-fdt.c
test/dm/test-fdt.c:444, dm_test_fdt_translation(): 0 == uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, 1, &dev): Expected 0, got -19
Test: dm_test_fdt_translation: test-fdt.c (flat tree)
test/dm/test-fdt.c:444, dm_test_fdt_translation(): 0 == uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, 1, &dev): Expected 0, got -19
Failures: 2
---<-snip->---

Fix this issue in place, by updating the "name" string in the
UCLASS_DRIVER(fdt_dummy) definition, so that it matches the newly
updated aliases properties. After that, the test passes:

$ ./u-boot -d arch/sandbox/dts/test.dtb
---<-snip->---
=> ut dm fdt_translation
Test: dm_test_fdt_translation: test-fdt.c
Test: dm_test_fdt_translation: test-fdt.c (flat tree)
Failures: 0
---<-snip->---

Fixes: e8d5291824 ("core: ofnode: Fix translation for #size-cells == 0")
Reported-by: Petr Vorel <pvorel@suse.cz>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-31 08:53:11 -04:00