Recent patches adding FSL_PMIC_I2C_LENGTH require
that the PMIC model is defined.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
mx25pdk has a Ethernet port that is connected to its internal FEC controller.
In order to power up the Ethernet PHY (DP83640) it is necessary to communicate
with the MC34704 PMIC via I2C.
Make the FEC ethernet port functional
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
imx-regs.h is meant to contain SoC register definitions.
Common SoC funtions should go to sys_proto.h instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Introduce FSL_PMIC_I2C_LENGTH to configure the number of bytes that are used to
communicate with the PMIC via I2C.
Instead of hardcoding the value, pass the number via a configurable option per
PMIC type.
This will be useful for adding support for PMIC MC34704 from Freescale, which
uses only one byte in its I2C protocol.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
mx25pdk has a SD/MMC slot connected to esdhc1.
Add support for it and allow the environment variables to be saved into SD/MMC.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
It is necessary to include CONFIG_MX25 as several i.mx drivers handle the SoC
differences based on the this config option.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The woodburn board is based on the MX35 SOC.
Support for both external (NOR) and internal
(SD Card) boot mode are added. It uses the
generic SPL framework to implement the internal boot
mode.
The following peripherals are supported:
- Ethernet (FEC)
- SD Card
- NAND (512 MB)
- NOR Flash
In the internal boot mode, a simple imximage header
is generated to set the address in internal RAM
where the SOC must copy the SPL code. The initial setup
is then demanded to the SPL itself.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The patch adds SPL for the arm1136 architecture and
inserts SPL (the produced binary) to clobber target
in the main Makefile.
Signed-off-by: Stefano Babic <sbabic@denx.de>
This patch modifies start.S for the arm1136 to make it
conform to start.S in armv7 architecture, to make it
usable if the SPL framework is used.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Patch fix warnings compiling with ELDK-4.2:
clock.c: In function 'get_standard_pll_sel_clk':
clock.c:341: warning: 'freq' may be used uninitialized in this function
Reported-by : Marek Vasut <marex@denx.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
When later we change to variable length
header, we won't know the file size when
set_imx_hdr is called. So this is prep work.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the
same check. Move check to before the set_imx_hdr call.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Before the len was checked after the entire file
was processed, so it could have already overflowed.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Add the software workaround for ARM erratum ID 468414.
According to mx53/mx51 errata document:
"ENGcm11133 - ARM: NEON load data can be incorrectly forwarded to a
subsequent request
Description:
Under very specific set of conditions, data from a Neon load request can be incorrectly forwarded
to a subsequent, unrelated memory request.
The conditions are as follows:
• Neon loads and stores must be in use
• Neon L1 caching must be disabled
• Trustzone must be configured and in use
• The secure memory address space and the non-secure memory address space both use the same
physical addresses, either as an alias or the same memory location or for separate memory
locations
The issue is reported by ARM, erratum ID 468414, Category 2"
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The recent U-Boot version 2012.07 has improved drivers
(e.g. MMC and network/FEC) regarding DCache handling.
So it should be safe to use the DCache on the i.MX6, now.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz.
Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz
instead.
Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI
at 1080p because the IPU clock cannot reach the requested frequency.
Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its
maximum frequency.
Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little
bit to allow easier comparison with the original clock setup from FSL U-boot.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
init_clock is currently shared between mx51 and mx53 and it contains lots of
ifdef's which makes it really hard to follow the code.
Split the init_clock between mx51 and mx53 to allow easier readability.
No functional changes are made.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Adds support for HDMI, two LVDS panels and one RGB panel to
the SABRE-Lite board.
Displays supported:
HDMI - 1024 x 768 for maximum compatibility
Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480)
Since the ipuv3_fb display driver currently supports only a single display,
this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect
or the I2C touch controller of the LVDS and RGB displays in the priority
listed above.
Setting 'panel' environment variable to one of the names above will
override auto-detection.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
The kernel from Freescale expects that the bootloader passes the board revision.
Read the board revision and pass it via get_board_rev().
Without passing the board revision the kernel does not operate properly as the
initialization of peripherals are different in revA versus revB boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we
move this to the board configuration file.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
Each eSDHC instance has a dedicated clock.
gd->sdhc_clk must also be set accordingly. This is good for the case only a
single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A
future patch will fix the multi-instance use case (initialization made directly
with fsl_esdhc_initialize()).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Clean up mx35 lowlevel_init:
- Indent with tabs.
- Fix comments.
- Use defined values instead of literal constants.
- Use defined macros instead of duplicating code.
- Use macro parameters with default values instead of #define'd configs.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
