Make a note of where coreboot installed the SMBIOS tables so that we can
pass this on to EFI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Remember where these end up so that we can pass this information on to
the EFI layer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When turning off CAR, set the flag to make sure that nothing tries to use
driver model in SPL before jumping to U-Bot proper, since its tables are
in CAR.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The current condition does not handle the samus_tpl case where it sets
up the RAM in SPL but needs to commit the MTRRs in U-Boot proper.
Add another case to handle this and update the comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Make this depend on whether the address matches the offset, rather than
a particular board build. For samus_tpl we don't need to copy, for
example.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Each board has its own way of creating this table. Rather than calling the
acpi_create_fadt() function for each one from a common acpi_write_fadt()
function, just move the writer into the board-specific code.
Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Convert this to use events instead of calling a function directly in the
init sequence.
Rename it to arch_fsp_init_f() to distinguish it from the one that happens
after relocation.
For FSPv2 nothing needs to be done here, so drop the empty function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Very few of the existing event-spy records use the arguments they are
passed. Update them to use a simple spy instead, to simplify the code.
Where an adaptor function is currently used, remove it where possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide an option to dump this information if available.
Move the funciion prototype to the common x86 header. Allow the command
line to be left out since 'bootflow info' show this itself and it is
not in the correct place in memory until the kernel is actually booted.
Fix a badly aligned heading while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is needed for this file, so include it here explicitly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is only used in one file and the value is the same for both boards
which define it. Use the fixed value of 32KB and drop the CFG. This will
allow removal of the config.h files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is copying beyond the end of the destination buffer. Correct the code
by using the size of the vesa_mode_info struct. We don't need to copy the
rest of the bytes in the buffer.
This long-standing bug prevents virtio bootdevs working correctly on
qemu-x86 at present.
Fixes: 0ca2426bea ("x86: Add support for running option ROMs natively")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64
Call the hardware-init function from QEMU from SPL. This allows the
video BIOS to operate correctly.
Create an x86-wide qemu.h header to avoid having to #ifdef the header
in spl.c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64
Now all linker symbols are declared as type char[]. Though we can
reference the address via both the array name 'var' and its address
'&var'. It's better to unify them to avoid confusing developers.
This patch converts all '&var' linker symbol refrences to the most
commonly used format 'var'.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Show the number of records in the table and the total table size in
bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:
- mtrr_commit() will re-initialize all MTRR registers from index 0,
using the settings previously added by mtrr_add_request() and saved
in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
has full control with MTRR programming (e.g.: U-Boot without any blob
that does all low-level initialization on its own, or using FSP2 which
does not touch MTRR), but this is not the case with FSP. FSP programs
some MTRRs during its execution but U-Boot does not have the settings
saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
corrupt what was already programmed previously.
Correct this to use mtrr_set_next_var() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper
needs to program MTRRs too. With current testing logic of mtrr
commit in init_cache_f_r(), the mtrr commit is skipped which won't
work as the queued mtrr requests include setup for DRAM regions.
Change the logic to allow such configuration.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tweak to put back CONFIG_FSP_VERSION2 at top:
Signed-off-by: Simon Glass <sjg@chromium.org>
Some boards need to access GPIOs to determine which SDRAM is fitted to the
board, for example chromebook_link. Probe this device (if it exists) to
make sure that this works as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Move from using debug() to log_debug() so that we don't have to use the
__func__ parameter and can access other logging features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The ACPI tables are special in that they are passed to EFI as a separate
piece, independent of other tables.
Also they can be spread over two areas of memory, e.g. with QEMU we end
up with tables kept in high memory as well.
Add new global_data fields to hold this information and update the bdinfo
command to show the table areas.
Move the rom_table_end variable into the loop that uses it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The implementation of write_tables() is confusing because it uses the
rom_table_start variable as the address pointer as it progresses.
Rename it to rom_addr to make the code clearer. Move the rom_table_end
variable into the block where it is used.
Also update logging to use the ACPI category, now that it is available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When global_data is relocated, log_head moves in memory, meaning that
the items in that list point to the wrong place.
Disable logging when making the change, then reenable it afterwards, so
that logging works normally.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When video is required in SPL, set this up ready for use. Ignore any
problems since it may be that video is not actually available and we
still want to continue on to U-Boot proper in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Print the banner in SPL init only if the spl_board_init() function isn't
enabled. The spl_board_init() function is in the same file, but is called
later, by board_init_r().
This avoids printing two banners, which causes tests to fail.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With qemu-x86_64 we need to run the video BIOS while in 32-bit mode, i.e.
SPL. Add a Kconfig option for this, adjust the Makefile rules and use
CONFIG_IS_ENABLED() where needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Rather than silently hanging, show an error first. This can happen when
there is something wrong with the video BIOS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use an assembler implementation as is done for i386, so that the results
are equivalent for i386 and x86_64.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is useful information so show it with the bdinfo command.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Move MTRR-listing code into a common file so it can be used from SPL.
Update the 'mtrr' command to call it.
Use this in SPL just before adjusting the MTRRs, so we can see the state
set up by the board. Only show it when debug is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Allow reading the command line from a zimage, so that it can be recorded
in the bootflow.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a direct interface to booting a zimage, so that bootstd can call it
without going through the command-line interface.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't need to commit the SPI-flash MTRR change immediately, since it is
now done in the board_init_f_r(). Also this causes chromebook_link64 to
hang, presumably since we are still running from CAR (Cache-as-RAM) in
SPL. Coral handles this OK, perhaps since it is running from a different
memory area, but it has no effect on Coral anyway.
Drop the extra mtrr_commit() in the SPL implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function is used by U-Boot proper. It does not set up MTRRs when SPL
is enabled, but we do want this done when it is called from SPL. In fact
it is confusing to use the same function from SPL, since there are quite
a few conditions there.
All init_cache_f_r() really does is commit the MTRRs and set up the cache.
Do this in the SPL's version of this function instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the binman symbols for this, to avoid hard-coding the value. We could
use CONFIG_X86_OFFSET_U_BOOT for the address, but it seems better to
obtain the offset and size through the same mechanism.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Show the area of memory cleared for BSS, when debugging is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
SPL printf() does not normally support %#x so just use %x instead. Hex is
expected in U-Boot anyway.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For now, just enable the fast-but-large string functions in 32-boot
U-Boot proper only. Avoid using them in SPL. We cannot use then in 64-bit
builds since we only have 32-bit assembly.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
The original function was only called once, before relocation. The new
one is called again after relocation. This was not the intent of the
original call. Fix this by renaming and updating the calling logic.
With this, chromebook_link64 makes it through SPL.
Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Sometimes coreboot adds new tags that U-Boot does not know about. These
are silently ignored, but it is useful to at least know what we are
missing.
Add a way to collect this information. For Brya it shows:
Unimpl. 38 41 37 34 42 40
These are:
LB_TAG_PLATFORM_BLOB_VERSION
LB_TAG_ACPI_CNVS
LB_TAG_FMAP
LB_TAG_VBOOT_WORKBUF
LB_TAG_TYPE_C_INFO
LB_TAG_BOARD_CONFIG
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
At present any ACPI tables created by prior-stage firmware are ignored.
It is useful to be able to view these in U-Boot.
Pick this up from the sysinfo tables and display it with the cbsysinfo
command. This allows the 'acpi list' command to work when booting from
coreboot.
Adjust the global_data condition so that acpi_start is available even if
table-generation is disabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
When running the EFI app, we need to exit boot services before jumping
to Linux.
At some point it may be possible to jump to Linux and pass on the system
table, and:
* install the device-tree as configuration table
* use LoadImage() to load the kernel image (e.g. from memory)
* start the image with StartImage()
This should allow the Linux efistub to be used. For now, this is not
implemented.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add the missing code to handle this. For a 64-bit kernel the entry
address is 0x200 bytes after the normal entry.
Rename the parameter to boot_linux_kernel() accordingly. Update the
comments to indicate that these are addresses, not pointers.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current vesa structure only provides a 32-bit value for the frame
buffer. Many modern machines use an address outside the range.
It is still useful to have this common struct, but add a separate
frame-buffer address as well.
Add a comment for vesa_setup_video_priv() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
