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x86: coreboot: Collect the address of the ACPI tables

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At present any ACPI tables created by prior-stage firmware are ignored.
It is useful to be able to view these in U-Boot.

Pick this up from the sysinfo tables and display it with the cbsysinfo
command. This allows the 'acpi list' command to work when booting from
coreboot.

Adjust the global_data condition so that acpi_start is available even if
table-generation is disabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass 2023-05-04 16:54:59 -06:00 committed by Bin Meng
parent 37bf44073b
commit 368fd56466
5 changed files with 18 additions and 2 deletions
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2
arch/x86/include/asm/cb_sysinfo.h
View file

@ -133,6 +133,7 @@
* @mtc_size: Size of MTC region
* @chromeos_vpd: Chromium OS Vital Product Data region, typically NULL, meaning
* not used
* @rsdp: Pointer to ACPI RSDP table
*/
struct sysinfo_t {
unsigned int cpu_khz;
@ -211,6 +212,7 @@ struct sysinfo_t {
u64 mtc_start;
u32 mtc_size;
void *chromeos_vpd;
void *rsdp;
};
extern struct sysinfo_t lib_sysinfo;

2
arch/x86/include/asm/coreboot_tables.h
View file

@ -422,6 +422,8 @@ struct cb_tsc_info {
#define CB_TAG_SERIALNO 0x002a
#define CB_MAX_SERIALNO_LENGTH 32
#define CB_TAG_ACPI_RSDP 0x0043
#define CB_TAG_CMOS_OPTION_TABLE 0x00c8
struct cb_cmos_option_table {

11
arch/x86/lib/coreboot/cb_sysinfo.c
View file

@ -264,6 +264,13 @@ static void cb_parse_mrc_cache(void *ptr, struct sysinfo_t *info)
info->mrc_cache = map_sysmem(cbmem->cbmem_tab, 0);
}
static void cb_parse_acpi_rsdp(void *ptr, struct sysinfo_t *info)
{
struct cb_cbmem_tab *const cbmem = (struct cb_cbmem_tab *)ptr;
info->rsdp = map_sysmem(cbmem->cbmem_tab, 0);
}
__weak void cb_parse_unhandled(u32 tag, unsigned char *ptr)
{
}
@ -428,6 +435,9 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
case CB_TAG_MRC_CACHE:
cb_parse_mrc_cache(rec, info);
break;
case CB_TAG_ACPI_RSDP:
cb_parse_acpi_rsdp(rec, info);
break;
default:
cb_parse_unhandled(rec->tag, ptr);
break;
@ -454,6 +464,7 @@ int get_coreboot_info(struct sysinfo_t *info)
if (!ret)
return -ENOENT;
gd->arch.coreboot_table = addr;
gd_set_acpi_start(map_to_sysmem(info->rsdp));
gd->flags |= GD_FLG_SKIP_LL_INIT;
return 0;

1
cmd/x86/cbsysinfo.c
View file

@ -363,6 +363,7 @@ static void show_table(struct sysinfo_t *info, bool verbose)
print_hex("MTC size", info->mtc_size);
print_ptr("Chrome OS VPD", info->chromeos_vpd);
print_ptr("RSDP", info->rsdp);
}
static int do_cbsysinfo(struct cmd_tbl *cmdtp, int flag, int argc,

4
include/asm-generic/global_data.h
View file

@ -457,7 +457,7 @@ struct global_data {
*/
fdt_addr_t translation_offset;
#endif
#ifdef CONFIG_GENERATE_ACPI_TABLE
#ifdef CONFIG_ACPI
/**
* @acpi_ctx: ACPI context pointer
*/
@ -536,7 +536,7 @@ static_assert(sizeof(struct global_data) == GD_SIZE);
#define gd_dm_priv_base() NULL
#endif
#ifdef CONFIG_GENERATE_ACPI_TABLE
#ifdef CONFIG_ACPI
#define gd_acpi_ctx() gd->acpi_ctx
#define gd_acpi_start() gd->acpi_start
#define gd_set_acpi_start(addr) gd->acpi_start = addr