Bootloader debug usually tends to be a bit dicey prior to DDR and
serial port getting active in the system. JTAG typically remains the
only practical debug option during the initial bringup.
OpenOCD is one of the most popular environment for providing debug
capability via a GDB compatible interface for developers to work with.
Debugging U-Boot and bootloaders on K3 platform does have a bit of
tribal knowledge that is better documented in our common platform
documentation.
Signed-off-by: Jason Kacines <j-kacines@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
This adds initial support for the Toradex Verdin AM62 Quad 1GB WB IT
V1.0A module and subsequent V1.1 launch configuration SKUs. They are
strapped to boot from their on-module eMMC. U-Boot supports booting
from the on-module eMMC only, DFU support is disabled for now due to
missing AM62x USB support.
The device trees were taken straight from Linux v6.5-rc1.
Boot sequence is:
SYSFW ---> R5 SPL (both in tiboot3.bin) ---> ATF (TF-A) ---> OP-TEE
---> A53 SPL (part of tispl.bin) ---> U-boot proper (u-boot.img)
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Enhance the description of QEMU block devices
* Describe how to attach a virtio-blk device.
* Sort the command lines for MMC to match the other devices.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add Licensing to svg images to clarify the terms.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This brings PCI xHCI support to QEMU RISC-V and uses a usb keyboard
as one of the input devices.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Radxa E25 is a network application carrier board for the Radxa CM3I SoM
with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key,
USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header.
Features tested on a Radxa E25 v1.4:
- SD-card boot
- eMMC boot
- USB host
- PCIe/Ethernet adapters is detected
- SATA
Device tree is imported from linux next-20230728.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specifications:
Rockchip Rk3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
4-lane MIPI DSI connector
Audio – 3.5mm earphone jack
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
Gigabit Ethernet RJ45 with optional PoE support
40-pin IO header including UART, SPI, I2C and 5V DC power in
USB PD over USB Type-C
Size: 85mm x 56mm (Raspberry Pi 4 form factor)
Kernel commits:
d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board")
991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a")
304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a")
cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on rk3588s-rock5a")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update documentation on how to write a bootable u-boot-rockchip-spi.bin
image into SPI flash. This removes the reference to a hardcoded and now
obsolete 0x60000 payload offset.
Also remove an obsolete reference to pad_cat.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi
CM4 form factor. Therefore, it can slot into the official Raspberry Pi
CM4 IO carrier board. Add this configuration to U-Boot.
Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 SOQuartz Blade board is a carrier board for the SOQuartz
CM4-compatible compute module. It features PoE, an M.2 slot, an SD card
slot, HDMI, USB, serial and ethernet.
Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- PCIe/NVMe
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 SOQuartz Model A board is a carrier board for the SOQuartz
CM4-compatible compute module. It exposes PCIe, ethernet, USB, HDMI,
CSI, DSI, eDP and a 40 pin GPIO header, and is powered by 12V DC.
Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- PCIe/NVMe/AHCI
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 Quartz64 Model B is a credit-card sized single-board
computer based on the Rockchip RK3566 SoC. The board features an M.2
PCIe slot, USB3, USB2, eMMC, SD, ethernet, HDMI, analog audio out, a
40 pin GPIO header and a DSI and CSI port, as well as on-board Wi-Fi.
Features tested on a Quartz64-B 4GB v1.4 2022-06-06:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 Quartz64 Model A is a single-board computer based on the
Rockchip RK3566 SoC. The board features USB3, SATA, PCIe, HDMI, USB2.0,
CSI, DSI, eDP, eMMC, SD, and an e-paper parallel port, as well as a
20 pin GPIO header.
Features tested on a Quartz64-A 8GB v2.0 2021-04-27:
- SD-card boot
- eMMC boot
- PCIe/NVMe/AHCI
- USB host
Device tree is imported from linux v6.4.
Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
- Resync some of the K3 DTS files with the kernel, and pull in some
required related updates to keep drivers in sync with the dts files
now. Bring in some incremental fixes on top of one of the series I
applied recently as well as updating the iot2050 platform. Also do a
few small updates to the K2 platforms.
ATF is now called BL31, and OP-TEE since 3.21 suggests to use
tee-raw.bin instead of (the still identical) tee-pager_v2.bin.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
This avoids having to maintain to defconfigs that are 99% equivalent.
The approach is to use binman to generate two flash images,
flash-pg1.bin and flash-pg2.bin. With the help of a template dtsi, we
can avoid duplicating the common binman image definitions.
Suggested-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Hardkernel ODROID-M1 is a single board computer with a RK3568B2 SoC,
a slightly modified version of the RK3568 SoC.
Features tested on a ODROID-M1 8GB v1.0 2022-06-13:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe/AHCI
- SATA port
- USB host
Device tree is imported from linux v6.4.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add board-specific devicetree/config for the RK3399T-based Radxa ROCK 4SE
board. This board offers similar peripherals in a similar form-factor to
the existing ROCK Pi 4B but uses the cost-optimised RK3399T processor
(which has different OPP table than the RK3399) and other minimal hardware
changes.
Kernel tag: next-20230719
Kernel commits:
- 86a0e14a82ea ("arm64: dts: rockchip: Add Radxa ROCK 4SE")
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module
based on Rockchip RK3588J from Edgeble AI.
Add support for this SoM and IO board.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update the Anbernic RGxx3 documentation to note that panel detection
has been added and how it works.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Introduce common variables to define a generic build instruction that is
then used in specific board specific description.
Labels are introduced in the evm.rst files to be then reused in variant
board documentation as well.
While at this, drop using ARCH=arm when building u-boot sources. This
practice has been discouraged for some time and can potentially create
problems with Kconfig rules related to aarch64. It's best to avoid
this approach.
Signed-off-by: Nishanth Menon <nm@ti.com>
Update the bootflow svg diagram instead of the ascii version
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Update the bootflow svg diagram instead of the ascii version
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Update the bootflow svg diagram and reuse across the platforms as they
are common.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
We have duplication of sources which makes it hard to sustain across the
board, but at the same time, we'd like to ensure readers get specific
information without having to cross refer to different documentation to
get piecemeal information that they need to put together.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Now that we are using binman in all cases on these platforms, reword
things to be clearer that for filesystem booting we need to use a
specific name for each component.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
* Add a new page about the emulation of block devices
* Add semihosting to the emulation index page
* Set toc maxdepth to 1 to improve readability
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Actually merge the assorted K3 platform improvements that were
supposed to be in commit 247aa5a191 ("Merge branch
'2023-07-21-assorted-TI-platform-updates'")
Apply the trailing space changes in the guide document.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Having saved environments usually causes inconsistencies while in
development workflow. The saved environments conflict with the
default ones that U-boot should be updating during development
but that doesn't happen and the saved environments need to be
reset during bootups to test the changes causing extra debugs.
Remove the saved environments as a default. Environments can always
be re-enabled locally if one does like them or needs them for
some production environment. Optionally, Uenv.txt can also be used on
some of the boot media.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Earlier documentation specified builds for generating bootloader images
using an external TI repository k3-image-gen and core-secdev-k3. Modify
this to using the binman flow so that user understands how to build the
final boot images.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
To understand usage of DDR in A53 SPL stage, add a table showing region
and space used by major components of SPL.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
