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Merge branch '2023-07-27-TI-K2-K3-updates'

Browse source 
- Resync some of the K3 DTS files with the kernel, and pull in some
  required related updates to keep drivers in sync with the dts files
  now.  Bring in some incremental fixes on top of one of the series I
  applied recently as well as updating the iot2050 platform.  Also do a
  few small updates to the K2 platforms.
This commit is contained in:
Tom Rini 2023-07-28 10:25:50 -04:00
commit 6544943819
55 changed files with 1558 additions and 1030 deletions
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389
arch/arm/dts/k3-am62-main.dtsi
View file

@ -54,6 +54,12 @@
reg = <0x4044 0x8>;
#phy-cells = <1>;
};
epwm_tbclk: clock@4130 {
compatible = "ti,am62-epwm-tbclk", "syscon";
reg = <0x4130 0x4>;
#clock-cells = <1>;
};
};
dmss: bus@48000000 {
@ -144,8 +150,8 @@
compatible = "ti,k2g-sci";
ti,host-id = <12>;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 12>,
<&secure_proxy_main 13>;
mboxes = <&secure_proxy_main 12>,
<&secure_proxy_main 13>;
reg-names = "debug_messages";
reg = <0x00 0x44043000 0x00 0xfe0>;
@ -178,6 +184,21 @@
dma-names = "tx", "rx1", "rx2";
};
secure_proxy_sa3: mailbox@43600000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
reg = <0x00 0x43600000 0x00 0x10000>,
<0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>;
/*
* Marked Disabled:
* Node is incomplete as it is meant for bootloaders and
* firmware on non-MPU processors
*/
status = "disabled";
};
main_pmx0: pinctrl@f4000 {
compatible = "pinctrl-single";
reg = <0x00 0xf4000 0x00 0x2ac>;
@ -186,6 +207,108 @@
pinctrl-single,function-mask = <0xffffffff>;
};
main_esm: esm@420000 {
compatible = "ti,j721e-esm";
reg = <0x00 0x420000 0x00 0x1000>;
ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
};
main_timer0: timer@2400000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2400000 0x00 0x400>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 36 2>;
clock-names = "fck";
assigned-clocks = <&k3_clks 36 2>;
assigned-clock-parents = <&k3_clks 36 3>;
power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
};
main_timer1: timer@2410000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2410000 0x00 0x400>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 37 2>;
clock-names = "fck";
assigned-clocks = <&k3_clks 37 2>;
assigned-clock-parents = <&k3_clks 37 3>;
power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
};
main_timer2: timer@2420000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2420000 0x00 0x400>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 38 2>;
clock-names = "fck";
assigned-clocks = <&k3_clks 38 2>;
assigned-clock-parents = <&k3_clks 38 3>;
power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
};
main_timer3: timer@2430000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2430000 0x00 0x400>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 39 2>;
clock-names = "fck";
assigned-clocks = <&k3_clks 39 2>;
assigned-clock-parents = <&k3_clks 39 3>;
power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
};
main_timer4: timer@2440000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2440000 0x00 0x400>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 40 2>;
clock-names = "fck";
assigned-clocks = <&k3_clks 40 2>;
assigned-clock-parents = <&k3_clks 40 3>;
power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
};
main_timer5: timer@2450000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2450000 0x00 0x400>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 41 2>;
clock-names = "fck";
assigned-clocks = <&k3_clks 41 2>;
assigned-clock-parents = <&k3_clks 41 3>;
power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
};
main_timer6: timer@2460000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2460000 0x00 0x400>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 42 2>;
clock-names = "fck";
assigned-clocks = <&k3_clks 42 2>;
assigned-clock-parents = <&k3_clks 42 3>;
power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
};
main_timer7: timer@2470000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2470000 0x00 0x400>;
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 43 2>;
clock-names = "fck";
assigned-clocks = <&k3_clks 43 2>;
assigned-clock-parents = <&k3_clks 43 3>;
power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
};
main_uart0: serial@2800000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02800000 0x00 0x100>;
@ -193,6 +316,7 @@
power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 146 0>;
clock-names = "fclk";
status = "disabled";
};
main_uart1: serial@2810000 {
@ -202,6 +326,7 @@
power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 152 0>;
clock-names = "fclk";
status = "disabled";
};
main_uart2: serial@2820000 {
@ -211,6 +336,7 @@
power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 153 0>;
clock-names = "fclk";
status = "disabled";
};
main_uart3: serial@2830000 {
@ -220,6 +346,7 @@
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 154 0>;
clock-names = "fclk";
status = "disabled";
};
main_uart4: serial@2840000 {
@ -229,6 +356,7 @@
power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 155 0>;
clock-names = "fclk";
status = "disabled";
};
main_uart5: serial@2850000 {
@ -238,6 +366,7 @@
power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 156 0>;
clock-names = "fclk";
status = "disabled";
};
main_uart6: serial@2860000 {
@ -247,6 +376,7 @@
power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 158 0>;
clock-names = "fclk";
status = "disabled";
};
main_i2c0: i2c@20000000 {
@ -258,6 +388,7 @@
power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 102 2>;
clock-names = "fck";
status = "disabled";
};
main_i2c1: i2c@20010000 {
@ -269,6 +400,7 @@
power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 103 2>;
clock-names = "fck";
status = "disabled";
};
main_i2c2: i2c@20020000 {
@ -280,6 +412,7 @@
power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 104 2>;
clock-names = "fck";
status = "disabled";
};
main_i2c3: i2c@20030000 {
@ -291,6 +424,7 @@
power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 105 2>;
clock-names = "fck";
status = "disabled";
};
main_spi0: spi@20100000 {
@ -300,7 +434,8 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 172 0>;
clocks = <&k3_clks 141 0>;
status = "disabled";
};
main_spi1: spi@20110000 {
@ -310,7 +445,8 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 173 0>;
clocks = <&k3_clks 142 0>;
status = "disabled";
};
main_spi2: spi@20120000 {
@ -320,7 +456,8 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 174 0>;
clocks = <&k3_clks 143 0>;
status = "disabled";
};
main_gpio_intr: interrupt-controller@a00000 {
@ -345,7 +482,7 @@
<193>, <194>, <195>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <87>;
ti,ngpio = <92>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 77 0>;
@ -362,7 +499,7 @@
<183>, <184>, <185>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <88>;
ti,ngpio = <52>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 78 0>;
@ -385,8 +522,11 @@
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-ddr52 = <0x9>;
ti,otap-del-sel-hs200 = <0x6>;
ti,otap-del-sel-ddr52 = <0x5>;
ti,otap-del-sel-hs200 = <0x5>;
ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-mmc-hs = <0x1>;
status = "disabled";
};
sdhci1: mmc@fa00000 {
@ -397,19 +537,20 @@
clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
clock-names = "clk_ahb", "clk_xin";
ti,trm-icp = <0x2>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-legacy = <0x8>;
ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0xf>;
ti,otap-del-sel-sdr25 = <0xf>;
ti,otap-del-sel-sdr50 = <0xc>;
ti,otap-del-sel-sdr104 = <0x6>;
ti,otap-del-sel-ddr50 = <0x9>;
ti,itap-del-sel-legacy = <0x0>;
ti,itap-del-sel-sd-hs = <0x0>;
ti,itap-del-sel-sdr12 = <0x0>;
ti,itap-del-sel-sdr25 = <0x0>;
ti,otap-del-sel-sdr12 = <0x0>;
ti,otap-del-sel-sdr25 = <0x0>;
ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x4>;
ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-sd-hs = <0x1>;
ti,itap-del-sel-sdr12 = <0xa>;
ti,itap-del-sel-sdr25 = <0x1>;
ti,clkbuf-sel = <0x7>;
bus-width = <4>;
status = "disabled";
};
sdhci2: mmc@fa20000 {
@ -420,18 +561,65 @@
clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
clock-names = "clk_ahb", "clk_xin";
ti,trm-icp = <0x2>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-legacy = <0x8>;
ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0xf>;
ti,otap-del-sel-sdr25 = <0xf>;
ti,otap-del-sel-sdr50 = <0xc>;
ti,otap-del-sel-sdr104 = <0x6>;
ti,otap-del-sel-ddr50 = <0x9>;
ti,itap-del-sel-legacy = <0x0>;
ti,itap-del-sel-sd-hs = <0x0>;
ti,itap-del-sel-sdr12 = <0x0>;
ti,itap-del-sel-sdr25 = <0x0>;
ti,otap-del-sel-sdr12 = <0x0>;
ti,otap-del-sel-sdr25 = <0x0>;
ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x8>;
ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-sd-hs = <0xa>;
ti,itap-del-sel-sdr12 = <0xa>;
ti,itap-del-sel-sdr25 = <0x1>;
ti,clkbuf-sel = <0x7>;
status = "disabled";
};
usbss0: dwc3-usb@f900000 {
compatible = "ti,am62-usb";
reg = <0x00 0x0f900000 0x00 0x800>;
clocks = <&k3_clks 161 3>;
clock-names = "ref";
ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
ranges;
status = "disabled";
usb0: usb@31000000 {
compatible = "snps,dwc3";
reg =<0x00 0x31000000 0x00 0x50000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
};
};
usbss1: dwc3-usb@f910000 {
compatible = "ti,am62-usb";
reg = <0x00 0x0f910000 0x00 0x800>;
clocks = <&k3_clks 162 3>;
clock-names = "ref";
ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
ranges;
status = "disabled";
usb1: usb@31100000 {
compatible = "snps,dwc3";
reg =<0x00 0x31100000 0x00 0x50000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
};
};
fss: bus@fc00000 {
@ -456,6 +644,7 @@
power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
@ -514,12 +703,13 @@
clocks = <&k3_clks 13 0>;
clock-names = "fck";
bus_freq = <1000000>;
status = "disabled";
};
cpts@3d000 {
compatible = "ti,j721e-cpts";
reg = <0x00 0x3d000 0x00 0x400>;
clocks = <&k3_clks 13 1>;
clocks = <&k3_clks 13 3>;
clock-names = "cpts";
interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cpts";
@ -551,6 +741,7 @@
power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 51 0>;
clock-names = "fck";
status = "disabled";
};
ecap1: pwm@23110000 {
@ -560,6 +751,7 @@
power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 52 0>;
clock-names = "fck";
status = "disabled";
};
ecap2: pwm@23120000 {
@ -569,6 +761,7 @@
power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 53 0>;
clock-names = "fck";
status = "disabled";
};
main_mcan0: can@20701000 {
@ -583,5 +776,141 @@
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
main_rti0: watchdog@e000000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e000000 0x00 0x100>;
clocks = <&k3_clks 125 0>;
power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 125 0>;
assigned-clock-parents = <&k3_clks 125 2>;
};
main_rti1: watchdog@e010000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e010000 0x00 0x100>;
clocks = <&k3_clks 126 0>;
power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 126 0>;
assigned-clock-parents = <&k3_clks 126 2>;
};
main_rti2: watchdog@e020000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e020000 0x00 0x100>;
clocks = <&k3_clks 127 0>;
power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 127 0>;
assigned-clock-parents = <&k3_clks 127 2>;
};
main_rti3: watchdog@e030000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e030000 0x00 0x100>;
clocks = <&k3_clks 128 0>;
power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 128 0>;
assigned-clock-parents = <&k3_clks 128 2>;
};
main_rti15: watchdog@e0f0000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x0e0f0000 0x00 0x100>;
clocks = <&k3_clks 130 0>;
power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 130 0>;
assigned-clock-parents = <&k3_clks 130 2>;
};
epwm0: pwm@23000000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x00 0x23000000 0x00 0x100>;
power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm1: pwm@23010000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x00 0x23010000 0x00 0x100>;
power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm2: pwm@23020000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x00 0x23020000 0x00 0x100>;
power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
mcasp0: audio-controller@2b00000 {
compatible = "ti,am33xx-mcasp-audio";
reg = <0x00 0x02b00000 0x00 0x2000>,
<0x00 0x02b08000 0x00 0x400>;
reg-names = "mpu", "dat";
interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx";
dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
dma-names = "tx", "rx";
clocks = <&k3_clks 190 0>;
clock-names = "fck";
assigned-clocks = <&k3_clks 190 0>;
assigned-clock-parents = <&k3_clks 190 2>;
power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
};
mcasp1: audio-controller@2b10000 {
compatible = "ti,am33xx-mcasp-audio";
reg = <0x00 0x02b10000 0x00 0x2000>,
<0x00 0x02b18000 0x00 0x400>;
reg-names = "mpu", "dat";
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx";
dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
dma-names = "tx", "rx";
clocks = <&k3_clks 191 0>;
clock-names = "fck";
assigned-clocks = <&k3_clks 191 0>;
assigned-clock-parents = <&k3_clks 191 2>;
power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
};
mcasp2: audio-controller@2b20000 {
compatible = "ti,am33xx-mcasp-audio";
reg = <0x00 0x02b20000 0x00 0x2000>,
<0x00 0x02b28000 0x00 0x400>;
reg-names = "mpu", "dat";
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx";
dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
dma-names = "tx", "rx";
clocks = <&k3_clks 192 0>;
clock-names = "fck";
assigned-clocks = <&k3_clks 192 0>;
assigned-clock-parents = <&k3_clks 192 2>;
power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
};
};

66
arch/arm/dts/k3-am62-mcu.dtsi
View file

@ -14,6 +14,57 @@
pinctrl-single,function-mask = <0xffffffff>;
};
mcu_esm: esm@4100000 {
compatible = "ti,j721e-esm";
reg = <0x00 0x4100000 0x00 0x1000>;
ti,esm-pins = <0>, <1>, <2>, <85>;
};
/*
* The MCU domain timer interrupts are routed only to the ESM module,
* and not currently available for Linux. The MCU domain timers are
* of limited use without interrupts, and likely reserved by the ESM.
*/
mcu_timer0: timer@4800000 {
compatible = "ti,am654-timer";
reg = <0x00 0x4800000 0x00 0x400>;
clocks = <&k3_clks 35 2>;
clock-names = "fck";
power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
status = "reserved";
};
mcu_timer1: timer@4810000 {
compatible = "ti,am654-timer";
reg = <0x00 0x4810000 0x00 0x400>;
clocks = <&k3_clks 48 2>;
clock-names = "fck";
power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
status = "reserved";
};
mcu_timer2: timer@4820000 {
compatible = "ti,am654-timer";
reg = <0x00 0x4820000 0x00 0x400>;
clocks = <&k3_clks 49 2>;
clock-names = "fck";
power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
status = "reserved";
};
mcu_timer3: timer@4830000 {
compatible = "ti,am654-timer";
reg = <0x00 0x4830000 0x00 0x400>;
clocks = <&k3_clks 50 2>;
clock-names = "fck";
power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
ti,timer-pwm;
status = "reserved";
};
mcu_uart0: serial@4a00000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x04a00000 0x00 0x100>;
@ -21,6 +72,7 @@
power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 149 0>;
clock-names = "fclk";
status = "disabled";
};
mcu_i2c0: i2c@4900000 {
@ -32,6 +84,7 @@
power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 106 2>;
clock-names = "fck";
status = "disabled";
};
mcu_spi0: spi@4b00000 {
@ -42,6 +95,7 @@
#size-cells = <0>;
power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 147 0>;
status = "disabled";
};
mcu_spi1: spi@4b10000 {
@ -52,6 +106,7 @@
#size-cells = <0>;
power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 148 0>;
status = "disabled";
};
mcu_gpio_intr: interrupt-controller@4210000 {
@ -81,4 +136,15 @@
clocks = <&k3_clks 79 0>;
clock-names = "gpio";
};
mcu_rti0: watchdog@4880000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x04880000 0x00 0x100>;
clocks = <&k3_clks 131 0>;
power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 131 0>;
assigned-clock-parents = <&k3_clks 131 2>;
/* Tightly coupled to M4F */
status = "reserved";
};
};

33
arch/arm/dts/k3-am62-thermal.dtsi Normal file
View file

@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/thermal/thermal.h>
thermal_zones: thermal-zones {
main0_thermal: main0-thermal {
polling-delay-passive = <250>; /* milliSeconds */
polling-delay = <500>; /* milliSeconds */
thermal-sensors = <&wkup_vtm0 0>;
trips {
main0_crit: main0-crit {
temperature = <105000>; /* milliCelsius */
hysteresis = <2000>; /* milliCelsius */
type = "critical";
};
};
};
main1_thermal: main1-thermal {
polling-delay-passive = <250>; /* milliSeconds */
polling-delay = <500>; /* milliSeconds */
thermal-sensors = <&wkup_vtm0 1>;
trips {
main1_crit: main1-crit {
temperature = <105000>; /* milliCelsius */
hysteresis = <2000>; /* milliCelsius */
type = "critical";
};
};
};
};

33
arch/arm/dts/k3-am62-wakeup.dtsi
View file

@ -26,16 +26,47 @@
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 114 0>;
clock-names = "fclk";
status = "disabled";
};
wkup_i2c0: i2c@2b200000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x02b200000 0x00 0x100>;
reg = <0x00 0x2b200000 0x00 0x100>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 107 4>;
clock-names = "fck";
status = "disabled";
};
wkup_rtc0: rtc@2b1f0000 {
compatible = "ti,am62-rtc";
reg = <0x00 0x2b1f0000 0x00 0x100>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 117 6> , <&k3_clks 117 0>;
clock-names = "vbus", "osc32k";
power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
wakeup-source;
};
wkup_rti0: watchdog@2b000000 {
compatible = "ti,j7-rti-wdt";
reg = <0x00 0x2b000000 0x00 0x100>;
clocks = <&k3_clks 132 0>;
power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 132 0>;
assigned-clock-parents = <&k3_clks 132 2>;
/* Used by DM firmware */
status = "reserved";
};
wkup_vtm0: temperature-sensor@b00000 {
compatible = "ti,j7200-vtm";
reg = <0x00 0xb00000 0x00 0x400>,
<0x00 0xb01000 0x00 0x400>;
power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
};

11
arch/arm/dts/k3-am62.dtsi
View file

@ -8,9 +8,10 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
#include "k3-pinctrl.h"
/ {
model = "Texas Instruments K3 AM625 SoC";
compatible = "ti,am625";
@ -80,6 +81,7 @@
<0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>,
/* Wakeup Domain Range */
<0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
<0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>,
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
@ -90,14 +92,17 @@
ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */
};
cbass_wakeup: bus@2b000000 {
cbass_wakeup: bus@b00000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */
ranges = <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
<0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
};
};
#include "k3-am62-thermal.dtsi"
};
/* Now include the peripherals for each bus segments */

92
arch/arm/dts/k3-am625-r5-sk.dts
View file

@ -9,7 +9,6 @@
#include "k3-am62-ddr.dtsi"
#include "k3-am625-sk-u-boot.dtsi"
#include "k3-am625-sk-binman.dtsi"
/ {
aliases {
@ -19,31 +18,6 @@
serial3 = &main_uart1;
};
chosen {
stdout-path = "serial2:115200n8";
tick-timer = &timer1;
};
memory@80000000 {
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
bootph-pre-ram;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
@ -81,80 +55,44 @@
ti,secure-host;
};
&cbass_mcu {
mcu_esm: esm@4100000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x4100000 0x0 0x1000>;
ti,esm-pins = <0>, <1>, <2>, <85>;
bootph-pre-ram;
};
&mcu_esm {
bootph-pre-ram;
};
&secure_proxy_sa3 {
bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
&main_esm {
bootph-pre-ram;
};
&cbass_main {
sa3_secproxy: secproxy@44880000 {
bootph-pre-ram;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "rt", "scfg", "target_data";
reg = <0x00 0x44880000 0x00 0x20000>,
<0x0 0x44860000 0x0 0x20000>,
<0x0 0x43600000 0x0 0x10000>;
};
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>;
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
main_esm: esm@420000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x420000 0x0 0x1000>;
ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
bootph-pre-ram;
};
};
&mcu_pmx0 {
&wkup_uart0_pins_default {
bootph-pre-ram;
wkup_uart0_pins_default: wkup-uart0-pins-default {
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
>;
bootph-pre-ram;
};
};
&main_pmx0 {
&main_uart1_pins_default {
bootph-pre-ram;
main_uart1_pins_default: main-uart1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */
AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */
AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */
>;
bootph-pre-ram;
};
};
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
status = "okay";
bootph-pre-ram;
};
/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
status = "okay";
bootph-pre-ram;
};

33
arch/arm/dts/k3-am625-sk-u-boot.dtsi
View file

@ -9,7 +9,7 @@
/ {
chosen {
stdout-path = "serial2:115200n8";
tick-timer = &timer1;
tick-timer = &main_timer0;
};
aliases {
@ -21,16 +21,13 @@
};
};
&cbass_main{
&cbass_main {
bootph-pre-ram;
};
timer1: timer@2400000 {
compatible = "ti,omap5430-timer";
reg = <0x00 0x2400000 0x00 0x80>;
ti,timer-alwon;
clock-frequency = <25000000>;
bootph-pre-ram;
};
&main_timer0 {
clock-frequency = <25000000>;
bootph-pre-ram;
};
&dmss {
@ -77,10 +74,6 @@
bootph-pre-ram;
};
&main_uart1 {
bootph-pre-ram;
};
&cbass_mcu {
bootph-pre-ram;
};
@ -93,10 +86,6 @@
bootph-pre-ram;
};
&wkup_uart0 {
bootph-pre-ram;
};
&sdhci1 {
bootph-pre-ram;
};
@ -130,17 +119,7 @@
};
&cpsw3g {
reg = <0x0 0x8000000 0x0 0x200000>,
<0x0 0x43000200 0x0 0x8>;
reg-names = "cpsw_nuss", "mac_efuse";
/delete-property/ ranges;
bootph-pre-ram;
cpsw-phy-sel@04044 {
compatible = "ti,am64-phy-gmii-sel";
reg = <0x0 0x00104044 0x0 0x8>;
bootph-pre-ram;
};
};
&cpsw_port1 {

286
arch/arm/dts/k3-am625-sk.dts
View file

@ -7,28 +7,19 @@
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am625.dtsi"
#include "k3-am62x-sk-common.dtsi"
/ {
compatible = "ti,am625-sk", "ti,am625";
compatible = "ti,am625-sk", "ti,am625";
model = "Texas Instruments AM625 SK";
aliases {
serial2 = &main_uart0;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
mmc2 = &sdhci2;
spi0 = &ospi0;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
};
chosen {
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
opp-table {
/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
opp-supported-hw = <0x01 0x0004>;
clock-latency-ns = <6000000>;
};
};
memory@80000000 {
@ -38,39 +29,6 @@
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ramoops@9ca00000 {
compatible = "ramoops";
reg = <0x00 0x9ca00000 0x00 0x00100000>;
record-size = <0x8000>;
console-size = <0x8000>;
ftrace-size = <0x00>;
pmsg-size = <0x8000>;
};
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
alignment = <0x1000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9db00000 0x00 0xc00000>;
no-map;
};
};
vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
compatible = "regulator-fixed";
@ -130,108 +88,20 @@
<3300000 0x1>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&usr_led_pins_default>;
led-0 {
label = "am62-sk:green:heartbeat";
gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
function = LED_FUNCTION_HEARTBEAT;
default-state = "off";
};
vcc_1v8: regulator-5 {
/* output of TPS6282518DMQ */
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3_sys>;
regulator-always-on;
regulator-boot-on;
};
};
&main_pmx0 {
main_uart0_pins_default: main-uart0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
>;
};
main_i2c0_pins_default: main-i2c0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
>;
};
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
>;
};
main_i2c2_pins_default: main-i2c2-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
>;
};
main_mmc0_pins_default: main-mmc0-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
>;
};
main_mmc1_pins_default: main-mmc1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
>;
};
usr_led_pins_default: usr-led-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
>;
};
main_mdio1_pins_default: main-mdio1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
>;
};
main_rgmii1_pins_default: main-rgmii1-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
>;
};
main_rgmii2_pins_default: main-rgmii2-pins-default {
main_rgmii2_pins_default: main-rgmii2-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
@ -248,7 +118,7 @@
>;
};
ospi0_pins_default: ospi0-pins-default {
ospi0_pins_default: ospi0-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
@ -264,77 +134,20 @@
>;
};
vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
>;
};
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
>;
};
};
&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
status = "reserved";
};
&mcu_uart0 {
status = "disabled";
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
&main_uart1 {
/* Main UART1 is used by TIFS firmware */
status = "reserved";
};
&main_uart2 {
status = "disabled";
};
&main_uart3 {
status = "disabled";
};
&main_uart4 {
status = "disabled";
};
&main_uart5 {
status = "disabled";
};
&main_uart6 {
status = "disabled";
};
&mcu_i2c0 {
status = "disabled";
};
&wkup_i2c0 {
status = "disabled";
};
&main_i2c0 {
status = "disabled";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
};
&main_i2c1 {
status = "disabled";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
exp1: gpio@22 {
compatible = "ti,tca6424";
reg = <0x22>;
@ -348,7 +161,7 @@
"UART1_FET_BUF_EN", "WL_LT_EN",
"GPIO_HDMI_RSTn", "CSI_GPIO1",
"CSI_GPIO2", "PRU_3V3_EN",
"HDMI_INTn", "TEST_GPIO2",
"HDMI_INTn", "PD_I2C_IRQ",
"MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
"MCASP1_FET_SEL", "UART1_FET_SEL",
"TSINT#", "IO_EXP_TEST_LED";
@ -363,41 +176,14 @@
};
};
&main_i2c2 {
status = "disabled";
};
&main_i2c3 {
status = "disabled";
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&sdhci1 {
/* SD/MMC */
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default
&main_rgmii1_pins_default
&main_rgmii2_pins_default>;
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;
};
&cpsw_port2 {
@ -406,13 +192,6 @@
};
&cpsw3g_mdio {
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
cpsw3g_phy1: ethernet-phy@1 {
reg = <1>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
@ -429,6 +208,7 @@
};
&ospi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
@ -487,18 +267,6 @@
};
};
&ecap0 {
status = "disabled";
};
&ecap1 {
status = "disabled";
};
&ecap2 {
status = "disabled";
};
&main_mcan0 {
status = "disabled";
&tlv320aic3106 {
DVDD-supply = <&vcc_1v8>;
};

54
arch/arm/dts/k3-am625.dtsi
View file

@ -48,6 +48,8 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&L2_0>;
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 135 0>;
};
cpu1: cpu@1 {
@ -62,6 +64,8 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&L2_0>;
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 136 0>;
};
cpu2: cpu@2 {
@ -76,6 +80,8 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&L2_0>;
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 137 0>;
};
cpu3: cpu@3 {
@ -90,13 +96,59 @@
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&L2_0>;
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 138 0>;
};
};
a53_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
opp-shared;
syscon = <&wkup_conf>;
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-supported-hw = <0x01 0x0007>;
clock-latency-ns = <6000000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-supported-hw = <0x01 0x0007>;
clock-latency-ns = <6000000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-supported-hw = <0x01 0x0007>;
clock-latency-ns = <6000000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-supported-hw = <0x01 0x0007>;
clock-latency-ns = <6000000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-supported-hw = <0x01 0x0006>;
clock-latency-ns = <6000000>;
};
opp-1250000000 {
opp-hz = /bits/ 64 <1250000000>;
opp-supported-hw = <0x01 0x0004>;
clock-latency-ns = <6000000>;
opp-suspend;
};
};
L2_0: l2-cache0 {
compatible = "cache";
cache-unified;
cache-level = <2>;
cache-size = <0x40000>;
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
};

412
arch/arm/dts/k3-am62x-sk-common.dtsi Normal file
View file

@ -0,0 +1,412 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Common dtsi for AM62x SK and derivatives
*
* Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/
*/
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am625.dtsi"
/ {
aliases {
serial2 = &main_uart0;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
mmc2 = &sdhci2;
spi0 = &ospi0;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
usb0 = &usb0;
usb1 = &usb1;
};
chosen {
stdout-path = "serial2:115200n8";
};
memory@80000000 {
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ramoops@9ca00000 {
compatible = "ramoops";
reg = <0x00 0x9ca00000 0x00 0x00100000>;
record-size = <0x8000>;
console-size = <0x8000>;
ftrace-size = <0x00>;
pmsg-size = <0x8000>;
};
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
alignment = <0x1000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9db00000 0x00 0xc00000>;
no-map;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&usr_led_pins_default>;
led-0 {
label = "am62-sk:green:heartbeat";
gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
function = LED_FUNCTION_HEARTBEAT;
default-state = "off";
};
};
tlv320_mclk: clk-0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <12288000>;
};
codec_audio: sound {
compatible = "simple-audio-card";
simple-audio-card,name = "AM62x-SKEVM";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Line", "Line In",
"Microphone", "Microphone Jack";
simple-audio-card,routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"LINE1L", "Line In",
"LINE1R", "Line In",
"MIC3R", "Microphone Jack",
"Microphone Jack", "Mic Bias";
simple-audio-card,format = "dsp_b";
simple-audio-card,bitclock-master = <&sound_master>;
simple-audio-card,frame-master = <&sound_master>;
simple-audio-card,bitclock-inversion;
simple-audio-card,cpu {
sound-dai = <&mcasp1>;
};
sound_master: simple-audio-card,codec {
sound-dai = <&tlv320aic3106>;
clocks = <&tlv320_mclk>;
};
};
};
&main_pmx0 {
/* First pad number is ALW package and second is AMC package */
main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
>;
};
main_uart1_pins_default: main-uart1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */
AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */
AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19/D15) MCASP0_AFSR.UART1_RXD */
AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20/D16) MCASP0_ACLKR.UART1_TXD */
>;
};
main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16/E12) I2C0_SCL */
AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16/D14) I2C0_SDA */
>;
};
main_i2c1_pins_default: main-i2c1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17/A17) I2C1_SCL */
AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17/A16) I2C1_SDA */
>;
};
main_i2c2_pins_default: main-i2c2-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22/H18) GPMC0_CSn2.I2C2_SCL */
AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24/H19) GPMC0_CSn3.I2C2_SDA */
>;
};
main_mmc0_pins_default: main-mmc0-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2/V2) MMC0_DAT0 */
AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1/V1) MMC0_DAT1 */
AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3/W2) MMC0_DAT2 */
AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4/W1) MMC0_DAT3 */
AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2/Y2) MMC0_DAT4 */
AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1/W3) MMC0_DAT5 */
AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2/W4) MMC0_DAT6 */
AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2/V4) MMC0_DAT7 */
>;
};
main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22/A19) MMC1_DAT0 */
AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21/B19) MMC1_DAT1 */
AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21/B20) MMC1_DAT2 */
AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22/C19) MMC1_DAT3 */
AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17/C15) MMC1_SDCD */
>;
};
usr_led_pins_default: usr-led-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17/B15) MMC1_SDWP.GPIO1_49 */
>;
};
main_mdio1_pins_default: main-mdio1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24/V17) MDIO0_MDC */
AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22/U16) MDIO0_MDIO */
>;
};
main_rgmii1_pins_default: main-rgmii1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */
AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16/AA17) RGMII1_RD2 */
AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15/Y15) RGMII1_RD3 */
AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17/AA16) RGMII1_RXC */
AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17/W14) RGMII1_RX_CTL */
AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20/U14) RGMII1_TD0 */
AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20/AA19) RGMII1_TD1 */
AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18/Y17) RGMII1_TD2 */
AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18/AA18) RGMII1_TD3 */
AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19/W16) RGMII1_TXC */
AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19/V15) RGMII1_TX_CTL */
>;
};
main_usb1_pins_default: main-usb1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18/E16) USB1_DRVVBUS */
>;
};
main_mcasp1_pins_default: main-mcasp1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x090, PIN_INPUT, 2) /* (M24/K17) GPMC0_BE0N_CLE.MCASP1_ACLKX */
AM62X_IOPAD(0x098, PIN_INPUT, 2) /* (U23/P21) GPMC0_WAIT0.MCASP1_AFSX */
AM62X_IOPAD(0x08c, PIN_OUTPUT, 2) /* (L25/J17) GPMC0_WEN.MCASP1_AXR0 */
AM62X_IOPAD(0x084, PIN_INPUT, 2) /* (L23/K20) GPMC0_ADVN_ALE.MCASP1_AXR2 */
>;
};
};
&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */
AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */
AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4/B5) WKUP_UART0_RXD */
AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5/C6) WKUP_UART0_TXD */
>;
};
};
&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
};
&main_uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
&main_uart1 {
/* Main UART1 is used by TIFS firmware */
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
};
&main_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
eeprom@51 {
/* AT24C512C-MAHM-T or M24512-DFMC6TG */
compatible = "atmel,24c512";
reg = <0x51>;
};
typec_pd0: tps6598x@3f {
compatible = "ti,tps6598x";
reg = <0x3f>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
self-powered;
data-role = "dual";
power-role = "sink";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_con_hs: endpoint {
remote-endpoint = <&usb0_hs_ep>;
};
};
};
};
};
};
&main_i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
tlv320aic3106: audio-codec@1b {
#sound-dai-cells = <0>;
compatible = "ti,tlv320aic3106";
reg = <0x1b>;
ai3x-micbias-vg = <1>; /* 2.0V */
/* Regulators */
AVDD-supply = <&vcc_3v3_sys>;
IOVDD-supply = <&vcc_3v3_sys>;
DRVDD-supply = <&vcc_3v3_sys>;
};
};
&sdhci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&sdhci1 {
/* SD/MMC */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>;
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
};
&cpsw3g_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default>;
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
};
&mailbox0_cluster0 {
mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&usbss0 {
status = "okay";
ti,vbus-divider;
};
&usbss1 {
status = "okay";
ti,vbus-divider;
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
usb-role-switch;
port@0 {
reg = <0>;
usb0_hs_ep: endpoint {
remote-endpoint = <&usb_con_hs>;
};
};
};
&usb1 {
dr_mode = "host";
pinctrl-names = "default";
pinctrl-0 = <&main_usb1_pins_default>;
};
&mcasp1 {
status = "okay";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&main_mcasp1_pins_default>;
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 0 2 0
0 0 0 0
0 0 0 0
0 0 0 0
>;
tx-num-evt = <32>;
rx-num-evt = <32>;
};

187
arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) Siemens AG, 2020-2022
* Copyright (c) Siemens AG, 2020-2023
*
* Authors:
* Jan Kiszka <jan.kiszka@siemens.com>
@ -10,23 +10,23 @@
#include <config.h>
/ {
binman {
filename = "flash.bin";
binman: binman {
multiple-images;
};
};
&binman {
common_part: template {
pad-byte = <0xff>;
size = <0x8c0000>;
allow-repack;
blob-ext@0x000000 {
blob-ext@0 {
offset = <0x000000>;
#ifdef CONFIG_TARGET_IOT2050_A53_PG1
filename = "seboot_pg1.bin";
#else
filename = "seboot_pg2.bin";
#endif
missing-msg = "iot2050-seboot";
};
fit@0x180000 {
fit@180000 {
offset = <0x180000>;
filename = "tispl.bin";
pad-byte = <0xff>;
@ -104,9 +104,8 @@
};
};
fit@0x380000 {
fit@380000 {
description = "U-Boot for IOT2050";
fit,fdt-list = "of-list";
offset = <0x380000>;
images {
u-boot {
@ -134,7 +133,105 @@
};
};
#ifdef CONFIG_TARGET_IOT2050_A53_PG2
#ifdef CONFIG_WDT_K3_RTI_FW_FILE
k3-rti-wdt-firmware {
type = "firmware";
load = <0x82000000>;
arch = "arm";
compression = "none";
blob-ext {
filename = CONFIG_WDT_K3_RTI_FW_FILE;
missing-msg = "k3-rti-wdt-firmware";
};
hash {
algo = "sha256";
};
};
#endif
};
configurations {
@config-SEQ {
description = "NAME";
firmware = "u-boot";
fdt = "fdt-SEQ";
signature {
sign-images = "firmware", "fdt", "loadables";
};
};
};
};
fdtmap {
};
/* primary env */
fill@680000 {
offset = <0x680000>;
size = <0x020000>;
fill-byte = [00];
};
/* secondary env */
fill@6a0000 {
offset = <0x6a0000>;
size = <0x020000>;
fill-byte = [00];
};
/* OTP update command block */
#ifdef CONFIG_IOT2050_EMBED_OTPCMD
blob-ext@6c0000 {
offset = <0x6c0000>;
size = <0x010000>;
filename = "otpcmd.bin";
missing-msg = "iot2050-otpcmd";
};
#else
fill@6c0000 {
offset = <0x6c0000>;
size = <0x010000>;
fill-byte = [ff];
};
#endif
};
flash-pg1 {
filename = "flash-pg1.bin";
insert-template = <&common_part>;
blob-ext@0 {
filename = "seboot_pg1.bin";
};
fit@380000 {
fit,fdt-list-val = "k3-am6528-iot2050-basic", "k3-am6548-iot2050-advanced";
configurations {
default = "k3-am6528-iot2050-basic";
@config-SEQ {
loadables =
#ifdef CONFIG_WDT_K3_RTI_FW_FILE
"k3-rti-wdt-firmware",
#endif
<>;
};
};
};
};
flash-pg2 {
filename = "flash-pg2.bin";
insert-template = <&common_part>;
blob-ext@0 {
filename = "seboot_pg2.bin";
};
fit@380000 {
fit,fdt-list-val = "k3-am6528-iot2050-basic-pg2", "k3-am6548-iot2050-advanced-pg2", "k3-am6548-iot2050-advanced-m2";
images {
bkey-usb3-overlay {
description = "M.2-bkey-usb3-overlay";
type = "blob";
@ -162,77 +259,19 @@
algo = "sha256";
};
};
#endif
#ifdef CONFIG_WDT_K3_RTI_FW_FILE
k3-rti-wdt-firmware {
type = "firmware";
load = <0x82000000>;
arch = "arm";
compression = "none";
blob-ext {
filename = CONFIG_WDT_K3_RTI_FW_FILE;
missing-msg = "k3-rti-wdt-firmware";
};
hash {
algo = "sha256";
};
};
#endif
};
configurations {
default = "@config-DEFAULT-SEQ";
default = "k3-am6528-iot2050-basic-pg2";
@config-SEQ {
description = "NAME";
firmware = "u-boot";
fdt = "fdt-SEQ";
loadables =
#ifdef CONFIG_TARGET_IOT2050_A53_PG2
"bkey-usb3-overlay",
"bkey-ekey-pcie-overlay",
#endif
#ifdef CONFIG_WDT_K3_RTI_FW_FILE
"k3-rti-wdt-firmware",
#endif
<>;
signature {
sign-images = "firmware", "fdt", "loadables";
};
"bkey-usb3-overlay",
"bkey-ekey-pcie-overlay";
};
};
};
fdtmap {
};
/* primary env */
fill@0x680000 {
offset = <0x680000>;
size = <0x020000>;
fill-byte = [00];
};
/* secondary env */
fill@0x6a0000 {
offset = <0x6a0000>;
size = <0x020000>;
fill-byte = [00];
};
/* OTP update command block */
#if CONFIG_IOT2050_EMBED_OTPCMD
blob-ext@0x6c0000 {
offset = <0x6c0000>;
size = <0x010000>;
filename = "otpcmd.bin";
missing-msg = "iot2050-otpcmd";
};
#else
fill@0x6c0000 {
offset = <0x6c0000>;
size = <0x010000>;
fill-byte = [ff];
};
#endif
};
};

53
arch/arm/dts/k3-pinctrl.h Normal file
View file

@ -0,0 +1,53 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* This header provides constants for pinctrl bindings for TI's K3 SoC
* family.
*
* Copyright (C) 2018-2023 Texas Instruments Incorporated - https://www.ti.com/
*/
#ifndef DTS_ARM64_TI_K3_PINCTRL_H
#define DTS_ARM64_TI_K3_PINCTRL_H
#define PULLUDEN_SHIFT (16)
#define PULLTYPESEL_SHIFT (17)
#define RXACTIVE_SHIFT (18)
#define PULL_DISABLE (1 << PULLUDEN_SHIFT)
#define PULL_ENABLE (0 << PULLUDEN_SHIFT)
#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE)
#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE)
#define INPUT_EN (1 << RXACTIVE_SHIFT)
#define INPUT_DISABLE (0 << RXACTIVE_SHIFT)
/* Only these macros are expected be used directly in device tree files */
#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE)
#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP)
#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN)
#define PIN_INPUT (INPUT_EN | PULL_DISABLE)
#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN)
#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J784S4_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J784S4_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#endif

1
arch/arm/mach-k3/am62x/dev-data.c
View file

@ -58,6 +58,7 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(161, &soc_lpsc_list[8]),
PSC_DEV(162, &soc_lpsc_list[9]),
PSC_DEV(75, &soc_lpsc_list[10]),
PSC_DEV(36, &soc_lpsc_list[11]),
PSC_DEV(102, &soc_lpsc_list[11]),
PSC_DEV(146, &soc_lpsc_list[11]),
PSC_DEV(13, &soc_lpsc_list[12]),

1
arch/arm/mach-k3/common_fdt.c
View file

@ -7,6 +7,7 @@
#include <dm.h>
#include <fdt_support.h>
#include <linux/soc/ti/ti_sci_protocol.h>
#include "common_fdt.h"
static int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
{

1
arch/arm/mach-k3/common_fdt.h
View file

@ -7,5 +7,6 @@
#define _COMMON_FDT_H
int fdt_fixup_msmc_ram_k3(void *blob);
int fdt_del_node_path(void *blob, const char *path);
#endif /* _COMMON_FDT_H */

20
arch/arm/mach-k3/security.c
View file

@ -67,14 +67,6 @@ void ti_secure_image_check_binary(void **p_image, size_t *p_size)
return;
}
if (get_device_type() != K3_DEVICE_TYPE_HS_SE &&
!ti_secure_cert_detected(*p_image)) {
printf("Warning: Did not detect image signing certificate. "
"Skipping authentication to prevent boot failure. "
"This will fail on Security Enforcing(HS-SE) devices\n");
return;
}
}
void ti_secure_image_post_process(void **p_image, size_t *p_size)
@ -91,11 +83,17 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size)
return;
}
if (get_device_type() == K3_DEVICE_TYPE_GP &&
(get_device_type() != K3_DEVICE_TYPE_HS_SE &&
!ti_secure_cert_detected(*p_image)))
if (get_device_type() == K3_DEVICE_TYPE_GP)
return;
if (get_device_type() != K3_DEVICE_TYPE_HS_SE &&
!ti_secure_cert_detected(*p_image)) {
printf("Warning: Did not detect image signing certificate. "
"Skipping authentication to prevent boot failure. "
"This will fail on Security Enforcing(HS-SE) devices\n");
return;
}
/* Clean out image so it can be seen by system firmware */
image_addr = dma_map_single(*p_image, *p_size, DMA_BIDIRECTIONAL);

30
board/siemens/iot2050/Kconfig
View file

@ -1,40 +1,22 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (c) Siemens AG, 2018-2022
# Copyright (c) Siemens AG, 2018-2023
#
# Authors:
# Le Jin <le.jin@siemens.com>
# Jan Kiszka <jan.kiszka@siemens.com>
choice
prompt "Siemens SIMATIC IOT2050 boards"
optional
config TARGET_IOT2050_A53_PG1
bool "IOT2050 PG1 running on A53"
select IOT2050_A53_COMMON
help
This builds U-Boot for the Product Generation 1 (PG1) of the IOT2050
devices.
config TARGET_IOT2050_A53_PG2
bool "IOT2050 PG2 running on A53"
select IOT2050_A53_COMMON
help
This builds U-Boot for the Product Generation 2 (PG2) of the IOT2050
devices.
endchoice
config IOT2050_A53_COMMON
bool
config TARGET_IOT2050_A53
bool "IOT2050 running on A53"
select ARM64
select SOC_K3_AM654
select BOARD_LATE_INIT
select SYS_DISABLE_DCACHE_OPS
select BINMAN
help
This builds U-Boot for the IOT2050 devices.
if IOT2050_A53_COMMON
if TARGET_IOT2050_A53
config SYS_BOARD
default "iot2050"

3
board/siemens/iot2050/MAINTAINERS
View file

@ -4,7 +4,6 @@ M: Jan Kiszka <jan.kiszka@siemens.com>
S: Maintained
F: board/siemens/iot2050/
F: include/configs/iot2050.h
F: configs/iot2050_pg1_defconfig
F: configs/iot2050_pg2_defconfig
F: configs/iot2050_defconfig
F: arch/arm/dts/iot2050-*
F: doc/board/siemens/iot2050.rst

31
board/siemens/iot2050/board.c
View file

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Board specific initialization for IOT2050
* Copyright (c) Siemens AG, 2018-2022
* Copyright (c) Siemens AG, 2018-2023
*
* Authors:
* Le Jin <le.jin@siemens.com>
@ -147,15 +147,6 @@ static void set_pinvalue(const char *gpio_name, const char *label, int value)
dm_gpio_set_value(&gpio, value);
}
static bool board_is_m2(void)
{
struct iot2050_info *info = IOT2050_INFO_DATA;
return IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG2) &&
info->magic == IOT2050_INFO_MAGIC &&
strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0;
}
static bool board_is_advanced(void)
{
struct iot2050_info *info = IOT2050_INFO_DATA;
@ -164,6 +155,22 @@ static bool board_is_advanced(void)
strstr((char *)info->name, "IOT2050-ADVANCED") != NULL;
}
static bool board_is_sr1(void)
{
struct iot2050_info *info = IOT2050_INFO_DATA;
return info->magic == IOT2050_INFO_MAGIC &&
strstr((char *)info->name, "-PG2") != NULL;
}
static bool board_is_m2(void)
{
struct iot2050_info *info = IOT2050_INFO_DATA;
return !board_is_sr1() && info->magic == IOT2050_INFO_MAGIC &&
strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0;
}
static void remove_mmc1_target(void)
{
char *boot_targets = strdup(env_get("boot_targets"));
@ -210,14 +217,14 @@ void set_board_info_env(void)
}
if (board_is_advanced()) {
if (IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG1))
if (board_is_sr1())
fdtfile = "ti/k3-am6548-iot2050-advanced.dtb";
else if(board_is_m2())
fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb";
else
fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb";
} else {
if (IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG1))
if (board_is_sr1())
fdtfile = "ti/k3-am6528-iot2050-basic.dtb";
else
fdtfile = "ti/k3-am6528-iot2050-basic-pg2.dtb";

2
board/siemens/iot2050/iot2050.env
View file

@ -6,6 +6,8 @@
* Jan Kiszka <jan.kiszka@siemens.com>
*/
#include <environment/ti/ti_armv7_common.env>
usb_pgood_delay=900
watchdog_timeout_ms=CONFIG_WATCHDOG_TIMEOUT_MSECS

14
board/ti/am62x/am62x.env
View file

@ -16,20 +16,6 @@ mmcdev=1
bootpart=1:2
bootdir=/boot
rd_spec=-
init_mmc=run args_all args_mmc
get_overlay_mmc=
fdt address ${fdtaddr};
fdt resize 0x100000;
for overlay in $name_overlays;
do;
load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
fdt apply ${dtboaddr};
done;
get_kern_mmc=load mmc ${bootpart} ${loadaddr}
${bootdir}/${name_kern}
get_fit_mmc=load mmc ${bootpart} ${addr_fit}
${bootdir}/${name_fit}
partitions=name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
splashfile=ti.gz
splashimage=0x80200000

14
board/ti/am64x/am64x.env
View file

@ -20,20 +20,6 @@ mmcdev=1
bootpart=1:2
bootdir=/boot
rd_spec=-
init_mmc=run args_all args_mmc
get_overlay_mmc=
fdt address ${fdtaddr};
fdt resize 0x100000;
for overlay in $name_overlays;
do;
load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
fdt apply ${dtboaddr};
done;
get_kern_mmc=load mmc ${bootpart} ${loadaddr}
${bootdir}/${name_kern}
get_fit_mmc=load mmc ${bootpart} ${addr_fit}
${bootdir}/${name_fit}
partitions=name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
args_usb=run finduuid;setenv bootargs console=${console}
${optargs}

14
board/ti/am65x/am65x.env
View file

@ -19,20 +19,6 @@ mmcdev=1
bootpart=1:2
bootdir=/boot
rd_spec=-
init_mmc=run args_all args_mmc
get_overlay_mmc=
fdt address ${fdtaddr};
fdt resize 0x100000;
for overlay in $name_overlays;
do;
load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
fdt apply ${dtboaddr};
done;
get_kern_mmc=load mmc ${bootpart} ${loadaddr}
${bootdir}/${name_kern}
get_fit_mmc=load mmc ${bootpart} ${addr_fit}
${bootdir}/${name_fit}
partitions=name=root,start=0,size=-,uuid=${uuid_gpt_rootfs}
init_ubi=
run args_all args_ubi;

15
board/ti/j721e/j721e.env
View file

@ -36,21 +36,6 @@ mmcdev=1
bootpart=1:2
bootdir=/boot
rd_spec=-
init_mmc=run args_all args_mmc
get_overlay_mmc=
fdt address ${fdtaddr};
fdt resize 0x100000;
for overlay in $name_overlays;
do;
load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
fdt apply ${dtboaddr};
done;
partitions=uuid_disk=${uuid_gpt_disk};
name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
get_kern_mmc=load mmc ${bootpart} ${loadaddr}
${bootdir}/${name_kern}
get_fit_mmc=load mmc ${bootpart} ${addr_fit}
${bootdir}/${name_fit}
#if CONFIG_TARGET_J7200_A72_EVM
do_main_cpsw0_qsgmii_phyinit=1

17
board/ti/j721s2/j721s2.env
View file

@ -30,23 +30,6 @@ addr_mcur5f0_0load=0x89000000
name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw
#endif
rd_spec=-
init_mmc=run args_all args_mmc
get_overlay_mmc=
fdt address ${fdtaddr};
fdt resize 0x100000;
for overlay in $name_overlays;
do;
load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
fdt apply ${dtboaddr};
done;
partitions=uuid_disk=${uuid_gpt_disk};
name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
get_kern_mmc=load mmc ${bootpart} ${loadaddr}
${bootdir}/${name_kern}
get_fit_mmc=load mmc ${bootpart} ${addr_fit}
${bootdir}/${name_fit}
partitions=uuid_disk=${uuid_gpt_disk};
name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
rproc_fw_binaries= 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw

12
board/ti/ks2_evm/Kconfig
View file

@ -9,6 +9,9 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "k2e_evm"
config ENV_SOURCE_FILE
default "k2e_evm"
endif
if TARGET_K2HK_EVM
@ -22,6 +25,9 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "k2hk_evm"
config ENV_SOURCE_FILE
default "k2hk_evm"
endif
if TARGET_K2L_EVM
@ -35,6 +41,9 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "k2l_evm"
config ENV_SOURCE_FILE
default "k2l_evm"
endif
if TARGET_K2G_EVM
@ -48,6 +57,9 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "k2g_evm"
config ENV_SOURCE_FILE
default "k2g_evm"
endif
source "board/ti/common/Kconfig"

12
board/ti/ks2_evm/k2e_evm.env Normal file
View file

@ -0,0 +1,12 @@
#include <environment/ti/ti_armv7_common.env>
#include <environment/ti/ti_armv7_keystone2.env>
findfdt=setenv fdtfile ${name_fdt}
boot=ubi
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048
name_fdt=keystone-k2e-evm.dtb
name_mon=skern-k2e.bin
name_ubi=k2e-evm-ubifs.ubi
name_uboot=u-boot-spi-k2e-evm.gph
name_fs=arago-console-image-k2e-evm.cpio.gz

45
board/ti/ks2_evm/k2g_evm.env Normal file
View file

@ -0,0 +1,45 @@
#include <environment/ti/ti_armv7_common.env>
#include <environment/ti/ti_armv7_keystone2.env>
#include <environment/ti/mmc.env>
set_name_pmmc=setenv name_pmmc ti-sci-firmware-k2g.bin
dev_pmmc=0
get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}
get_pmmc_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_pmmc}
get_pmmc_ramfs=run get_pmmc_net
get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} ${bootdir}/${name_pmmc}
get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}
run_pmmc=rproc init;
rproc list;
rproc load ${dev_pmmc} ${loadaddr} 0x${filesize};
rproc start ${dev_pmmc}
boot=mmc
console=ttyS0,115200n8
bootpart=0:2
bootdir=/boot
rd_spec=-
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048
findfdt=
if test $board_name = 66AK2GGP; then
setenv name_fdt keystone-k2g-evm.dtb; fi;
if test $board_name = 66AK2GG1; then
setenv name_fdt keystone-k2g-evm.dtb; fi;
if test $board_name = 66AK2GIC; then
setenv name_fdt keystone-k2g-ice.dtb; fi;
if test $board_name = 66AK2GI1; then
setenv name_fdt keystone-k2g-ice.dtb; fi;
if test $name_fdt = undefined; then
echo WARNING: Could not determine device tree to use; fi;
setenv fdtfile ${name_fdt}
name_mon=skern-k2g.bin
name_ubi=k2g-evm-ubifs.ubi
name_uboot=u-boot-spi-k2g-evm.gph
init_mmc=run args_all args_mmc
init_fw_rd_mmc=load mmc ${bootpart} ${rdaddr} ${bootdir}/${name_fw_rd}; run set_rd_spec
get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}
get_kern_mmc=load mmc ${bootpart} ${loadaddr} ${bootdir}/${name_kern}
get_mon_mmc=load mmc ${bootpart} ${addr_mon} ${bootdir}/${name_mon}
name_fs=arago-base-tisdk-image-k2g-evm.cpio

12
board/ti/ks2_evm/k2hk_evm.env Normal file
View file

@ -0,0 +1,12 @@
#include <environment/ti/ti_armv7_common.env>
#include <environment/ti/ti_armv7_keystone2.env>
findfdt=setenv fdtfile ${name_fdt}
boot=ubi
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048
name_fdt=keystone-k2hk-evm.dtb
name_mon=skern-k2hk.bin
name_ubi=k2hk-evm-ubifs.ubi
name_uboot=u-boot-spi-k2hk-evm.gph
name_fs=arago-console-image-k2hk-evm.cpio.gz

12
board/ti/ks2_evm/k2l_evm.env Normal file
View file

@ -0,0 +1,12 @@
#include <environment/ti/ti_armv7_common.env>
#include <environment/ti/ti_armv7_keystone2.env>
findfdt=setenv fdtfile ${name_fdt}
boot=ubi
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,4096
name_fdt=keystone-k2l-evm.dtb
name_mon=skern-k2l.bin
name_ubi=k2l-evm-ubifs.ubi
name_uboot=u-boot-spi-k2l-evm.gph
name_fs=arago-console-image-k2l-evm.cpio.gz\0"

1
configs/am62x_evm_a53_defconfig
View file

@ -30,6 +30,7 @@ CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;"
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80c80000
CONFIG_SPL_BSS_MAX_SIZE=0x80000

8
configs/iot2050_pg1_defconfig → configs/iot2050_defconfig
View file

@ -8,7 +8,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SOC_K3_AM654=y
CONFIG_TARGET_IOT2050_A53_PG1=y
CONFIG_TARGET_IOT2050_A53=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000
CONFIG_ENV_SIZE=0x20000
@ -29,12 +29,17 @@ CONFIG_SPL_SPI=y
CONFIG_PCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_SPL_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_FLUSH_STDIN=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE to stop autoboot in %d seconds...\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_BOOTCOMMAND="run start_watchdog; run distro_bootcmd"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
@ -73,7 +78,6 @@ CONFIG_CMD_TIME=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIST="k3-am6528-iot2050-basic k3-am6548-iot2050-advanced"
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl"
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y

150
configs/iot2050_pg2_defconfig
View file

@ -1,150 +0,0 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_K3=y
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SOC_K3_AM654=y
CONFIG_TARGET_IOT2050_A53_PG2=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am6528-iot2050-basic-pg2"
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SYS_PROMPT="IOT2050> "
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6a0000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_PCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_SPL_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTCOMMAND="run start_watchdog; run distro_bootcmd"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a00000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SYS_SPL_MALLOC=y
CONFIG_SYS_SPL_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x380000
CONFIG_SYS_MAXARGS=64
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_USB=y
CONFIG_CMD_WDT=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIST="k3-am6528-iot2050-basic-pg2 k3-am6548-iot2050-advanced-pg2 k3-am6548-iot2050-advanced-m2"
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl"
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_TI_SCI=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_DMA_CHANNELS=y
CONFIG_TI_K3_NAVSS_UDMA=y
CONFIG_TI_SCI_PROTOCOL=y
CONFIG_DA8XX_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_LED=y
CONFIG_SPL_LED=y
CONFIG_LED_GPIO=y
CONFIG_SPL_LED_GPIO=y
CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PCI_KEYSTONE=y
CONFIG_PHY=y
CONFIG_AM654_PHY=y
CONFIG_OMAP_USB2_PHY=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_PINCTRL_SINGLE=y
CONFIG_POWER_DOMAIN=y
CONFIG_TI_SCI_POWER_DOMAIN=y
CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_RESET_TI_SCI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
CONFIG_SOC_TI=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_TI_SCI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
# CONFIG_WATCHDOG is not set
# CONFIG_WATCHDOG_AUTOSTART is not set
CONFIG_WATCHDOG_TIMEOUT_MSECS=0
CONFIG_WDT=y
CONFIG_WDT_K3_RTI=y
CONFIG_WDT_K3_RTI_LOAD_FW=y
CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN=y

1
configs/k2e_evm_defconfig
View file

@ -58,7 +58,6 @@ CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y

1
configs/k2e_hs_evm_defconfig
View file

@ -34,7 +34,6 @@ CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y

1
configs/k2g_evm_defconfig
View file

@ -56,7 +56,6 @@ CONFIG_CMD_REMOTEPROC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y

1
configs/k2g_hs_evm_defconfig
View file

@ -33,7 +33,6 @@ CONFIG_CMD_REMOTEPROC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="keystone-k2g-generic keystone-k2g-evm keystone-k2g-ice"

1
configs/k2hk_evm_defconfig
View file

@ -58,7 +58,6 @@ CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y

1
configs/k2hk_hs_evm_defconfig
View file

@ -34,7 +34,6 @@ CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y

1
configs/k2l_evm_defconfig
View file

@ -58,7 +58,6 @@ CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y

1
configs/k2l_hs_evm_defconfig
View file

@ -35,7 +35,6 @@ CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_BOOTP_DNS2=y
CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y

31
doc/board/siemens/iot2050.rst
View file

@ -66,17 +66,16 @@ U-Boot:
.. code-block:: text
$ export ATF=/path/to/bl31.bin
$ export TEE=/path/to/tee-pager_v2.bin
# configure for PG1
$ make iot2050_pg1_defconfig
# or configure for PG2 or the M.2 variant
$ make iot2050_pg2_defconfig
$ export BL31=/path/to/bl31.bin
$ export TEE=/path/to/tee-raw.bin
$ make iot2050_defconfig
$ make
This will generate two different flash images: flash-p1.bin that targets the
first generation of IOT2050 devices and flash-pg2.bin that runs on PG2
including M.2 devices.
Flashing
--------
@ -85,20 +84,20 @@ Via U-Boot:
.. code-block:: text
IOT2050> sf probe
IOT2050> load mmc 0:1 $loadaddr /path/to/flash.bin
IOT2050> load mmc 0:1 $loadaddr /path/to/flash-pgX.bin
IOT2050> sf update $loadaddr 0x0 $filesize
Via external programmer Dediprog SF100 or SF600:
.. code-block:: text
$ dpcmd --vcc 2 -v -u flash.bin
$ dpcmd --vcc 2 -v -u flash-pgX.bin
Signing (optional)
------------------
To enable verified boot for the firmware artifacts after the Siemens-managed
first-stage loader (seboot_pg*.bin), the following steps need to be taken
first-stage loader (seboot_pgX.bin), the following steps need to be taken
before and after the build:
Generate dtsi holding the public key
@ -131,8 +130,8 @@ Build U-Boot
See related section above.
Sign flash.bin
^^^^^^^^^^^^^^
Sign flash-pgX.bin
^^^^^^^^^^^^^^^^^^
In the build folder still containing artifacts from step 3, invoke:
@ -140,10 +139,10 @@ In the build folder still containing artifacts from step 3, invoke:
tools/iot2050-sign-fw.sh /path/to/key.pem
Flash signed flash.bin
^^^^^^^^^^^^^^^^^^^^^^
Flash signed flash-pgX.bin
^^^^^^^^^^^^^^^^^^^^^^^^^^
The signing has happen in-place in flash.bin, thus the flashing procedure
The signing has happen in-place in flash-pgX.bin, thus the flashing procedure
described above.
M.2 slot configuration

2
drivers/net/ti/Kconfig
View file

@ -41,8 +41,10 @@ endchoice
config TI_AM65_CPSW_NUSS
bool "TI K3 AM65x MCU CPSW Nuss Ethernet controller driver"
depends on ARCH_K3
imply DM_MDIO
imply MISC_INIT_R
imply MISC
imply SYSCON
select PHYLIB
help
This driver supports TI K3 MCU CPSW Nuss Ethernet controller

175
drivers/net/ti/am65-cpsw-nuss.c
View file

@ -15,13 +15,16 @@
#include <dm.h>
#include <dm/device_compat.h>
#include <dm/lists.h>
#include <dm/pinctrl.h>
#include <dma-uclass.h>
#include <dm/of_access.h>
#include <miiphy.h>
#include <net.h>
#include <phy.h>
#include <power-domain.h>
#include <regmap.h>
#include <soc.h>
#include <syscon.h>
#include <linux/bitops.h>
#include <linux/soc/ti/ti-udma.h>
@ -100,8 +103,6 @@ struct am65_cpsw_common {
fdt_addr_t cpsw_base;
fdt_addr_t mdio_base;
fdt_addr_t ale_base;
fdt_addr_t gmii_sel;
fdt_addr_t mac_efuse;
struct clk fclk;
struct power_domain pwrdmn;
@ -231,18 +232,37 @@ out:
#define AM65_GMII_SEL_RGMII_IDMODE BIT(4)
static void am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
phy_interface_t phy_mode, int slave)
static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
phy_interface_t phy_mode)
{
struct am65_cpsw_common *common = priv->cpsw_common;
fdt_addr_t gmii_sel = common->gmii_sel + AM65_GMII_SEL_PORT_OFFS(slave);
u32 reg;
u32 mode = 0;
struct udevice *dev = priv->dev;
u32 offset, reg, phandle;
bool rgmii_id = false;
fdt_addr_t gmii_sel;
u32 mode = 0;
ofnode node;
int ret;
ret = ofnode_read_u32(dev_ofnode(dev), "phys", &phandle);
if (ret)
return ret;
ret = ofnode_read_u32_index(dev_ofnode(dev), "phys", 1, &offset);
if (ret)
return ret;
node = ofnode_get_by_phandle(phandle);
if (!ofnode_valid(node))
return -ENODEV;
gmii_sel = ofnode_get_addr(node);
if (gmii_sel == FDT_ADDR_T_NONE)
return -ENODEV;
gmii_sel += AM65_GMII_SEL_PORT_OFFS(offset);
reg = readl(gmii_sel);
dev_dbg(common->dev, "old gmii_sel: %08x\n", reg);
dev_dbg(dev, "old gmii_sel: %08x\n", reg);
switch (phy_mode) {
case PHY_INTERFACE_MODE_RMII:
@ -261,7 +281,7 @@ static void am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
break;
default:
dev_warn(common->dev,
dev_warn(dev,
"Unsupported PHY mode: %u. Defaulting to MII.\n",
phy_mode);
/* fallthrough */
@ -274,15 +294,19 @@ static void am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
mode |= AM65_GMII_SEL_RGMII_IDMODE;
reg = mode;
dev_dbg(common->dev, "gmii_sel PHY mode: %u, new gmii_sel: %08x\n",
dev_dbg(dev, "gmii_sel PHY mode: %u, new gmii_sel: %08x\n",
phy_mode, reg);
writel(reg, gmii_sel);
reg = readl(gmii_sel);
if (reg != mode)
dev_err(common->dev,
if (reg != mode) {
dev_err(dev,
"gmii_sel PHY mode NOT SET!: requested: %08x, gmii_sel: %08x\n",
mode, reg);
return 0;
}
return 0;
}
static int am65_cpsw_start(struct udevice *dev)
@ -516,24 +540,45 @@ static void am65_cpsw_stop(struct udevice *dev)
common->started = false;
}
static int am65_cpsw_am654_get_efuse_macid(struct udevice *dev,
int slave, u8 *mac_addr)
{
u32 mac_lo, mac_hi, offset;
struct regmap *syscon;
int ret;
syscon = syscon_regmap_lookup_by_phandle(dev, "ti,syscon-efuse");
if (IS_ERR(syscon)) {
if (PTR_ERR(syscon) == -ENODEV)
return 0;
return PTR_ERR(syscon);
}
ret = dev_read_u32_index(dev, "ti,syscon-efuse", 1, &offset);
if (ret)
return ret;
regmap_read(syscon, offset, &mac_lo);
regmap_read(syscon, offset + 4, &mac_hi);
mac_addr[0] = (mac_hi >> 8) & 0xff;
mac_addr[1] = mac_hi & 0xff;
mac_addr[2] = (mac_lo >> 24) & 0xff;
mac_addr[3] = (mac_lo >> 16) & 0xff;
mac_addr[4] = (mac_lo >> 8) & 0xff;
mac_addr[5] = mac_lo & 0xff;
return 0;
}
static int am65_cpsw_read_rom_hwaddr(struct udevice *dev)
{
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct am65_cpsw_common *common = priv->cpsw_common;
struct eth_pdata *pdata = dev_get_plat(dev);
u32 mac_hi, mac_lo;
if (common->mac_efuse == FDT_ADDR_T_NONE)
return -1;
mac_lo = readl(common->mac_efuse);
mac_hi = readl(common->mac_efuse + 4);
pdata->enetaddr[0] = (mac_hi >> 8) & 0xff;
pdata->enetaddr[1] = mac_hi & 0xff;
pdata->enetaddr[2] = (mac_lo >> 24) & 0xff;
pdata->enetaddr[3] = (mac_lo >> 16) & 0xff;
pdata->enetaddr[4] = (mac_lo >> 8) & 0xff;
pdata->enetaddr[5] = mac_lo & 0xff;
am65_cpsw_am654_get_efuse_macid(dev,
priv->port_id,
pdata->enetaddr);
return 0;
}
@ -561,14 +606,62 @@ static const struct soc_attr k3_mdio_soc_data[] = {
{ /* sentinel */ },
};
static ofnode am65_cpsw_find_mdio(ofnode parent)
{
ofnode node;
ofnode_for_each_subnode(node, parent)
if (ofnode_device_is_compatible(node, "ti,cpsw-mdio"))
return node;
return ofnode_null();
}
static int am65_cpsw_mdio_setup(struct udevice *dev)
{
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct am65_cpsw_common *cpsw_common = priv->cpsw_common;
struct udevice *mdio_dev;
ofnode mdio;
int ret;
mdio = am65_cpsw_find_mdio(dev_ofnode(cpsw_common->dev));
if (!ofnode_valid(mdio))
return 0;
/*
* The MDIO controller is represented in the DT binding by a
* subnode of the MAC controller.
*
* We don't have a DM driver for the MDIO device yet, and thus any
* pinctrl setting on its node will be ignored.
*
* However, we do need to make sure the pins states tied to the
* MDIO node are configured properly. Fortunately, the core DM
* does that for use when we get a device, so we can work around
* that whole issue by just requesting a dummy MDIO driver to
* probe, and our pins will get muxed.
*/
ret = uclass_get_device_by_ofnode(UCLASS_MDIO, mdio, &mdio_dev);
if (ret)
return ret;
return 0;
}
static int am65_cpsw_mdio_init(struct udevice *dev)
{
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct am65_cpsw_common *cpsw_common = priv->cpsw_common;
int ret;
if (!priv->has_phy || cpsw_common->bus)
return 0;
ret = am65_cpsw_mdio_setup(dev);
if (ret)
return ret;
cpsw_common->bus = cpsw_mdio_init(dev->name,
cpsw_common->mdio_base,
cpsw_common->bus_freq,
@ -686,7 +779,9 @@ static int am65_cpsw_port_probe(struct udevice *dev)
if (ret)
goto out;
am65_cpsw_gmii_sel_k3(priv, pdata->phy_interface, priv->port_id);
ret = am65_cpsw_gmii_sel_k3(priv, pdata->phy_interface);
if (ret)
goto out;
ret = am65_cpsw_mdio_init(dev);
if (ret)
@ -710,8 +805,6 @@ static int am65_cpsw_probe_nuss(struct udevice *dev)
cpsw_common->ss_base = dev_read_addr(dev);
if (cpsw_common->ss_base == FDT_ADDR_T_NONE)
return -EINVAL;
cpsw_common->mac_efuse = devfdt_get_addr_name(dev, "mac_efuse");
/* no err check - optional */
ret = power_domain_get_by_index(dev, &cpsw_common->pwrdmn, 0);
if (ret) {
@ -783,19 +876,6 @@ static int am65_cpsw_probe_nuss(struct udevice *dev)
AM65_CPSW_CPSW_NU_PORT_MACSL_OFFSET;
}
node = dev_read_subnode(dev, "cpsw-phy-sel");
if (!ofnode_valid(node)) {
dev_err(dev, "can't find cpsw-phy-sel\n");
ret = -ENOENT;
goto out;
}
cpsw_common->gmii_sel = ofnode_get_addr(node);
if (cpsw_common->gmii_sel == FDT_ADDR_T_NONE) {
dev_err(dev, "failed to get gmii_sel base\n");
goto out;
}
cpsw_common->bus_freq =
dev_read_u32_default(dev, "bus_freq",
AM65_CPSW_MDIO_BUS_FREQ_DEF);
@ -837,3 +917,14 @@ U_BOOT_DRIVER(am65_cpsw_nuss_port) = {
.plat_auto = sizeof(struct eth_pdata),
.flags = DM_FLAG_ALLOC_PRIV_DMA | DM_FLAG_OS_PREPARE,
};
static const struct udevice_id am65_cpsw_mdio_ids[] = {
{ .compatible = "ti,cpsw-mdio" },
{ }
};
U_BOOT_DRIVER(am65_cpsw_mdio) = {
.name = "am65_cpsw_mdio",
.id = UCLASS_MDIO,
.of_match = am65_cpsw_mdio_ids,
};

1
drivers/timer/omap-timer.c
View file

@ -114,6 +114,7 @@ static const struct udevice_id omap_timer_ids[] = {
{ .compatible = "ti,am335x-timer" },
{ .compatible = "ti,am4372-timer" },
{ .compatible = "ti,omap5430-timer" },
{ .compatible = "ti,am654-timer" },
{}
};

11
include/configs/iot2050.h
View file

@ -15,6 +15,17 @@
#include <configs/ti_armv7_common.h>
/*
* This defines all MMC devices, even if the basic variant has no mmc1.
* The non-supported device will be removed from the boot targets during
* runtime, when that board was detected.
*/
#undef BOOT_TARGET_DEVICES
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
BOOT_TARGET_USB(func)
#ifdef CONFIG_ENV_WRITEABLE_LIST
#define CFG_ENV_FLAGS_LIST_STATIC \
"board_uuid:sw,board_name:sw,board_serial:sw,board_a5e:sw," \

18
include/configs/k2e_evm.h
View file

@ -9,26 +9,8 @@
#ifndef __CONFIG_K2E_EVM_H
#define __CONFIG_K2E_EVM_H
#include <environment/ti/spi.h>
/* U-Boot general configuration */
#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"findfdt=setenv fdtfile ${name_fdt}\0" \
"boot=ubi\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \
"name_fdt=keystone-k2e-evm.dtb\0" \
"name_mon=skern-k2e.bin\0" \
"name_ubi=k2e-evm-ubifs.ubi\0" \
"name_uboot=u-boot-spi-k2e-evm.gph\0" \
"name_fs=arago-console-image-k2e-evm.cpio.gz\0"
#include <configs/ti_armv7_keystone2.h>
#define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
/* Network */
#define CFG_KSNET_CPSW_NUM_PORTS 9

43
include/configs/k2g_evm.h
View file

@ -9,53 +9,10 @@
#ifndef __CONFIG_K2G_EVM_H
#define __CONFIG_K2G_EVM_H
#include <environment/ti/mmc.h>
#include <environment/ti/spi.h>
/* U-Boot general configuration */
#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_MMC_TI_ARGS \
DEFAULT_PMMC_BOOT_ENV \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"boot=mmc\0" \
"console=ttyS0,115200n8\0" \
"bootpart=0:2\0" \
"bootdir=/boot\0" \
"rd_spec=-\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \
"findfdt="\
"if test $board_name = 66AK2GGP; then " \
"setenv name_fdt keystone-k2g-evm.dtb; " \
"else if test $board_name = 66AK2GG1; then " \
"setenv name_fdt keystone-k2g-evm.dtb; " \
"else if test $board_name = 66AK2GIC; then " \
"setenv name_fdt keystone-k2g-ice.dtb; " \
"else if test $board_name = 66AK2GI1; then " \
"setenv name_fdt keystone-k2g-ice.dtb; " \
"else if test $name_fdt = undefined; then " \
"echo WARNING: Could not determine device tree to use;"\
"fi;fi;fi;fi; setenv fdtfile ${name_fdt}\0" \
"name_mon=skern-k2g.bin\0" \
"name_ubi=k2g-evm-ubifs.ubi\0" \
"name_uboot=u-boot-spi-k2g-evm.gph\0" \
"init_mmc=run args_all args_mmc\0" \
"init_fw_rd_mmc=load mmc ${bootpart} ${rdaddr} " \
"${bootdir}/${name_fw_rd}; run set_rd_spec\0" \
"soc_variant=k2g\0" \
"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0"\
"get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
"${bootdir}/${name_kern}\0" \
"get_mon_mmc=load mmc ${bootpart} ${addr_mon} ${bootdir}/${name_mon}\0"\
"name_fs=arago-base-tisdk-image-k2g-evm.cpio\0"
/* Network */
#define CFG_KSNET_CPSW_NUM_PORTS 2
#define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */
#define SPI_MTD_PARTS KEYSTONE_SPI1_MTD_PARTS
#include <configs/ti_armv7_keystone2.h>
#endif /* __CONFIG_K2G_EVM_H */

18
include/configs/k2hk_evm.h
View file

@ -9,26 +9,8 @@
#ifndef __CONFIG_K2HK_EVM_H
#define __CONFIG_K2HK_EVM_H
#include <environment/ti/spi.h>
/* U-Boot general configuration */
#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"findfdt=setenv fdtfile ${name_fdt}\0" \
"boot=ubi\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \
"name_fdt=keystone-k2hk-evm.dtb\0" \
"name_mon=skern-k2hk.bin\0" \
"name_ubi=k2hk-evm-ubifs.ubi\0" \
"name_uboot=u-boot-spi-k2hk-evm.gph\0" \
"name_fs=arago-console-image-k2hk-evm.cpio.gz\0"
#include <configs/ti_armv7_keystone2.h>
#define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
/* Network */
#define CFG_KSNET_CPSW_NUM_PORTS 5

18
include/configs/k2l_evm.h
View file

@ -9,26 +9,8 @@
#ifndef __CONFIG_K2L_EVM_H
#define __CONFIG_K2L_EVM_H
#include <environment/ti/spi.h>
/* U-Boot general configuration */
#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"findfdt=setenv fdtfile ${name_fdt}\0" \
"boot=ubi\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,4096\0" \
"name_fdt=keystone-k2l-evm.dtb\0" \
"name_mon=skern-k2l.bin\0" \
"name_ubi=k2l-evm-ubifs.ubi\0" \
"name_uboot=u-boot-spi-k2l-evm.gph\0" \
"name_fs=arago-console-image-k2l-evm.cpio.gz\0"
#include <configs/ti_armv7_keystone2.h>
#define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
/* Network */
#define CFG_KSNET_CPSW_NUM_PORTS 5

99
include/configs/ti_armv7_keystone2.h
View file

@ -63,111 +63,12 @@
#define CFG_SYS_NAND_LARGEPAGE
#define CFG_SYS_NAND_BASE_LIST { 0x30000000, }
#define DFU_ALT_INFO_MMC \
"dfu_alt_info_mmc=" \
"MLO fat 0 1;" \
"u-boot.img fat 0 1;" \
"uEnv.txt fat 0 1\0"
/* DFU settings */
#define DFUARGS \
"dfu_bufsiz=0x10000\0" \
DFU_ALT_INFO_MMC \
/* U-Boot general configuration */
/* EDMA3 */
#define KERNEL_MTD_PARTS \
"mtdparts=" \
SPI_MTD_PARTS
#define DEFAULT_FW_INITRAMFS_BOOT_ENV \
"name_fw_rd=k2-fw-initrd.cpio.gz\0" \
"set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}\0" \
"init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; " \
"run set_rd_spec\0" \
"init_fw_rd_nfs=nfs ${rdaddr} ${nfs_root}/boot/${name_fw_rd}; " \
"run set_rd_spec\0" \
"init_fw_rd_ramfs=setenv rd_spec -\0" \
"init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; " \
"run set_rd_spec\0" \
#define DEFAULT_PMMC_BOOT_ENV \
"set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \
"dev_pmmc=0\0" \
"get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0" \
"get_pmmc_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_pmmc}\0" \
"get_pmmc_ramfs=run get_pmmc_net\0" \
"get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} " \
"${bootdir}/${name_pmmc}\0" \
"get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}\0" \
"run_pmmc=rproc init; rproc list; " \
"rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; " \
"rproc start ${dev_pmmc}\0" \
#define CFG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
ENV_KS2_BOARD_SETTINGS \
DFUARGS \
"bootdir=/boot\0" \
"tftp_root=/\0" \
"nfs_root=/export\0" \
"mem_lpae=1\0" \
"uinitrd_fixup=1\0" \
"addr_ubi=0x82000000\0" \
"addr_secdb_key=0xc000000\0" \
"name_kern=zImage\0" \
"addr_mon=0x87000000\0" \
"addr_non_sec_mon=0x0c097fc0\0" \
"addr_load_sec_bm=0x0c09c000\0" \
"run_mon=mon_install ${addr_mon}\0" \
"run_mon_hs=mon_install ${addr_non_sec_mon} " \
"${addr_load_sec_bm}\0" \
"run_kern=bootz ${loadaddr} ${rd_spec} ${fdtaddr}\0" \
"init_net=run args_all args_net\0" \
"init_nfs=setenv autoload no; dhcp; run args_all args_net\0" \
"init_ubi=run args_all args_ubi; " \
"ubi part ubifs; ubifsmount ubi:rootfs;\0" \
"get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
"get_fdt_nfs=nfs ${fdtaddr} ${nfs_root}/boot/${name_fdt}\0" \
"get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0" \
"get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
"get_kern_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_kern}\0" \
"get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0" \
"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
"get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}\0" \
"get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}\0" \
"get_fit_net=dhcp ${addr_fit} ${tftp_root}/${name_fit}\0" \
"get_fit_nfs=nfs ${addr_fit} ${nfs_root}/boot/${name_fit}\0" \
"get_fit_ubi=ubifsload ${addr_fit} ${bootdir}/${name_fit}\0" \
"get_fit_mmc=load mmc ${bootpart} ${addr_fit} ${bootdir}/${name_fit}\0" \
"get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0" \
"get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \
"burn_uboot_spi=sf probe; sf erase 0 0x100000; " \
"sf write ${loadaddr} 0 ${filesize}\0" \
"burn_uboot_nand=nand erase 0 0x100000; " \
"nand write ${loadaddr} 0 ${filesize}\0" \
"args_all=setenv bootargs console=ttyS0,115200n8 rootwait " \
KERNEL_MTD_PARTS \
"args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
"root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
"${nfs_options} ip=dhcp\0" \
"nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
"get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
"get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
"get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
"get_fit_ramfs=dhcp ${addr_fit} ${tftp_root}/${name_fit}\0" \
"get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \
"get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
"get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}\0" \
"burn_ubi=nand erase.part ubifs; " \
"nand write ${addr_ubi} ubifs ${filesize}\0" \
"init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
"args_ramfs=setenv bootargs ${bootargs} " \
"rdinit=/sbin/init rw root=/dev/ram0 " \
"initrd=0x808080000,80M\0" \
"no_post=1\0"
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>

14
include/environment/ti/mmc.env
View file

@ -60,3 +60,17 @@ mmcboot=mmc dev ${mmcdev};
fi;
fi;
init_mmc=run args_all args_mmc
get_overlay_mmc=
fdt address ${fdtaddr};
fdt resize 0x100000;
for overlay in $name_overlays;
do;
load mmc ${bootpart} ${dtboaddr} ${bootdir}/dtb/${overlay} &&
fdt apply ${dtboaddr};
done;
get_kern_mmc=load mmc ${bootpart} ${loadaddr}
${bootdir}/${name_kern}
get_fit_mmc=load mmc ${bootpart} ${addr_fit}
${bootdir}/${name_fit}
partitions=name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}

14
include/environment/ti/spi.h
View file

@ -1,14 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com
*
* Environment variable definitions for SPI on TI boards.
*/
#ifndef __TI_SPI_H
#define __TI_SPI_H
#define KEYSTONE_SPI0_MTD_PARTS "spi0.0:1m(u-boot-spl)ro,-(misc);\0"
#define KEYSTONE_SPI1_MTD_PARTS "spi1.0:1m(u-boot-spl)ro,-(misc);\0"
#endif

61
include/environment/ti/ti_armv7_keystone2.env Normal file
View file

@ -0,0 +1,61 @@
name_fw_rd=k2-fw-initrd.cpio.gz
set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}
init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; run set_rd_spec
init_fw_rd_nfs=nfs ${rdaddr} ${nfs_root}/boot/${name_fw_rd}; run set_rd_spec
init_fw_rd_ramfs=setenv rd_spec -
init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; run set_rd_spec
dfu_bufsiz=0x10000
dfu_alt_info_mmc=
MLO fat 0 1;
u-boot.img fat 0 1;
uEnv.txt fat 0 1
bootdir=/boot
tftp_root=/
nfs_root=/export
mem_lpae=1
uinitrd_fixup=1
addr_ubi=0x82000000
addr_secdb_key=0xc000000
name_kern=zImage
addr_mon=0x87000000
addr_non_sec_mon=0x0c097fc0
addr_load_sec_bm=0x0c09c000
run_mon=mon_install ${addr_mon}
run_mon_hs=mon_install ${addr_non_sec_mon} ${addr_load_sec_bm}
run_kern=bootz ${loadaddr} ${rd_spec} ${fdtaddr}
init_net=run args_all args_net
init_nfs=setenv autoload no; dhcp; run args_all args_net
init_ubi=run args_all args_ubi; ubi part ubifs; ubifsmount ubi:rootfs;
get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}
get_fdt_nfs=nfs ${fdtaddr} ${nfs_root}/boot/${name_fdt}
get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}
get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}
get_kern_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_kern}
get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}
get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}
get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}
get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}
get_fit_net=dhcp ${addr_fit} ${tftp_root}/${name_fit}
get_fit_nfs=nfs ${addr_fit} ${nfs_root}/boot/${name_fit}
get_fit_ubi=ubifsload ${addr_fit} ${bootdir}/${name_fit}
get_fit_mmc=load mmc ${bootpart} ${addr_fit} ${bootdir}/${name_fit}
get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}
get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}
burn_uboot_spi=sf probe; sf erase 0 0x100000; sf write ${loadaddr} 0 ${filesize}
burn_uboot_nand=nand erase 0 0x100000; nand write ${loadaddr} 0 ${filesize}
args_all=setenv bootargs console=ttyS0,115200n8 rootwait
args_net=setenv bootargs ${bootargs} rootfstype=nfs root=/dev/nfs rw nfsroot=${serverip}:${nfs_root},${nfs_options} ip=dhcp
nfs_options=v3,tcp,rsize=4096,wsize=4096
get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}
get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}
get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}
get_fit_ramfs=dhcp ${addr_fit} ${tftp_root}/${name_fit}
get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}
get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}
get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}
burn_ubi=nand erase.part ubifs; nand write ${addr_ubi} ubifs ${filesize}
init_ramfs=run args_all args_ramfs get_fs_ramfs
args_ramfs=setenv bootargs ${bootargs} rdinit=/sbin/init rw root=/dev/ram0 initrd=0x808080000,80M
no_post=1

11
tools/iot2050-sign-fw.sh
View file

@ -39,13 +39,10 @@ CERT_X509=$(mktemp XXXXXXXX.crt)
openssl req -new -x509 -key $1 -nodes -outform DER -out $CERT_X509 -config $TEMP_X509 -sha512
cat $CERT_X509 tispl.bin > tispl.bin_signed
# currently broken in upstream
#source/tools/binman/binman replace -i flash.bin -f tispl.bin_signed blob@0x180000
dd if=tispl.bin_signed of=flash.bin bs=$((0x1000)) seek=$((0x180000/0x1000)) conv=notrunc
source/tools/binman/binman replace -i flash-pg1.bin -f tispl.bin_signed fit@180000
source/tools/binman/binman replace -i flash-pg2.bin -f tispl.bin_signed fit@180000
rm $TEMP_X509 $CERT_X509
tools/mkimage -G $1 -r -o sha256,rsa4096 -F fit@0x380000.fit
# currently broken in upstream
#source/tools/binman/binman replace -i flash.bin -f fit@0x380000.fit fit@0x380000
dd if=fit@0x380000.fit of=flash.bin bs=$((0x1000)) seek=$((0x380000/0x1000)) conv=notrunc
source/tools/binman/binman sign -i flash-pg1.bin -k $1 -a sha256,rsa4096 fit@380000
source/tools/binman/binman sign -i flash-pg2.bin -k $1 -a sha256,rsa4096 fit@380000