Commit graph

24141 commits

Author SHA1 Message Date
Marek Vasut
aa1de631e5 arm64: dts: imx8mp: Add EQoS RMII pin mux on i.MX8MP DHCOM
The i.MX8MP DHCOM SoM may come with either KSZ9131RNXI RGMII PHY
or LAN8740Ai RMII PHY on the SoM attached to EQoS MAC. Add pin
mux settings for both options, so that DT overlay can override
these settings on SoM variant with the LAN8740Ai PHY.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-03-30 08:40:27 +02:00
Marek Vasut
c46fa5d6c3 arm64: dts: imx8mp: Adjust EQoS PHY address on i.MX8MP DHCOM
The current variant of the SoM has LAN8740Ai PHY connected to EQoS
strapped to MDIO address 0 , adjust the MDIO address to match the
hardware.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-03-30 08:40:27 +02:00
Pali Rohár
babc1806c2 arm: mvebu: Define all options for AXP BOOT_FROM_* macros
Definitions are according to the MV78460 Hardware Specifications.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-30 07:05:20 +02:00
Pali Rohár
3ac1a064e7 arm: mvebu: Define all BOOTROM_ERR_MODE_* macros
A385 BootROM fills into bits [31:28] of register 0x182d0 tracing value,
which represents in which state BootROM currently is. BootROM fills one
of the possible values: 0x2 (CPU initialization), 0x3 (UART detection),
0x6 (UART booting), 0x8 (PCI Express booting), 0x9 (parallel or SPI NOR
booting), 0xA (parallel or SPI NAND booting), 0xB (SATA booting) and 0xE
(SD / eMMC booting).

Meaning of these values matches TRACE_* macros from Marvell soc_spec.h file:
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/blob/u-boot-2013.01-armada-18.06/tools/marvell/doimage_mv/soc_spec.h

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-30 07:05:20 +02:00
Pali Rohár
4f67eba733 arm: mvebu: Define all options for A38x BOOT_FROM_* macros
Disassembling A385 BootROM binary reveal how BootROM interprets strapping
pins for Boot Device Mode. All possible options are:

0x00..0x07 -> Parallel NOR
0x08..0x15 -> Parallel NAND
0x16..0x17 -> Parallel NOR
0x18..0x25 -> Parallel NAND
0x26..0x27 -> SPI NAND
0x28..0x29 -> UART xmodem
0x2a..0x2b -> SATA
0x2c..0x2d -> PCI Express
0x2e..0x2f -> Parallel NOR
0x30..0x31 -> SD / eMMC
0x32..0x39 -> SPI NOR
0x3a..0x3c -> Parallel NOR
0x3d..0x3e -> UART debug console
0x3f       -> Invalid

Note that Boot Device Mode Options in A38x Hardware Specifications is
incomplete.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-30 07:05:20 +02:00
Pali Rohár
7ba084c7f8 arm: mvebu: Convert BOOT_FROM_* constants to function macros
This allows to merge BOOT_FROM_MMC and BOOT_FROM_MMC_ALT constants to one
macro. And also allows to extend other BOOT_FROM_* macros for other
variants.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-30 07:05:20 +02:00
Pali Rohár
4642bb3e76 arm: mvebu: Remove A38x BOOT_FROM_SATA 0x22 constant
A385 BootROM treats strapping configuration 0x22 as SPI-NAND. So remove
incorrect definition 0x22 as SATA. SATA on A385 has configuration 0x2A.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-30 07:05:20 +02:00
Pali Rohár
2360409d9c arm: mvebu: Remove A38x BOOT_FROM_UART_ALT 0x3f constant
A385 BootROM treats strapping configuration 0x3f as invalid. When booting
fails (e.g. because of invalid configuration) then BootROM fallbacks to
UART booting.

Detecting BootROM fallback to UART booting is implemented in U-Boot since
commit 2fd4284051 ("ARM: mach-mvebu: handle fall-back to UART boot").

So there is no need to define BOOT_FROM_UART_ALT constant and special
handling for it anymore, remove it.

This change effectively revers commit f3a88e2ca1 ("arm: mvebu: fix boot
from UART on ClearFog Base").

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-30 07:05:20 +02:00
Pali Rohár
785f5379e0 arm: mvebu: Cleanup get_boot_device() code
Show correct information in debug() output and use correct names for variables.

No functional change.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-30 07:05:20 +02:00
Martin Rowe
c733fe91e4 arm: mvebu: clearfog: Detect MMC vs SDHC and fixup fdt
[upstream of vendor commit 19a96f7c40a8fc1d0a6546ac2418d966e5840a99]

The Clearfog devices have only one SDHC device. This is either eMMC if
it is populated on the SOM or SDHC if not. The Linux device tree assumes
the SDHC case. Detect if the device is an eMMC and fixup the device-tree
so it will be detected by Linux.

Ported from vendor repo at https://github.com/SolidRun/u-boot

Signed-off-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-30 07:05:20 +02:00
Martin Rowe
e3104d81f6 arm: mvebu: clearfog: Fix MMC detection
A388 Clearfog MMC is either SD Card or eMMC with different behaviour for
both. Setting the device to non-removable in the u-boot.dtsi allows both
to correctly detect the device.

Signed-off-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-30 07:05:20 +02:00
Ye Li
20ba9f252a imx: spl_imx_romapi: Get and print boot stage
Get and print boot stage through ROM API in SPL

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-30 00:45:39 +02:00
Fabio Estevam
5fddcbbdab pico-imx6: Pass the mmc alias to fix boot regression
Originally, the mmc aliases node was present in imx6qdl-pico.dtsi.

After the sync with Linux in commit d0399a46e7 ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.

This causes a boot regression in which the eMMC card cannot be found anymore.

Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the eMMC (esdhc3) was
mapped to mmc0.

Fixes: d0399a46e7 ("imx6dl/imx6qdl: synchronise device trees with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-03-29 22:27:39 +02:00
Ye Li
569dab887b imx: ele_ahab: Remove OEM Secure World Closed print
The OEM Secure World Closed is not a valid lifecycle on iMX8ULP/iMX9.
So remove it from lifecycle print.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:38 +02:00
Ye Li
fe787f277d imx: ele_ahab: confirm lifecycle before closing the part
Before moving the lifecycle to OEM closed, confirm the lifecycle is
OEM open, otherwise cancel to move forward the lifecycle.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:38 +02:00
Ye Li
040fc2be78 misc: sentinel: s400_api: Use new command request definitions
Remove legacy command definitions, change to use new ELE_xxx command
request.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:38 +02:00
Ye Li
07816f086c imx: ahab: Move imx9 and imx8ulp AHAB support together
Use common file ele_ahab.c for i.MX9 and iMX8ULP AHAB support, since
both of them use same sentinel ELE APIs

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:38 +02:00
Ye Li
619d0c2c18 imx93: ahab: Get and decode AHAB events
For ahab_status command, support to get and decode AHAB events

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:38 +02:00
Ye Li
76c184fe3a misc: sentinel: s400_api: Add get_events API
Add get_events API to retrieve any singular events that has occurred
since the FW has started from sentinel

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:38 +02:00
Ye Li
74a39c15c3 imx8ulp_evk: Change to use DDR driver
Remove the DDR initialization codes from board and enable the iMX8ULP
DDR driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
f9288c60f4 imx: sentinel: Update S400 API get info message structure
From Sentinel FW v0.0.9-9df0f503, the response message of get info API
is changed to add OEM SRK and some states (IMEM, CSAL, TRNG).
With old structure, we get failure from sentinel due to the buffer
size can't fit with new response message. So update the API structure
to fix the issue.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
f2940f3e80 imx: imx8ulp: Update clocks to meet max rate restrictions
Update PLL3/PLL4 PFD and USDHC clocks to meet maximum frequency
restrictions. Detail clock rate changes in the patch:

PLL3 PFD2: 389M -> 324M
PLL3 PFD3: 336M -> 389M
PLL3 PFD3: DIV1 336M -> 389M (OD), 194M (ND/LD)
PLL3 PFD3: DIV2 336M -> 194M (OD), 97M (ND/LD)

PLL4 PFD0: 792M -> 594M
PLL4 PFD2: 792M -> 316.8M

NIC_AP:    96M (ND) -> 192M,  48M (LD) -> 96M
NIC_LPAV:  198 (ND) -> 192M,  99M (LD) -> 96M

USDHC0:    PLL3 PFD3 DIV1, 389M (OD), 194M (ND/LD)
USDHC1:    PLL3 PFD3 DIV2, 194M (OD), 97M (ND/LD)
USDHC2:    PLL3 PFD3 DIV2, 194M (OD), 97M (ND/LD)

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
cf35290258 imx: imx8ulp: Configure XRDC PDAC and MSC for DBD owner=S400 only
This patch is used to support DBD owner fuse changed to S400 only.
The XRDC PDAC2 for LPAV pbridge5 and MSC1/2/3 for GPIO and LPAV are not
configured by S400 default setting.  So these PDAC and MSC are invalid,
only DBD owner can access the corresponding resources.

We have to configure necessary PDAC and MSC for SPL before DDR
initialization.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Peng Fan
13a95dc81b imx: imx8ulp: upower: make code cleaner
To clean the upower codes by aligning codes format, check err_code
and add detail bits list for the memory magic number

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Peng Fan
90e43bc136 imx: imx8ulp: upower: replace magic number with macro
The swton indicates the logic switch, magic number 0xfff80 is hard
to understand, so use macro.

Some board design may not have MIPI_CSI voltage input connected per
data sheet. In that case, the upower power on API may dead loop mu to wait
response, however there is no response. So remove MIPI_CSI here, let
linux power domain driver to runtime enable the power domain.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
4e08a510d2 imx: imx8ulp: Clear dividers in PLL3DIV_PFD registers
At present, in cgc1_pll3_init we don't set the pll3pfd div values,
just use the default 0. But on A1 part, ROM will set PLL3 pfd1div2
to 1 and pfd2div1 to 3.
This finally causes some clocks' rate decreased, for example USDHC.
So clear the PLL3DIV_PFD dividers to get correct rate.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
e01d1b1e30 imx: imx8ulp: Reconfigure MRC3 for SRAM0 access
Some space in SRAM0 will be protected by S400 to allow RX SecPriv mode
access only for boot purpose. Since SW will reuse the SRAM0 as SCMI
buffer and SPL container loading buffer, need to reconfigure MRC3.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
84f7da68e0 imx: imx8ulp: configure XRDC for DRAM access from S400
Need to add DRAM access permission for S400, as S400 needs to access
it When SPL calls image authentication

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
8b956bdddd imx: imx8ulp: Adjust handshake to sync TRDC and XRDC completion
To fit the DBD_EN fused part, we re-design the TRDC and XRDC assignment.
M33 will be the TRDC owner and needs to configure TRDC. A35 is the
XRDC owner, ATF will configure XRDC.

The handshake between U-boot and M33 image is used to sync TRDC and
XRDC configuration completion. Once the handshake is done, A35 and M33
can access the allowed resources in others domain.

The handshake is needed when M33 is booted or DBD_EN fused, because both
cases will enable the TRDC. If handshake is timeout, the boot will hang.
We use SIM GPR0 to pass the info from SPL to u-boot, because before the
handshake, u-boot can't access SEC SIM and FSB.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
aec9b5de44 imx: imx8ulp: Remove the TRDC configure from A35
As M33 is responsible for TRDC configuration, the settings for A35
nonsecure world access and DMA0 access are moved to M33 image.
So remove the codes to release TRDC and configure it. Just keep
the configurations for reference.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
237ce9b6c4 imx: imx8ulp: Set XRDC MRC4/5 for access DDR from APD
iMX8ULP A1 S400 ROM removes the setting for MRC4/5. So we have to set
them in SPL to allow access to DDR from A35 and APD PER masters

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
bf9866d265 imx: imx8ulp: Limit the eMMC ROM API workaround to A0.1 part
Since A1 ROM has fixed the ROM API eMMC issue, we should only use
the workaround for A0.1 part. Add a SOC revision check.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
f3272355cd imx: imx8ulp: Get chip revision from Sentinel
In both SPL and u-boot, after probing the S400 MU, get the chip revision,
lifecycle and UID from Sentinel.
Update get_cpu_rev to use the chip revision not hard coded it for A0

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:41 +02:00
Ye Li
9d89dcfcb1 imx: imx8ulp: Fix MU device probe failure
Since latest DTS has added multiple MU nodes, using compatible
string to find the device node is not proper. It finds the first
node with the compatible string matched even the node is disabled.

Signed-off-by: Ye Li <ye.li@nxp.com>
2023-03-29 20:15:41 +02:00
Christophe Leroy
017375cb94 mpc83xx: Remove CONFIG_SYS_GPIO{1/2}_PRELIM and related
Last use of CONFIG_SYS_GPIO1_PRELIM was removed by
commit fae2ea5951 ("ppc: Remove MPC8349EMDS board and ARCH_MPC8349
support").

Last use of CONFIG_SYS_GPIO2_PRELIM was removed even before by
commit 6843862342 ("ppc: Remove caddy2 / vme8349 boards")

Those two items were removed from whitelist by
commit 8cca60a2cb ("Kconfig: Remove some symbols from the whitelist")

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Fixes: fae2ea5951 ("ppc: Remove MPC8349EMDS board and ARCH_MPC8349 support")
2023-03-29 13:30:29 -04:00
Christophe Leroy
9695a7cde6 mpc83xx: Remove stale CONFIG_SYS_LBLAWBAR{4/5/6/7}_PRELIM
Last (incorrect) use of those CONFIG items was removed by
commit 9fd9abedcc ("TQM834x: remove defines causing gcc4.4 warnings")

Those items are invalid and should have been removed at the
same time because lblaw[] has only 4 elements.

And they were removed from the whitelist by
commit 9c5df7a2a9 ("mpc83xx: Migrate LBLAW_* to Kconfig")

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Fixes: 9fd9abedcc ("TQM834x: remove defines causing gcc4.4 warnings")
2023-03-29 13:30:29 -04:00
Christian Gmeiner
e44657ed74 arm: mach-k3: introduce generic board detction kconfig option
For non TI boards it is not possible to enable the do_board_detect()
call as TI_I2C_BOARD_DETECT is defined in board/ti/common/Kconfig.

I want to use do_board_detect() to dectect boards and properties based
on some SPI communication with a FPGA.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-03-29 13:30:28 -04:00
Jan Kiszka
352ed65df7 iot2050: Add support for configuring M.2 connector
The M.2 slots of the related IOT2050 variant need to be configured
according to the plugged cards. This tries to detect the card using the
M.2 configuration pins of the B-key slot. If that fails, a U-Boot
environment variable can be set to configure manually. This variable is
write-permitted also in secure boot mode as it is not able to undermine
the integrity of the booted system.

The configuration is then applied to mux the serdes and to fix up the
device tree passed to or loaded by the bootloader. The fix-ups are
coming from device tree overlays that are embedded into the firmware
image and there also integrity protected. The OS remains free to load
a device tree to which they do not apply: U-Boot will not fail to boot
in that case.

Based on original patch by Chao Zeng.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:26 -04:00
chao zeng
ed57c40783 arm: dts: iot2050: Add support for M.2 variant
Add support for the M.2 board based on the iot2050 advanced board.
The board has two m.2 connectors, one is B-keyed, the other E-keyed.
The B-key slot can connect 5G/SSD devices, and E-key can be used for
WIFI/BT devices.

This variant is covered by PG2 firmware image.

Signed-off-by: chao zeng <chao.zeng@siemens.com>
[Jan: align DT to kernel, polish wording]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:26 -04:00
Jan Kiszka
367b1bf2ce arm: dts: iot2050: Optionally embed OTP programming data into image
Use external blob otpcmd.bin to replace the 0xff filled OTP programming
command block to create a firmware image that provisions the OTP on
first boot. This otpcmd.bin is generated from the customer keys using
steps described in the meta-iot2050 integration layer for the device.

Based on original patch by Baocheng Su.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:26 -04:00
Jan Kiszka
430e9f6666 arm: dts: iot2050: Allow verifying U-Boot proper by SPL
Add hashes and configuration signature stubs to prepare verified boot
of main U-Boot by SPL.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-29 11:58:26 -04:00
Jan Kiszka
6ac9131702 iot2050: Update firmware layout
The latest version of the binary-only firmware parts come in a combined
form of FSBL and sysfw containers. This implies some layout changes to
the generated firmware image but also makes handling of artifacts much
simpler (4 files less). The env locations will not change, just the
space reserved for U-Boot will shrink from 4 to 3 MB - still plenty of
space left in practice.

Adjust configuration and documentation accordingly.

Along this change, add a new reservation for update commands of the
user-controlled OTP part. A specific userspace tool will fill it, and
the FSBL will evaluate it during boot. This reservation will use 64K of
the former sysfw section.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:26 -04:00
Su Baocheng
ffbd5b29a4 arm: dts: iot2050: Use the auto generator nodes for fdt
Refactor according to the entry `fit: Entry containing a FIT` of
document tools/binman/README.entries.

As the generator uses the device tree name for the config description,
board_fit_config_name_match requires a small adjustment as well.

Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[Jan: re-add now required CONFIG_OF_LIST, update config matching]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-29 11:58:26 -04:00
Su Baocheng
ea0f45d187 board: siemens: iot2050: Split the build for PG1 and PG2
Due to different signature keys, the PG1 and the PG2 boards can no
longer use the same FSBL (tiboot3). This makes it impossible anyway to
maintaine a single flash.bin for both variants, so we can also split the
build.

A new target is added to indicates the build is for PG1 vs. PG2 boards.
Hence now the variants have separated defconfig files.

The runtime board_is_sr1() check does make no sense anymore, so remove
it and replace with build time check.

Documentation is updated accordingly. New binary artifacts are already
available via meta-iot2050.

Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[Jan: refactor config option into targets, tweak some wordings]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2023-03-29 11:58:25 -04:00
Fabio Estevam
565681e596 imx6sx-udoo-neo-basic: Introduce the u-boot.dtsi
After the conversion to DM_SERIAL in commit 01f372d8d6 ("udoo_neo:
Select DM_SERIAL and drop iomux board level init") the SPL log is gone
and the U-Boot proper log becomes incomplete:

Core:  80 devices, 18 uclasses, devicetree: separate
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial@2020000
Out:   serial@2020000
Err:   serial@2020000
Net:   eth0: ethernet@2188000
Hit any key to stop autoboot:  0

Introduce the u-boot.dtsi file that passes the u-boot,dm-pre-reloc
properties to the relevant nodes so that UART can be used early in SPL.

With this change, the complete SPL and U-Boot messages are seen again.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-03-28 10:58:16 -04:00
Tom Rini
82b896c1d0 Revert "rockchip: Fix early use of bootph props"
While this change is correct for v2023.04 it is not correct for next
(where this is right now) nor post-v2023.04.

This reverts commit 8653e5d3b7.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-27 15:20:19 -04:00
Tom Rini
605bc145f9 Merge branch 'master' into next 2023-03-27 15:19:57 -04:00
Tom Rini
3be95cc292 rockchip: Use BOOTSTD_DEFAULTS if not DISTRO_DEFAULTS
When we do not enable DISTRO_DEFAULTS (generally, to get distro_bootcmd)
we instea do want to imply BOOTSTD_DEFAULTS so that when using bootstd
the general distro boot functionality will still work.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-27 11:16:04 -04:00
Simon Glass
2b9cc7845c rockchip: Disable DISTRO_DEFAULTS for rk3399 boards
These board have moved to standard boot but the old 'distro_bootcmd'
command is still active. Disable DISTRO_DEFAULTS to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2023-03-27 11:16:04 -04:00
Simon Glass
843e840dba x86: som-db5800-som-6867: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: e23cae3080 ("x86: som-db5800-som-6867: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Simon Glass
1683336094 x86: dfi-bt700: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: 5d1c8342ae ("x86: dfi-bt700: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Simon Glass
0086d4e5f1 x86: conga-qeval20-qa3-e3845: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: 388f93f963 ("x86: conga-qeval20-qa3-e3845: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-27 09:38:44 +08:00
Simon Glass
d86de9301b x86: bayleybay: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: f38be30868 ("x86: bayleybay: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Simon Glass
f1d87db49b x86: minnowmax: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Add documentation on how to make this change safely.

Fixes: 66e2c665f3 ("x86: minnowmax: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Tom Rini
fde439219f Pull request for efi-next-20230325
Documenation:
 
 * add man-page for efi command
 
 UEFI:
 
 * Let EFI app call ExitBootServices() before legacy booting kernel
 * Support zboot and bootm in the EFI app
 * Let efi command show configuration tables
 * Support booting a 64-bit kernel from 64-bit EFI app
 * Allocate device-tree copy from high memory
 * simplify efi_str_to_u16()
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmQfHDAACgkQxIHbvCwF
 GsRCWg/8DOCb1igYd8D2nnCTfNEQRkkRvOyc8W3O687fX04e9N3eV8eEFvgBnecL
 zF2OT+VmQPq2eWIopOfqCWrIFDr1sbSUAdcPT8aM3s/2/ONFTnnUsvt8G3Qp8vyY
 nY+M466bl8Fh841aGtmqsuwBHTddjF8WFUcsj2FAG3laHbnSsVANHDPhSe7C6Fg+
 g3FtXZf51SEudTTK8RLa/+df4tji/UX0BLOIr6JZ+xqb+y/Tg/P2N5DAqIQCBTL1
 BZ7U/yVXs8M9MHU8T5TtshUL1WvFogbZYkx1kRAH3Rkg0ArD1rxV0Xd64Gmrdoyi
 71filEFNV860ytsxBjCbE+YaczqRR1oteyPlak0ApmGf+FRKIU047hpuS2RBsJqv
 g1xZg9EsoU4wbsOfVd7FHER63YGPfmH9pa5A5ULpq60tYuoTthToV1up2XVjxiZm
 hSxWGmz7dzMlqtuJiKm1R2Nug4N6a+SPSA+l8JDWSBxXZ5Ld5HZaZ99DR+phYcbE
 nzZfIePoPq8JCVb7vMpIi7m1MdUEjNUNAWEjHa1Gug71qbgULQ4mi+z192F+h51E
 HQ8qs+T6GFzFBrNPrem4wxfNa3UeBQzyTbYiaAcQgSuY942jn9ZrZ78epZbBbPCI
 r6LSgBlmtkQoyuPzgk6oX7NRU7Mqd9jOEQaWo7RF8LjdO5UgIrM=
 =a5J7
 -----END PGP SIGNATURE-----

Merge tag 'efi-next-20230325' of https://source.denx.de/u-boot/custodians/u-boot-efi into next

Pull request for efi-next-20230325

Documenation:

* add man-page for efi command

UEFI:

* Let EFI app call ExitBootServices() before legacy booting kernel
* Support zboot and bootm in the EFI app
* Let efi command show configuration tables
* Support booting a 64-bit kernel from 64-bit EFI app
* Allocate device-tree copy from high memory
* simplify efi_str_to_u16()
2023-03-25 17:34:34 -04:00
Simon Glass
5a2a1d8093 x86: Exit EFI boot services before starting kernel
When running the EFI app, we need to exit boot services before jumping
to Linux.

At some point it may be possible to jump to Linux and pass on the system
table, and:

  * install the device-tree as configuration table
  * use LoadImage() to load the kernel image (e.g. from memory)
  * start the image with StartImage()

This should allow the Linux efistub to be used. For now, this is not
implemented.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:22 +01:00
Simon Glass
37c9f9cc86 x86: Support booting a 64-bit kernel from 64-bit U-Boot
Add the missing code to handle this. For a 64-bit kernel the entry
address is 0x200 bytes after the normal entry.

Rename the parameter to boot_linux_kernel() accordingly. Update the
comments to indicate that these are addresses, not pointers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:21 +01:00
Simon Glass
1404914ddd x86: Add return-value comment to cpu_jump_to_64bit()
This does not mention what it returns. Add the missing documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:21 +01:00
Simon Glass
90f2b5abb5 x86: Adjust bootparam.h to be more like linux
This likely came from Linux originally, so update it to match v6.2 more.
This has no functional change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:21 +01:00
Simon Glass
edf35a3027 efi: Set RUN_64BIT correctly for the EFI app
The U-Boot EFI app can run as a 64-bit program, so set the Kconfig
correctly in that case. Make sure it doesn't build SPL, since there is
no need to switch from 32 to 64 bit when running.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:21 +01:00
Tom Rini
78f67f11a9 Merge branch 'rpi-2023.04' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
- Fixes for booting newer revs of the SoC in the Raspberry Pi 4
- Propagate some firmware DT properties to the loaded DT
- Update the Zero2W upstream DT name
2023-03-24 17:00:41 -04:00
Vincent Fazio
85bdd28d2b mmc: bcm2835-host: let firmware manage the clock divisor
Newer firmware can manage the SDCDIV clock divisor register, allowing
the divisor to scale with the core as necessary.

Leverage this ability if the firmware supports it.

Adapted from the following raspberrypi Linux kernel commit:

  bcm2835-sdhost: Firmware manages the clock divisor
  08532d242d

Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-03-24 14:43:20 +00:00
Vincent Fazio
0a36afa823 arm: rpi: fallback to max clock rate for MMC clock
In rpi-firmware 25e2b597ebfb2495eab4816a276758dcc6ea21f1,
the GET_CLOCK_RATE mailbox property was changed to return the last
value set by SET_CLOCK_RATE.

https://github.com/raspberrypi/firmware/issues/1619#issuecomment-917025502

Due to this change in firmware behavior, bcm2835_get_mmc_clock now
returns a clock rate of zero since we do not issue SET_CLOCK_RATE.
This results in degraded MMC performance.

SET_CLOCK_RATE fixes the clock to a specific value and disables scaling
so is not an ideal solution.

Instead, fallback to GET_MAX_CLOCK_RATE in bcm2835_get_mmc_clock if
GET_CLOCK_RATE returns zero.

Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-03-24 14:43:20 +00:00
Pali Rohár
ae60fc6902 arm: kirkwood: Move internal registers in arch_very_early_init() function
Same change as was done for mvebu in commit 5bb2c550b1 ("arm: mvebu: Move
internal registers in arch_very_early_init() function") but for kirkwood.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-24 13:11:47 +01:00
Tony Dinh
21f622779f arm: mvebu: Set common SPI flash default speed and mode
CONFIG_SF_DEFAULT_SPEED is used in SPL SPI to configure and probe the
flash device during DM SPI uclass probing process, if the
spi-max-frequency is not available in the DTB. Currently the max
frequency is not available, because of the probing mechanism in SPI
uclass has not been fully updated to DM.

The CONFIG_SF_DEFAULT_SPEED is set to 1Mhz if a board defconfig
does not specify it. This speed is too slow and result in a few
seconds delay while the u-boot image is loaded from flash. Based on a
survey of the device tree specifications for MVEBU boards, a sane default
value should be 10Mhz. The default of 10Mhz enables an almost
instantaneously loading of the u-boot image.

Note that this patch depends on this patch series (has been merged to
u-boot-marvell/next):
https://lists.denx.de/pipermail/u-boot/2023-March/511038.html

- RESEND: correct spelling of SF_DEFAULT_MODE

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-24 08:43:42 +01:00
Tom Rini
16d82d7bfa spl: Add function prototype for spl_mmc_get_uboot_raw_sector
We did not add a prototype for spl_mmc_get_uboot_raw_sector to
include/spl.h before, so add and document one now. Correct the incorrect
prototype in board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c and
ensure that we have spl.h where we define a non-weak
spl_mmc_get_uboot_raw_sector as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-22 15:22:48 -04:00
Tom Rini
f5131e80fc arm: Correct cpu_reset function prototype on some platforms
Some platforms were not including <cpu_func.h> which sets the prototype
for reset_cpu, and in turn had it set wrong. Correct these cases.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-22 15:22:48 -04:00
Kamlesh Gurudasani
d3882531c3 arm: mach-k3: am62: move scratch board area to HSM RAM
On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.

So, move scratch board area to HSM RAM.

Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-03-22 12:51:09 -04:00
Tony Dinh
c5f4cdb8eb console: Use flush() before panic and reset
To make sure the panic and the reset messages will go out, console flush() should be used.
Sleep periods do not work in early u-boot phase when timer driver is not initialized yet.

Reference: https://lists.denx.de/pipermail/u-boot/2023-March/512233.html

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-22 12:51:08 -04:00
Tom Rini
5e207b8517 - odroid-go-ultra: setup PMIC regulators at board init
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmQa3BYACgkQd9zb2sjI
 SdGVgg/+MFYKg2vZ0jtx193b19GkCp9K5FC91jYg+oJGtWDT59b1EGoZNMC/LOmk
 iaCr2Srm4hcTKadlNrUlj2C7c1CMHMzsLuXBtC36ia1zXZR34WW28xOaWltEFfB9
 js1ryME9fB00iMwUWloCWrccluAVpP7dcoDMA4cmTqMIFAUQr+MHQw+Rd2ogqXIo
 gzYfh3xshEZdi4oUqtkojTXgLx1PLZt5sgozHbJeAw+eY78Tk9PIaSoAh5Nzlh3I
 3agzTRFY+pDVQ1YBhnS0U/eV1oevtcXbASFJs1MR4g5bGPOF4HTyiEisUNdD6rQZ
 IMDNCNwo2lgCaTaWVZuxb6jfPshMru8koSgKqccIDnMS9D4yhNvmLmFKi4J/1zJl
 ofvA0vUuO3FoaJzGGky6gnLO4jDj4MR4J0RCrOMZQptSJMiV5LXwZIp48g2xsDJZ
 RS7CLqPfy0VQ0TlJpcOTrEyETEqXsUdEs0rsxvbLWpybFNnGGzpqaP7pVCTTV/Xp
 AKKZr/fCaR2Ud2UG5NUn9vTpdUuerZS7580N3v6WbCqkgm/2/LoA5YEH37PxsCR1
 qu1063/EH/sI3yxRtSUamngWuU17IARyQ9Xl2/1vI1QalfEtGZdDNWTNB9OZkM9U
 fDIAbvI57QSzECweTHzP4dNUowbP1C9sW/3r/M1rr5zM3kSh9Zg=
 =Vk9R
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20230322' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- odroid-go-ultra: setup PMIC regulators at board init
2023-03-22 09:21:41 -04:00
Johan Jonker
d35a1392c5 arm: dts: rockchip: rk3188-radxarock-u-boot: remove timer compatible replacement
The Rockchip timer driver has been renamed after the fall back compatible.
There's no need to replace the timer compatible in rk3188-radxarock-u-boot.dtsi
anymore, so remove.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 14:12:01 +08:00
Vasily Khoruzhick
9fe2e4ab93 Revert "arm64: dts: rk356x-u-boot: Drop combphy1 assigned-clocks/rates"
This reverts commit 5bec4b0de7851a254fb4447b3599a60f95550141.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 14:12:00 +08:00
Jonas Karlman
e259f39a12 rockchip: rk3588: Add boot device detection
Enable SPL on RK3588 to detect which device it was booted from.
Fixes use of same-as-spl in u-boot,spl-boot-order prop.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:20:21 +08:00
Jonas Karlman
073d911ae6 rockchip: rk3568-rock-3a: Sync device tree from linux
Running U-Boot from eMMC on a ROCK 3 Model A result in the following:

  U-Boot SPL 2023.04-rc3 (Mar 11 2023 - 17:24:48 +0000)
  Trying to boot from MMC1
  Card did not respond to voltage select! : -110
  spl: mmc init failed with error: -95
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

The sdhci node is missing in board device tree, sync device tree from
linux v6.3-rc1 to fix booting from eMMC. Also disable sdmmc2 and uart1
nodes related to using a WiFi and BT module in the M2 slot.

Fixes: b44c54f600 ("arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:17:28 +08:00
Jonas Karlman
42f67fb51c rockchip: rk3568: Fix boot device detection
The boot source node path for emmc is using the old sdhci name.
Replace with correct mmc name and also add same-as-spl to boot order.

Fixes: 0d61f8e5f1 ("rockchip: rk3568: add boot device detection")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:17:28 +08:00
Jonas Karlman
8653e5d3b7 rockchip: Fix early use of bootph props
Running U-Boot on a ROCK 3 Model A result in the following:

  No serial driver found
  resetting ...
  no sysreset
  ### ERROR ### Please RESET the board ###

Replace bootph- props with u-boot,dm- props to fix this.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:17:28 +08:00
Marek Vasut
f54eb0bad6 ARM: rmobile: Split R-Car Gen3 into separate Kconfig from common 64bit options
There are multiple shared Kconfig options between R-Car Gen3 and Gen4.
Keep the common options in Kconfig.64 and move the R-Car Gen3 specific
options into separate Kconfig.rcar3 . The Kconfig.rcar3 contains SoC
and board list, which is limited to R-Car Gen3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 12:02:38 +01:00
Marek Vasut
ef72c1ef29 ARM: rmobile: Introduce CONFIG_RCAR_64 symbol
Introduce common Kconfig symbol for 64bit R-Car platforms and move
common configuration options into it. This is preparatory patch to
prevent duplication of Kconfig lists later on, when Gen4 is added.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 12:02:38 +01:00
Marek Vasut
dec699bea7 ARM: rmobile: Factor out SYS_SOC Kconfig option
Pull the SYS_SOC Kconfig option to avoid duplication of this option
in Kconfig.{32,64,rza1} . The default value is the same, so just set
it in one location.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 12:02:38 +01:00
Marek Vasut
6f152a713c ARM: rmobile: Sort R-Car Gen3 Kconfig lists
Sort the 'imply' and 'select' lists in R-Car Gen3 Kconfig options.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 12:02:38 +01:00
Marek Vasut
7fe9d7d1ba ARM: rmobile: Convert ifdef in rmobile_get_prr() to IS_ENABLED()
Switch ifdef in rmobile_get_prr() to IS_ENABLED() macro.
The CONFIG_RCAR_GEN3 will never have SPL counterpart, so
the IS_ENABLED() macro is the right one here. No functional
change, except for improved build test coverage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 12:02:38 +01:00
Marek Vasut
143bd4e315 ARM: renesas: Enable DTO support by default on R-Car Gen3
All R-Car Gen3 defconfigs present in U-Boot do enable DTO support,
enable it for all of R-Car Gen3 by default in Kconfig instead, so
that no new boards would miss this functionality.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 11:59:45 +01:00
Tom Rini
cefd0449d6 Xilinx changes for v2023.07-rc1
cmd:
 - Print results in hex instead of dec in smc command
 
 firmware:
 - Cover missing ZYNQMP_FIRMWARE dependencies
 
 fpga:
 - fix loads for unencrypted use case
 
 relocation
 - Add support for BE systems
 
 spi:
 - Fix xilinx_spi init reset sequence
 
 arasan nand:
 - Remove hardcoded bbt option
 - Set ofnode value
 
 xilinx:
 - Enable SMC command
 - Fix some sparse issues
 
 zynqmp:
 - Remove cdns,zynq-gem compatible string
 - Add optee node
 - Some DT cleanups
 
 zynq:
 - Some DT cleanups
 
 microblaze
 - Remove MANUAL_RELOC option
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZBHCfAAKCRDKSWXLKUoM
 ITcJAKCF8qmG8QPZptsoMj4dcceoaSJnyACfSGgH4ytUY8QkP8Yp0Z5U8HoY6a8=
 =eAAF
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2023.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2023.07-rc1

cmd:
- Print results in hex instead of dec in smc command

firmware:
- Cover missing ZYNQMP_FIRMWARE dependencies

fpga:
- fix loads for unencrypted use case

relocation
- Add support for BE systems

spi:
- Fix xilinx_spi init reset sequence

arasan nand:
- Remove hardcoded bbt option
- Set ofnode value

xilinx:
- Enable SMC command
- Fix some sparse issues

zynqmp:
- Remove cdns,zynq-gem compatible string
- Add optee node
- Some DT cleanups

zynq:
- Some DT cleanups

microblaze
- Remove MANUAL_RELOC option
2023-03-16 12:18:30 -04:00
Tom Rini
e63828bf35 Merge tag 'fsl-qoriq-next-2023-3-14' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
Enable DM_SERIAL for freescale ls2080a
Drop non DM_ETH code for freescale:
  lx2160a/ls2080rdb/ls2080aqds/ls1088a
2023-03-16 12:17:48 -04:00
Tom Rini
318af47668 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-coldfire 2023-03-15 12:03:17 -04:00
Tom Rini
016d414682 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Per Andre:

[T]hese two patches containing just devicetree updates for
Allwinner boards.
I was still hoping for a review, since we cannot import the files from
the Linux tree verbatim, but managed to write some filter script that
convinced me that the changes are fine.
The files are from Linux v6.2-rc2, but are identical to the v6.2
release.
2023-03-15 12:01:55 -04:00
Angelo Dureghello
ec4322e70b m68k: add private libgcc ashrdi3
Add ashrdi3.c to private libgcc.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-03-15 01:52:02 +01:00
Angelo Dureghello
7ff7b46e6c m68k: rename CONFIG_MCFTMR to CFG_MCFTMR
This is not a Kconfig option so changing to _CFG.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:41:57 +01:00
Angelo Dureghello
12f5489297 m68k: dts: stmark2: set correct compatible field for spi nor
Fix error:

Invalid chip select 0:1 (err=-19)

update spi nor "compatible" property with "jedec,spi-nor"
to have spi nor properly bound as a child device.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:38:19 +01:00
Angelo Dureghello
1e48392e32 arch: enable private libgcc for m68k
This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:38:19 +01:00
Angelo Dureghello
8fde9d13b9 m68k: add global variable sdhc_per_clk for m68k
The FSL eSDHC controller supports two reference clocks. They are
platform clock and periperhal clock. The global variable sdhc_clk
has already been used for platform clock.
ColdFire also uses eSHDC controller, as in arm and powerpc,
so adding sdhc_per_clk to arch_global_data.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:38:19 +01:00
Angelo Dureghello
d157a5725a m68k: use longword-based jumps
Increasing of binary size requires longword-based jumps.

Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2023-03-15 01:38:19 +01:00
Tom Rini
a5faa4a9eb Prepare v2023.04-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmQPxXsACgkQFHw5/5Y0
 tyzRWgwAlpwF0u0Xtfs+isnwy/2wb1uMKSeZTiMWkP8he48DX/+db1LHyxnb5apX
 5ULLLKnxZGDviFNw6F/Vuq/BlL8aK+K6wJm+HxdN4Df+sQZgP0kZVnZH1DcDGyJ7
 2I5mYxXCQiRfl3lG8uHdfQyGT5BOm1ZYTIBgXPzpdp/PS6Es74aIHfHS4UdsnpZ2
 dw5APUHnXsSeycbvgiZZEAQphRGplTgSmEDLZTCHD6+oIFoyJVMRr4QWc+KjYPR8
 MgfykqaITO7xKg1V2GwEWJA7LpU4L3HrK+8upSjdx0kfKw4jZoBTU5LE3dnk+6fz
 rgisMfyDGZ+w467uk9BSAO9smRRRI7GFMSkvi+kMQtVCFWCSaddkfYPlpFu1PND7
 nHfxkzoIjxeEOG8yIFF8P199w2lEorKTxlXuNBStfozvAz1wfhgq3o3WQGpvDmqF
 E+FoC7t73qVu6DVMiCXCOyUYNyI7d1tFlUhlbZPVCelVL8RX3JjMF/0uhLsOSDMc
 s4z/6fVq
 =xK+J
 -----END PGP SIGNATURE-----

Merge tag 'v2023.04-rc4' into next

Prepare v2023.04-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-14 12:06:35 -04:00
Ioana Ciornei
5a2416fd99 arch: arm: dst: fsl-ls2080a.dts: tag serial nodes with bootph-all
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:28 +08:00
Ioana Ciornei
1d37e4a18b arch: arm: dst: fsl-ls2080a.dts: sync serial nodes with Linux
Sync the serial nodes of the LS208XA RDB/QDS boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:28 +08:00
Ioana Ciornei
853c3124cd arch: arm: dst: fsl-ls2080a.dtsi: move the serial nodes under soc
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:28 +08:00
Ioana Ciornei
c445af6d23 arch: arm: dst: fsl-ls2080a.dtsi: add an 'soc' node
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:28 +08:00
Ioana Ciornei
73ba0371a1 arm: dts: ls1088a-rdb: replace 'xgmii' with '10gbase-r'
When the first device tree description was added for the ethernet nodes,
the 2 10G ports on the LS1088ARDB were wrongly described as 'xgmii'.

Fix this by replacing the two last occurrences of 'xgmii' in the device
trees of the Layerscape DPAA2 devices.

Fixes: 68c7c008e8 ("arm: dts: ls1088ardb: add DPMAC and PHY nodes")
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Neil Armstrong
de58694f0d ARM: meson: odroid-go-ultra: setup PMIC regulators are board init
The Odroid Go Ultra has 2 chained PMICs RK818 and RK818, and needs
an adjustment on the BUCK and LDO values.

Add the initial regulators values in -u-boot.dtsi & run the initial
regulator setup in a new odroid-go-ultra board.

Proper OTG and BOOST regulators are still missing to have USB-A
host properly working.

Link: https://lore.kernel.org/r/20230210-u-boot-odroid-go-ultra-pmics-setup-v1-1-1f16d62b76af@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-03-14 09:03:16 +01:00
Simon Glass
f62229227c efi: Support copy framebuffer
Add support for this to EFI in case it becomes useful. At present it just
slows things down. You can enable CONFIG_VIDEO_COPY to turn it on.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-13 13:53:01 +01:00