This function related to timer and most of the timer functions are in
time.h, so move this function there.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function can be dropped when all boards use driver model for PCI. For
now, move it into init.h with a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.
Move them over.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function belongs in time.h so move it over and add a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This reverts commit fc04b92354 where the
FVP DRAM configuration was added.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Misspelling of SPDX-License-Identifier is rather fatal than other
general typos, so must be fixed.
This file spells SPDX-Licence-Identifier.
^
I also moved it to the very top of the file with // comment style.
Detected by grepping the source tree:
$ git grep --not -e SPDX-License-Identifier --and -e SPDX-
board/armltd/vexpress64/pcie.c: * SPDX-Licence-Identifier: GPL-2.0+
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Liviu Dudau <liviu.dudau@foss.arm.com>
This is now deprecated and no board is using it. Drop it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
The interruption support had be removed for ARM architecture and
the function get_timer_masked() is no more used except in some
the timer.c files.
This patch clean each timer.c which implement this function and
remove the associated prototype in u-boot-arm.h
For timer.c, I don't verify if the weak version of get_timer
(in lib/time.c) can be used
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The interruption support had be removed for ARM architecture and
the function udelay_masked() is no more used except in some timer.c
files and have the same content than udelay() or __udelay().
This patch update each timer.c implementing this function and
remove the associated prototype in u-boot-arm.h.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.
This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.h
and replaces include directives:
#include <libfdt.h> -> #include <linux/libfdt.h>
#include <libfdt_env.h> -> #include <linux/libfdt_env.h>
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
These ARM boards are in nice shape and still being used a lot
with e.g. QEMU, so I can maintain them.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Update arm_pl180_mmci_init() prototype by adding struct mmc**
param. This is needed before converting this driver to driver model
in order to use arm_pl180_mmci_init() in driver model and in none
driver model implementation
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
We are now using an env_ prefix for environment functions. Rename setenv()
for consistency. Also add function comments in common.h.
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than relying on common.h to provide this include, which is going
away at some point, include it explicitly in each file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present
Signed-off-by: Simon Glass <sjg@chromium.org>
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Juno uses a 1:1 mapping between CPU and PCI addresses for IO. First,
that will trip devices that cannot use more than 16 bits of addresses
for IO, second it is un-necessary as the system can handle zero-based
PCI addresses just fine.
Change the mapping to start IO bus addresses from zero.
Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Commit f225d39d30 ("vexpress: Check TC2 firmware support before defaulting
to nonsec booting") added support to check if the firmware on TC2 is
configured appropriately before booting in nonsec/hyp mode.
However when booting in non-secure/hyp mode, CCI control must be done in
secure firmware and can't be done in non-secure/hyp mode. In order to
ensure that, this patch disables the cci slave port inteface so that it
is not accessed at all.
Cc: Jon Medhurst <tixy@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Jon Medhurst <tixy@linaro.org>
Tested-by: Jon Medhurst <tixy@linaro.org>
The firmware on TC2 needs to be configured appropriately before booting
in nonsec mode will work as expected, so test for this and fall back to
sec mode if required.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Introduce virtual and physical addresses in the mapping table. This change
have no impact on existing boards because they all use idential mapping.
Signed-off-by: York Sun <york.sun@nxp.com>
There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch makes the 2nd DRAM bank available on Juno only and not on
other vexpress64 targets, eg. the FVP models.
The commit below added a 2nd bank of NOR flash for Juno, but also for
all vexpress64 targets:
commit 2d0cee1ca2
Author: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Date: Mon Oct 19 11:08:31 2015 +0100
vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.
Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
Declare a secondary memory bank and set the sizes correctly.
Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation
model. Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot
the kernel.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Only compile in PCIe support if the board really uses it. Provide
a __weak stub for the init function if e.g. FVP is being built.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
On a Juno r1 the PCI controller init routine outputs the rather boring
ATR entry information.
Do this only with DEBUG defined to avoid cluttering the user's
terminal.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised
in order for the Linux kernel to be able to enumerate the bus. Add
support code here that enables the host bridge, trains the links and
sets up the Address Translation Tables.
Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
[trini: Always declare vexpress64_pcie_init and continue handling logic
inside the function]
Signed-off-by: Tom Rini <trini@konsulko.com>
Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
Declare a secondary memory bank and set the sizes correctly.
Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Create an additional FVP configuration to boot images pre-loaded into
DRAM.
Sometimes it's preferential to boot the model by loading the files
directly into DRAM via model parameters, rather than using
SemiHosting.
An example of model parmaters that are used to pre-load the files
into DRAM:
--data cluster0.cpu0=Image@0x80080000 \
--data cluster0.cpu0=fvp-base-gicv2-psci.dtb@0x83000000 \
--data cluster0.cpu0=uInitrd@0x84000000
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
[trini: Update board/armltd/vexpress64/Kconfig logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
The FVP and Juno settings were identical, but duplicated, so I removed
the duplication with this patch.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
[trini: Adjust logic to keep if/endif in the file]
Signed-off-by: Tom Rini <trini@konsulko.com>
This switches the Integrator boards over to using the device model
for its serial ports.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
CONFIG_ARMV7_VIRT depends on CONFIG_ARMV7_NONSEC, thus doesn't need to
be taken into account additionally. CONFIG_ARMV7_PSCI is only set on
boards that support CONFIG_ARMV7_NONSEC, and it only works on those.
CC: Tang Yuantian <Yuantian.Tang@freescale.com>
CC: York Sun <yorksun@freescale.com>
CC: Steve Rae <srae@broadcom.com>
CC: Andre Przywara <andre.przywara@linaro.org>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This assignment conflicts with code that add flags with
gd->flags |= FOO prior to the execution of this function.
Seems like a historical artifact and creates bugs with
early alloc().
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
The board/SoC select menu in arch/arm/Kconfig is still cluttered.
Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select
under arch/arm/mach-integrator.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Commit d8bafe1310
"ARMv8: enable DM in vexpress64 board" only enabled DM
for the simulated vexpress64 board (FVP) with the
hardcoded clock value for the simulated board, causing
a console regression on the Juno board which was using
a different clock setting.
Fix this by enabling DM for all vexpress64 boards,
defining the clock frequency per-board, deleting the
static array of PL01x ports from the config file and
relying solely on the port defined in the boardfile
using platform data.
Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This variant that is neither FVP / Base Model or Juno Versatile
Express 64bit is confusing. Get rid of it unless someone can
point out what machine that really is. Seems to be an evolutional
artifact in the config base.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This removes the kludgy late board init from the FVP simulator
version of Versatile Express 64bit (ARMv8), and replace it with
a default boot command using the new smhload command to load
the files using semihosting. Tested on the Foundation Model.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Various files are needlessly rebuilt every time due to the version and
build time changing. As version.h is not actually needed, remove the
include.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Macpaul Lin <macpaul@andestech.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: York Sun <yorksun@freescale.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Cc: "David Müller" <d.mueller@elsoft.ch>
Cc: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Robert Baldyga <r.baldyga@samsung.com>
Cc: Torsten Koschorrek <koschorrek@synertronixx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Łukasz Majewski <l.majewski@samsung.com>
While the Freescale ARMv8 board LS2085A will enter U-Boot both
on a master and a secondary (slave) CPU, this is not the common
behaviour on ARMv8 platforms. The norm is that U-Boot is entered
from the master CPU only, while the other CPUs are kept in
WFI (wait for interrupt) state.
The code determining which CPU we are running on is using the
MPIDR register, but the definition of that register varies with
platform to some extent, and handling multi-cluster platforms
(such as the Juno) will become cumbersome. It is better to only
enable the multiple entry code on machines that actually need
it and disable it by default.
Make the single entry default and add a special
ARMV8_MULTIENTRY KConfig option to be used by the
platforms that need multientry and set it for the LS2085A.
Delete all use of the CPU_RELEASE_ADDR from the Vexpress64
boards as it is just totally unused and misleading, and
make it conditional in the generic start.S code.
This makes the Juno platform start U-Boot properly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This configures the Juno board to enable ethernet using the
SMSC9118 ethernet controller found in the board. Tested by
TFTP-booting a kernel over ethernet.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Juno Development Platform is a physical Versatile Express
device with some differences from the emulated semihosting
models. The main difference is that the system is split in
a SoC and an FPGA where the SoC hosts the serial ports at
totally different adresses.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Versatile Express ARMv8 semihosted FVP platform is still
using the legacy CONFIG_SYS_EXTRA_OPTIONS method to configure
some compile-time flags. Get rid of this and create a Kconfig
entry for the FVP model, and a selectable bool for the
semihosting library.
The FVP subboard is now modeled as a target choice so we can
eventually choose between different ARMv8 versatile express
boards (FVP, base model, Juno...) this way. All dependent
symbols are updated to reflect this.
The 64bit Versatile Express board symbols are renamed
VEXPRESS64 so we have some chance to see what is actually
going on. Tested on the FVP fast model.
Acked-by: Steve Rae <srae@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As agreed with Steve Rae I'm taking over maintenance of the
semihosted, emulated FVP/foundation model Versatile Express
64 bit board variant.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Steve Rae <srae@broadcom.com>
This commit introduces a Kconfig symbol for each ARM CPU:
CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136,
CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100.
Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected
for CPU_ARM1176 and CPU_V7.
For each target, the corresponding CPU is selected and the definition of
SYS_CPU in the corresponding Kconfig file is removed.
Also, it removes redundant "string" type in some Kconfig files.
Signed-off-by: Georges Savoundararadj <savoundg@gmail.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Since commit ddaf5c8f30
(patman: RunPipe() should not pipe stdout/stderr unless asked),
Patman spits lots of "Invalid MAINTAINERS address: '-'"
error messages for patches with global changes.
It takes too long for Patman to process them.
Anyway, "M: -" does not carry any important information.
Rather, it is just like a place holder in case of assigning
a new board maintainer. Let's comment out.
This commit can be reproduced by the following command:
find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/'
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The "S: Orphan" in MAINTAINERS means that the maintainer in the
"M:" field is unreachable (i.e. the email address is not working).
(Refer to the definition of "Orphan" adopted in U-Boot
in the log of commit 31f1b654b2,
"boards.cfg: move boards with invalid emails to Orphan")
For patch files adding global changes, scripts/get_maintainer.pl
adds bunch of such invalid email addresses, which results in
tons of annoying bounce emails.
This commit can be reproduced by the following command:
find . -name MAINTAINERS | xargs sed -i -e '
/^M:[[:blank:]]/ {
N
/S:[[:blank:]]Orphan/s/^/#/
}
'
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
We do not have to distinguish CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI
from CONFIG_TARGET_VEXPRESS_AEMV8A. Rename the former to the latter.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Cc: David Feng <fenghua@phytium.com.cn>
Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME}
are specified in arch/Kconfig.
We can delete the ones in arch and board Kconfig files.
This commit can be easily reproduced by the following command:
find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e '
/config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ {
N
s/\n[[:space:]]*string//
}
'
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The email address of Matt Waddel is no longer working.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Alexei Fedorov <alexie.fedorov@arm.com>
We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.
The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.
After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.
TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit adds:
- arch/${ARCH}/Kconfig
provide a menu to select target boards
- board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
set CONFIG macros to the appropriate values for each board
- configs/${TARGET_BOARD}_defconfig
default setting of each board
(This commit was automatically generated by a conversion script
based on boards.cfg)
In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.
But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF
images and u-boot, and does this for virtual platforms by using
semihosting. This commit extends this idea by allowing u-boot to also
use semihosting to load the kernel/ramdisk/dtb. This eliminates the need
for a bootwrapper and produces a more realistic boot sequence with
virtual models.
Though the semihosting code is quite generic, support for armv7 in
fastmodel is less useful due to the wide range of available silicon
and the lack of a free armv7 fastmodel, so this change contains an
untested armv7 placeholder for the service trap opcode.
Please refer to doc/README.semihosting for a more detailed description
of semihosting and how it is used with the armv8 virtual platforms.
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Cc: trini@ti.com
Cc: fenghua@phytium.com.cn
Cc: bhupesh.sharma@freescale.com
Remove the last uses of symbol offsets in ARM U-Boot.
Remove some needless uses of _TEXT_BASE.
Remove all _TEXT_BASE definitions.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
If timer_init() is made a weak stub function, then it allows us to
remove several empty timer_init functions for those boards that
already have a timer initialized when u-boot starts. Architectures
that use the timer framework may also remove the need for timer.c.
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
When U-Boot is configured for Versatile AB, it will still pass
the machine ID of Versatile PB to the kernel. After this simple
fix the system boots correctly.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
To enable hypervisors utilizing the ARMv7 virtualization extension
on the Versatile Express board with the A15 core tile, we add the
required configuration variable.
Also we define the board specific smp_set_cpu_boot_addr() function to
set the start address for secondary cores in the VExpress specific
manner.
There is no need to provide a custom smp_waitloop() function here.
This also serves as an example for what to do when adding support for
new boards.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
This patch creates a new config for the A5 dual core tile that includes the
generic config for the Versatile Express platform.
The generic config has been modified to provide support for the Extended
Memory Map, as used on the A5 core tile. A5 does not support the legacy
memory map.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
The current ca9x4_ct_vxp platform contains support for a Versatile
Express motherboard with a quad core A9 core tile.
This patch separates the Versatile Express motherboard code and the
A9 specific code, to ease supporting more core tiles in the next
patches.
Andre: merged the first two of Ryan's original patches and did some
checkpatch fixes.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Configuration in vexpress and u8500.v1 is different from what
is needed in u8500.v2. As such, card configuration specifics need
to reside in the board file rather than the driver.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
Also drop a few files referring to no longer / not yet supported
boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Jason Jin <jason.jin@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
commit f31a911fe (arm, post: add missing post_time_ms for arm)
enables get_ticks and get_tbclk for all arm based boards,
arm/vexpress also needs these functions to work.
Signed-off-by: Liming Wang <walimisdev@gmail.com>
Acked-by: Matt.Waddel@linaro.org
The reference implementation of the PCI initialization code almost
everywhere contain this fragile loop of "a few usecs", and its
use of volatile variables to delay a number of bus cycles is indeed
uncertain.
Reading the manual "Integrator/AP Users Guide", page 5-15 it is
clearly stated:
"Wait until 230ms after the end of the reset period before
accessing V360EPC internal registers. The V360EPC supports the
use of a serial configuration PROM and the software must wait for
the device to detect the absence of this PROM before accessing any
registers. The required delay is a function of the PCI Clock, but
at the lower frequency (25MHz) is 230ms".
So let's simply wait 230ms per the spec.
This solves the compilation error that looked like this:
pci.c: In function ‘pci_init_board’:
pci.c:286:18: warning: variable ‘j’ set but not used
Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PCI support for the Integrator AP has apparently never
been finished and I strongly suspect that it has never worked,
so let's fix it. This is a list of the more or less
un-splittable changes done in this driver rewrite:
- Replace the register definitions stashed into the config
file (!) with a copy if the register file from the Linux
kernels arch/arm/include/asm/hardware/pci_v3.h
- Delete the unreadable gigantic macros that perform the
config accesses and replace them with copyedited code from
Linux arch/arm/mach-integrator/pci_v3.c
- Rewrite the rest of the setup code to use the
v3_[read|write][lwb]() accessors.
- Enable PCI by default in the AP board configuration.
- Fix checkpatch warnings and make code more conformant.
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The U-Boot startup infrastructure already makes sure pci_init() is
called at a proper time, calling it again from within the board
setup code will not make things better.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This enables Vpp and disables the flash protection on the
Integrator when starting U-Boot. The integrator/AP has double
protection mechanisms: this one and the EBI protection bit
(patch earlier), the Integrator/CP has only one line of
protection in these registers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Break out the AP system controller and CP "CP controller"
registers into a header file, it gives better overview than
hardcoding its values and other disturbing practices.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This reconfigures the EBI (External Bus Interface) on the
integrator so that chip select 1, handling the flash memory, is
set to writeable. Without this it is not possible for U-Boot to
access flash memory and it crashes on startup since CFI won't
work properly.
Since this is the first time we use the EBI, we create a header
file for its registers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Casting around to *(volatile ulong *) doesn't look good, so include
the <asm/io.h> macros and use good old readl() instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Do away with the config.mk file and move the text offset to the
config files to make things easier.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When booting from Flash, the Integrator remaps its flash memory
from 0x24000000 to 0x00000000, and starts executing it at
0x00000000. This ROM thus hides the RAM underneath and first
0x40000 bytes of the memory cannot be tested by get_ram_size().
So let's test from 0x40000 to the end of detected memory
instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used. Punt them all.
MAKEALL didn't report any errors related to this that I could see.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since commit d388298a59 by
Stefano Babic this file is no longer needed so delete it.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Loïc Minier <loic.minier@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This deletes the integrator split_by_variant.sh script and
defines a number of unique board types for the core modules
that are meaningful to support for the Integrator AP/CP, i.e.
the ones that did not just say "unsupported core module" in
split_by_variant.sh. If more core modules need to be supported
they are easy to add.
We delete all the old cruft in Makefile and MAKEALL that was
working around the old way of building boards. We create a
unique config file per board to satisfy the build system, but
they are just oneliners that include the existing
integratorap.h and integratorcp.h configs.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The integrator board was apparently never converted over to support
relocation until now. After this the integrator u-boot both compiles
and boots on the Integrator AP.
This also fixes the SDRAM memory size detection.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The integratorap/cp config for u-boot was outdated and would not
even compile, so fix the obvious missing bits for it to start
building. After this "make ap920t_config/make all" starts working
again.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Versatile board is used as example to run u-boot under qemu.
The patch fixes relocation for all versatile boards and adds
a versatileqemu target to be used under qemu.
Patch tested only under qemu, not on real boards.
Tested with QEMU emulator version 0.14.50.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Alessandro Rubini <rubini-list@gnudd.com>
CC: Loïc Minier <loic.minier@linaro.org>
In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:
CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF
Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
* Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
* Changed all three flags to the final names suggested as above
and accordingly changed the commit message
Add a header file with the missing function prototype to fix
ca9x4_ct_vxp.c: In function 'cpu_mmc_init':
ca9x4_ct_vxp.c:93: warning: implicit declaration of function 'arm_pl180_mmci_init'
introduced by commit "ARMV7: Vexpress: Add MMC support"
(f0c64526b7)
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Matt Waddel <matt.waddel@linaro.org>
