mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 21:54:01 +00:00
vexpress64: get rid of CONFIG_SYS_EXTRA_OPTIONS
The Versatile Express ARMv8 semihosted FVP platform is still using the legacy CONFIG_SYS_EXTRA_OPTIONS method to configure some compile-time flags. Get rid of this and create a Kconfig entry for the FVP model, and a selectable bool for the semihosting library. The FVP subboard is now modeled as a target choice so we can eventually choose between different ARMv8 versatile express boards (FVP, base model, Juno...) this way. All dependent symbols are updated to reflect this. The 64bit Versatile Express board symbols are renamed VEXPRESS64 so we have some chance to see what is actually going on. Tested on the FVP fast model. Acked-by: Steve Rae <srae@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
ffb4f6f95a
commit
f91afc4d00
5 changed files with 38 additions and 13 deletions
|
@ -51,6 +51,13 @@ config SYS_CPU
|
|||
default "sa1100" if CPU_SA1100
|
||||
default "armv8" if ARM64
|
||||
|
||||
config SEMIHOSTING
|
||||
bool "support boot from semihosting"
|
||||
help
|
||||
In emulated environments, semihosting is a way for
|
||||
the hosted environment to call out to the emulator to
|
||||
retrieve files from the host machine.
|
||||
|
||||
choice
|
||||
prompt "Target select"
|
||||
|
||||
|
@ -720,10 +727,15 @@ config TEGRA
|
|||
select CPU_ARM720T if SPL_BUILD
|
||||
select CPU_V7 if !SPL_BUILD
|
||||
|
||||
config TARGET_VEXPRESS_AEMV8A
|
||||
config TARGET_VEXPRESS64_AEMV8A
|
||||
bool "Support vexpress_aemv8a"
|
||||
select ARM64
|
||||
|
||||
config TARGET_VEXPRESS64_BASE_FVP
|
||||
bool "Support Versatile Express ARMv8a FVP BASE model"
|
||||
select ARM64
|
||||
select SEMIHOSTING
|
||||
|
||||
config TARGET_LS2085A_EMU
|
||||
bool "Support ls2085a_emu"
|
||||
select ARM64
|
||||
|
|
|
@ -1,4 +1,17 @@
|
|||
if TARGET_VEXPRESS_AEMV8A
|
||||
if TARGET_VEXPRESS64_AEMV8A
|
||||
|
||||
config SYS_BOARD
|
||||
default "vexpress64"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "armltd"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "vexpress_aemv8a"
|
||||
|
||||
endif
|
||||
|
||||
if TARGET_VEXPRESS64_BASE_FVP
|
||||
|
||||
config SYS_BOARD
|
||||
default "vexpress64"
|
||||
|
|
|
@ -1,3 +1,3 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_TARGET_VEXPRESS_AEMV8A=y
|
||||
CONFIG_TARGET_VEXPRESS64_AEMV8A=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="vexpress64"
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="SEMIHOSTING,BASE_FVP"
|
||||
# Semihosted FVP fast model
|
||||
CONFIG_ARM=y
|
||||
CONFIG_TARGET_VEXPRESS_AEMV8A=y
|
||||
CONFIG_TARGET_VEXPRESS64_BASE_FVP=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="vexpress64"
|
||||
|
|
|
@ -11,9 +11,9 @@
|
|||
/* We use generic board for v8 Versatile Express */
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
|
||||
#ifdef CONFIG_BASE_FVP
|
||||
#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
|
||||
#ifndef CONFIG_SEMIHOSTING
|
||||
#error CONFIG_BASE_FVP requires CONFIG_SEMIHOSTING
|
||||
#error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
|
||||
#endif
|
||||
#define CONFIG_BOARD_LATE_INIT
|
||||
#define CONFIG_ARMV8_SWITCH_TO_EL1
|
||||
|
@ -21,8 +21,8 @@
|
|||
|
||||
#define CONFIG_REMAKE_ELF
|
||||
|
||||
#ifndef CONFIG_BASE_FVP
|
||||
/* Base FVP not using GICv3 yet */
|
||||
#ifndef CONFIG_TARGET_VEXPRESS64_BASE_FVP
|
||||
/* Base FVP and Juno not using GICv3 yet */
|
||||
#define CONFIG_GICV3
|
||||
#endif
|
||||
|
||||
|
@ -40,7 +40,7 @@
|
|||
#define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a"
|
||||
|
||||
/* Link Definitions */
|
||||
#ifdef CONFIG_BASE_FVP
|
||||
#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
|
||||
/* ATF loads u-boot here for BASE_FVP model */
|
||||
#define CONFIG_SYS_TEXT_BASE 0x88000000
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
|
||||
|
@ -54,7 +54,7 @@
|
|||
|
||||
|
||||
/* SMP Spin Table Definitions */
|
||||
#ifdef CONFIG_BASE_FVP
|
||||
#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
|
||||
#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
|
||||
#else
|
||||
#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
|
||||
|
@ -119,7 +119,7 @@
|
|||
#define GICR_BASE (0x2f100000)
|
||||
#else
|
||||
|
||||
#ifdef CONFIG_BASE_FVP
|
||||
#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
|
||||
#define GICD_BASE (0x2f000000)
|
||||
#define GICC_BASE (0x2c000000)
|
||||
#else
|
||||
|
@ -191,7 +191,7 @@
|
|||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
|
||||
/* Initial environment variables */
|
||||
#ifdef CONFIG_BASE_FVP
|
||||
#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"kernel_name=uImage\0" \
|
||||
"kernel_addr_r=0x80000000\0" \
|
||||
|
|
Loading…
Reference in a new issue