vexpress64: Add MMU tables

There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.

Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Alexander Graf 2016-03-04 01:09:51 +01:00 committed by Tom Rini
parent b30291a3b2
commit e593bf5eb3
2 changed files with 24 additions and 3 deletions

View file

@ -14,6 +14,7 @@
#include <dm/platdata.h>
#include <dm/platform_data/serial_pl01x.h>
#include "pcie.h"
#include <asm/armv8/mmu.h>
DECLARE_GLOBAL_DATA_PTR;
@ -28,6 +29,26 @@ U_BOOT_DEVICE(vexpress_serials) = {
.platdata = &serial_platdata,
};
static struct mm_region vexpress64_mem_map[] = {
{
.base = 0x0UL,
.size = 0x80000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
.base = 0x80000000UL,
.size = 0xff80000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
/* List terminator */
0,
}
};
struct mm_region *mem_map = vexpress64_mem_map;
/* This function gets replaced by platforms supporting PCIe.
* The replacement function, eg. on Juno, initialises the PCIe bus.
*/

View file

@ -19,9 +19,9 @@
#define CONFIG_SUPPORT_RAW_INITRD
/* Cache Definitions */
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_ICACHE_OFF
/* MMU Definitions */
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_FULL_VA
#define CONFIG_IDENT_STRING " vexpress_aemv8a"
#define CONFIG_BOOTP_VCI_STRING "U-Boot.armv8.vexpress_aemv8a"