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87105 commits

Author SHA1 Message Date
Ashok Reddy Soma
f5aa35c932 cmd: sf/nand: Print and return failure when 0 length is passed
For sf commands, when '0' length is passed for erase, update, write or
read, there might be undesired results. Ideally '0' length means nothing to
do.

So print 'ERROR: Invalid size 0' and return cmd failure when length '0' is
passed to sf commands. Same thing applies for nand commands also.

Example:

ZynqMP> sf erase 0 0
ERROR: Invalid size 0
ZynqMP> sf write 10000 0 0
ERROR: Invalid size 0
ZynqMP> sf read 10000 0 0
ERROR: Invalid size 0
ZynqMP> sf update 1000 10000 0
ERROR: Invalid size 0
ZynqMP>

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230516115236.22458-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Algapally Santosh Sagar
b4501aa028 mach-zynqmp: handoff: Add missing header
Add missing prototype to fix the sparse warning.
warning: no previous prototype for 'bl2_plat_get_bl31_params'
[-Wmissing-prototypes]

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230519113816.22083-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Algapally Santosh Sagar
71c5fdc2a3 clk: zynqmp: Add fallthrough statement in the switch case
Add fallthrough statement in switch case to fix the sparse warning.
In function 'zynqmp_clk_get_rate': warning: this statement may
fall through [-Wimplicit-fallthrough=]

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230519113816.22083-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Ashok Reddy Soma
ded539ff66 arm64: versal-net: Detect and display bootmode
Read boodmode register using versal_net_get_bootmode() in board_late_init
and prepare corresponding distro boot command sequence based on it.

versal_net_get_bootmode() will be changed to use smc calls later, but
for now directly reads the register.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230516144753.30869-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Tom Rini
c13a1c22a2 Merge branch 'master_reserved' of https://source.denx.de/u-boot/custodians/u-boot-sh 2023-06-11 16:23:32 -04:00
Tom Rini
5b589e1396 Merge branch 'next_net/phy_connect_dev' of https://source.denx.de/u-boot/custodians/u-boot-sh into next 2023-06-10 14:08:00 -04:00
Tom Rini
cc5a940923 Merge branch 'next_mtd/rpc-spi' of https://source.denx.de/u-boot/custodians/u-boot-sh into next 2023-06-10 14:07:49 -04:00
Detlev Casanova
fd3e2b4de3 renesas: rcar: Apply ATF overlay for reserved-memory
The function fdtdec_board_setup() is called early and adds the overlay
from ATF to the u-boot device tree. That is necessary so that u-boot
doesn't use reserved memory.

Linux also needs to know about that reserved memory so the overlay from
ATF needs to be aplied on the linux device tree as well.

This commit makes sure that the ATF overlay is applied to both device trees.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Adam Ford <aford173@gmail.com>
2023-06-10 17:06:38 +02:00
Marek Vasut
32d2461e04 ARM: renesas: Enable DM_ETH_PHY and SMSC PHY driver
The board comes with SMSC LAN8710A PHY, enable matching driver.
Enable DM_ETH_PHY in the process to start using DM drivers more.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:06 +02:00
Geert Uytterhoeven
c1466c55de ARM: dts: renesas: Add compatible properties to LAN8710A Ethernet PHYs
Add compatible values to Ethernet PHY subnodes representing SMSC
LAN8710A PHYs on RZ/A1 and R-Mobile A1 boards.  This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.

Ported from Linux kernel commit 1c65ef1c71e473c00f2a7a1b9c140f0b4862f282 .

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/247dc2074dae149af07b6d014985ad30eb362eda.1631174218.git.geert+renesas@glider.be
---
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:06 +02:00
Valentine Barshak
41a0cfd0c5 net: sh_eth: Fix RX error handling
In case RX error occurs, and the RD_RFE bit is set, the descriptor
is never returned back to the queue. Make sh_eth_recv_start return
zero length in this case so that the descriptor can be released
and pushed back to the list. Also return the more appropriate
-EAGAIN instead of -EINVAL if the descriptor is not ready yet.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Valentine Barshak
d49ba9c8d7 net: sh_eth: Workaround cache issues
U-Boot writes to RX packets when constructing replies.
This can cause stale cached data to be written to RX
buffer while we're receiving a packet. This causes RX
packet corruption because we invalidate the cache right
before processing the packet. Invalidate packet buffer
cache when preparing RX descriptor as well. This seems
to fix RX packet drops with high RX traffic.

While at it flush the descriptors right before enabling
RX/TX in sh_eth_tx_desc_init/sh_eth_rx_desc_init callbacks
when they are ready instead of flushing after allocation.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
92c312c734 net: sh_eth: Drop reset GPIO handling in favor of common code
The common code is now capable of handling reset GPIO associated
with PHY. Drop the local ad-hoc code in favor of common code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
5c80edb264 net: ravb: Drop reset GPIO handling in favor of common code
The common code is now capable of handling reset GPIO associated
with PHY. Drop the local ad-hoc code in favor of common code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
3015ae5feb net: phy: Handle reset-delay-us/reset-post-delay-us properties
These two properties are used by various DTs in place of
current reset-assert-us/reset-deassert-us , handle both .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
68a4d15061 net: phy: Bind ETH_PHY uclass driver to each new PHY
In case a new PHY is created and DM_ETH_PHY is enabled, bind a
generic PHY driver from ETH_PHY uclass to the PHY to have a
matching DM representation of that PHY.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
495fc04b6d net: phy: Unpublish phy_connect_dev()
The phy_connect_dev() is legacy API, now that there are no users,
make it internal to phy.c and unpublish it from headers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
83434e249f net: sunxi_emac: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
b9b04f8c5f net: sh_eth: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
8f5abff522 net: pch_gbe: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
8869a8883b net: ethoc: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
7ff881a69f net: ave: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
fd5910288f net: altera_tsa: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:05 +02:00
Marek Vasut
06173ef643 net: eth-phy: staticize eth_phy_reset()
The eth_phy_reset() is not used outside of this file, staticize it.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:04 +02:00
Cong Dang
2e6a1f9fde mtd: spi: renesas: Add 4 bytes address mode support
This patch adds 4-byte address mode support. Because traditional access
based on FIFO/shift register, it's complex to specify information like
opcode, address length, dummy bytes etc to flash. Replace the traditional
access by spi-mem layer which is essential to make 4-byte address mode
support possible.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-06-10 11:50:45 +02:00
Hai Pham
8e8cb7e1a8 mtd: spi: renesas: Add R-Car Gen4 support
Support RPC SPI on R-Car Gen4 R8A779F0 S4 and R8A779G0 V4H SoCs.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Squash S4 and V4H patches, fix brackets around STRTIM2]
2023-06-10 11:50:45 +02:00
Hai Pham
89208dba38 mtd: spi: renesas: Enable SPI_FLASH_SFDP_SUPPORT
Enable support for parsing and auto discovery of parameters for
SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
tables as per JESD216 standard.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Make SFDP the default unconditionally
2023-06-10 11:50:45 +02:00
Hai Pham
49096f9924 mtd: spi: renesas: Extract strobe delay setting code into separate function
Move strobe delay setting code into extra function and reflect the latest
setting in datasheet (R-Car Gen3 v2.20, R-Car V3U v0.50).
i.e. STRTIM[2:0] should be set to 110 (RCar M3-W) or 111 (Other products)

This is also a preparation for new R-Car Gen4 SoC which has 4-bits STRTIM

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix for RZ/A1
2023-06-10 11:50:45 +02:00
Tom Rini
5f41ef792c Merge branch '2023-06-09-fwu-updates' into next
Two sets of FWU updates from Jassi Brar.  First:
The patchset reduces ~400 lines of code, while keeping the functionality same and making
meta-data operations much faster (by using cached structures).

Issue:
meta-data copies (primary and secondary) are being handled by the
backend/storage layer instead of the common core in fwu.c (as also noted by
Ilias)  that is, gpt_blk.c manages meta-data and similarly raw_mtd.c will have
to do the same when it arrives. The code could by make smaller, cleaner and
optimised.

Basic idea:
Introduce  .read_mdata() and .write_mdata() in fwu_mdata_ops  that simply
read/write meta-data copy. The core code takes care of integrity and redundancy
of the meta-data, as a result we can get rid of every other callback
.get_mdata() .update_mdata() .get_mdata_part_num()  .read_mdata_partition()
.write_mdata_partition() and the corresponding wrapper functions thereby making
the code 100s of LOC smaller.

Get rid of fwu_check_mdata_validity() and fwu_mdata_check() which expected
underlying layer to manage and verify mdata copies.
Implement  fwu_get_verified_mdata(struct fwu_mdata *mdata) public function that
reads, verifies and, if needed, fixes the meta-data copies.

Verified copy of meta-data is now cached as 'g_mdata' in fwu.c, which avoids
multiple low-level expensive read and parse calls.
gpt meta-data partition numbers are now cached in gpt_blk.c, so that we don't
have to do expensive part_get_info() and uid ops.

And second:
Introduce support for mtd backed storage for FWU feature and enable it on
Synquacer platform based DeveloperBox.
2023-06-09 20:35:02 -04:00
Jassi Brar
a7e45415b2 fwu: provide default fwu_plat_get_bootidx
Just like fwu_plat_get_update_index, provide a default/weak
implementation of fwu_plat_get_bootidx. So that most platforms
wouldn't have to re-implement the likely case.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00
Jassi Brar
6b403ca4dc fwu: DeveloperBox: add support for FWU
Add code to support FWU_MULTI_BANK_UPDATE.
The platform does not have gpt-partition storage for
Banks and MetaData, rather it used SPI-NOR backed
mtd regions for the purpose.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00
Jassi Brar
87f397e58e config: developerbox: move to new flash layout and boot flow
Towards enabling FWU and supporting new firmware layout in NOR flash,
make u-boot PIC and adjust uboot env offset in flash.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00
Jassi Brar
f809fb660b dt: fwu: developerbox: enable fwu banks and mdata regions
Specify Bank-0/1 and fwu metadata mtd regions.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00
Masami Hiramatsu
fdd56bfd3a tools: Add mkfwumdata tool for FWU metadata image
Add 'mkfwumdata' tool to generate FWU metadata image for the meta-data
partition to be used in A/B Update imeplementation.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2023-06-09 13:52:40 -04:00
Masami Hiramatsu
4898679e19 FWU: Add FWU metadata access driver for MTD storage regions
In the FWU Multi Bank Update feature, the information about the
updatable images is stored as part of the metadata, on a separate
region. Add a driver for reading from and writing to the metadata
when the updatable images and the metadata are stored on a raw
MTD region.
The code is divided into core under drivers/fwu-mdata/ and some helper
functions clubbed together under lib/fwu_updates/

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00
Jassi Brar
72168b929e test: dm: fwu: fix for the updated api
fwu_get_mdata() no more requires 'dev' argument and
fwu_check_mdata_validity() has been rendered useless and dropped.
Fix the test cases to work with aforementioned changes.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2023-06-09 13:52:40 -04:00
Jassi Brar
1e917a69e5 fwu: rename fwu_get_verified_mdata to fwu_get_mdata
fwu_get_mdata() sounds more appropriate than fwu_get_verified_mdata()

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2023-06-09 13:52:40 -04:00
Jassi Brar
246ec2a12c fwu: meta-data: switch to management by common code
The common code can now read, verify and fix meta-data copies
while exposing one consistent structure to users.
 Only the .read_mdata() and .write_mdata() callbacks of fwu_mdata_ops
are needed. Get rid of .get_mdata() .update_mdata() .get_mdata_part_num()
.read_mdata_partition() and .write_mdata_partition() and also the
corresponding wrapper functions.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2023-06-09 13:52:40 -04:00
Jassi Brar
3733e16925 fwu: gpt: implement read_mdata and write_mdata callbacks
Moving towards using common code for meta-data management,
implement the read/write mdata hooks.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2023-06-09 13:52:39 -04:00
Jassi Brar
167994f295 fwu: move meta-data management in core
Instead of each i/f having to implement their own meta-data verification
and storage, move the logic in common code. This simplifies the i/f code
much simpler and compact.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2023-06-09 13:49:55 -04:00
Jassi Brar
b042c70554 fwu: gpt: use cached meta-data partition numbers
Use cached values and avoid parsing and scanning through partitions
everytime for meta-data partitions because they can't change after bootup.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2023-06-09 13:24:10 -04:00
Jassi Brar
56b481c428 dt/bindings: fwu-mdata-mtd: drop changes outside FWU
Any requirement of FWU should not require changes to bindings
of other subsystems. For example, for mtd-backed storage we
can do without requiring 'fixed-partitions' children to also
carry 'uuid', a property which is non-standard and not in the
bindings.

 There exists no code yet, so we can change the fwu-mtd bindings
to contain all properties within the fwu-mdata node.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2023-06-09 13:24:10 -04:00
Tom Rini
ac7ca69209 Merge branch 'next_soc/v3x' of https://source.denx.de/u-boot/custodians/u-boot-sh into next 2023-06-09 10:30:26 -04:00
Tom Rini
addd47379d Merge https://source.denx.de/u-boot/custodians/u-boot-usb 2023-06-08 18:23:06 -04:00
Tom Rini
681bfd6b46 Merge branch 'master_soc/fixes' of https://source.denx.de/u-boot/custodians/u-boot-sh 2023-06-08 18:22:32 -04:00
Valentine Barshak
ed2f65f010 ARM: renesas: Add R8A77980 V3HSK board and CPLD code
Add board code for the R8A77980 V3HSK board.
Add CPLD sysreset driver to the R-Car V3H SK board.
Extracted from a larger patch by Valentine Barshak.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync configs and board code with V3H Condor, squash CPLD driver in]
2023-06-08 22:26:52 +02:00
Valentine Barshak
bd13df8b5d ARM: dts: renesas: Add R8A77980 V3HSK DTs
Import R8A77980 V3HSK DTs from Linux 6.1.31,
commit d2869ace6eeb ("Linux 6.1.31").
Extracted from a larger patch by Valentine Barshak.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Sync with 6.1.31
2023-06-08 22:26:52 +02:00
Valentine Barshak
5f4e26964c ARM: renesas: Add R8A77970 V3MSK board and CPLD code
Add board code for the R8A77970 V3MSK board.
Add CPLD sysreset driver to the R-Car V3M SK board.
Extracted from a larger patch by Valentine Barshak.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync configs and board code with V3M Eagle, squash CPLD driver in]
2023-06-08 22:26:52 +02:00
Valentine Barshak
f2a21a8c24 ARM: dts: renesas: Add R8A77970 V3MSK DTs
Import R8A77970 V3MSK DTs from Linux 6.1.31,
commit d2869ace6eeb ("Linux 6.1.31").
Extracted from a larger patch by Valentine Barshak.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Sync with 6.1.31
2023-06-08 22:26:52 +02:00
Marek Vasut
9fddd3612b ARM: rmobile: Introduce weak default board_init()
Introduce weak default board_init() in rcar-common/common.c , which
allows complete removal of ebisu.c and condor.c at the same time .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-06-08 22:26:52 +02:00