Migrate the BR/OR settings to Kconfig. These must be known at compile
time, so cannot be configured via DT.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The MPC8349EMDS configuration was the basis for the sbc8349, so it also
contains its SDRAM option.
Since
* the SDRAM has to be soldered onto the board,
* the sbc8349 never used the support, and
* the support never worked (see previous patch fixing it),
we can assume that the support on the sbc8349 is an artifact created by
copying the MPC8349EMDS config wholesome.
Hence, instead of creating a separate sbc8349 config that supports
SDRAM, we can remove the SDRAM option for this board.
Should it be needed in the future, it can be copied from the new
MPC8349EMDS_SDRAM board.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Re-format all BR,OR #define lines into single lines. This makes them
harder to read, but accessible to semi-automatic replacement.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
All BR/OR option lines should have the same layout to make them easier
to migrate to Kconfig. This includes using the same option macros
everywhere.
The normalize the lines,
* replace function macros with their results, and
* replace hardcoded hex values with standard macros
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The LBLAW_* values determine the window configuration of the memory
controller. Hence, they must be known at compile time, and cannot be
implemented in the DT mechanism.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The BATs (block address translation registers) determine the initial
memory window mappings. Hence, they must be known at compile time and
cannot be implemented in the DT mechanism.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The HRCW (hardware reset configuration word) is a constant that must be
hard-coded into the boot loader image. So, it must be available at
compile time, and cannot be migrated to the DT mechanism, but has to be
kept in Kconfig.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
MPC83xx uses CONFIG_83XX_CLKIN instead of CONFIG_SYS_CLK_FREQ to set the
system clock. To migrate the architecture, we can replace
CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ.
To do this
* replace all occurrences of CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ
* set CONFIG_SYS_CLK_FREQ to the old value of CONFIG_83XX_CLKIN in all
MPC83xx config files
Signed-off-by: Mario Six <mario.six@gdsys.cc>
CONFIG_SYS_CLK_FREQ is the standard way to set the system clock
frequency. On MPC83xx, CONFIG_83XX_CLKIN is used for this purpose.
Hence, the obvious way is to replace CONFIG_83XX_CLKIN with
CONFIG_SYS_CLK_FREQ.
A few MPC83xx boards use the CONFIG_83XX_CLKIN variable for computing
CONFIG_SYS_NS16550_CLK. This makes it harder to replace
CONFIG_83XX_CLKIN.
But the value of the multiplicator can be read from the SPMR register.
Hence, replace the static calculations with a call to a new get_bus_freq
function, as other architectures do.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The MPC83xx include files contain some settings of the PCI subsystem.
Migrate these to Kconfig until a proper DM PCI driver exists.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
CONFIG_MPC837XERDB is unused, and TARGET_MPC837XERDB could replace it.
Hence, get rid of CONFIG_MPC837XERDB.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
CONFIG_MPC837XEMDS is unused, and TARGET_MPC837XEMDS could replace it.
Hence, get rid of CONFIG_MPC837XEMDS.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
CONFIG_MPC8315ERDB is unused, and TARGET_MPC8315ERDB could replace it.
Hence, get rid of CONFIG_MPC8315ERDB.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
CONFIG_MPC8313ERDB is unused, and
TARGET_MPC8313ERDB_NAND/TARGET_MPC8313ERDB_NOR Kconfig could replace it.
Hence, get rid of CONFIG_MPC8313ERDB.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Use the proper CONFIG_TARGET_MPC8349ITX Kconfig option to replace the
CONFIG_MPC8349ITX ad-hoc config option.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Use the proper CONFIG_TARGET_MPC832XEMDS Kconfig option to replace the
CONFIG_MPC832XEMDS ad-hoc config option.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The ve8313 has the option of either configuring the eLBC (enhanced local system bus) such that
* NOR flash is the first memory bank, and NAND flash is the second memory bank, or
* NAND flash is the first memory bank, and NOR flash is the second memory bank,
by using CONFIG_SYS_NOR_{BR,OR}_PRELIM and
CONFIG_SYS_NAND_{BR,OR}_PRELIM for defining
CONFIG_SYS_{BR,OR}{0,1}_PRELIM.
After Kconfig migration, replacing some lines in the defconfig will have
the same effect.
Hence, we will not create distinct ve8313_{NOR,NAND} configs for such a
small change.
Instead, fix the current default (NOR first, NAND second), and unroll
the CONFIG_SYS_NAND_{BR,OR}_PRELIM options. This will ease the Kconfig
migration
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The mpc8315erdb has the option of either configuring the eLBC (enhanced
local system bus) such that
* NOR flash is the first memory bank, and NAND flash is the second
memory bank, or
* NAND flash is the first memory bank, and NOR flash is the second
memory bank,
by using CONFIG_SYS_NOR_{BR,OR}_PRELIM and
CONFIG_SYS_NAND_{BR,OR}_PRELIM for defining
CONFIG_SYS_{BR,OR}{0,1}_PRELIM.
After Kconfig migration, replacing some lines in the defconfig will have
the same effect.
Hence, we will not create distinct ve8313_{NOR,NAND} configs for such a small change.
Instead, fix the current default (NOR first, NAND second), and unroll
the CONFIG_SYS_NAND_{BR,OR}_PRELIM options. This will ease the Kconfig
migration.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The MPC8349EMDS config file contains config options to enable SDRAM
support. To keep this ability after the Kconfig migration, create a new
MPC8349EMDS_SDRAM board that enables the SDRAM support and remove the
SDRAM support from the original board.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
vme8349.h contains two separate boards: The vme8349 itself, and the
caddy2 board. The caddy2 board is chosen by setting certain config
variables. Create a proper config file for the caddy2 board to make
Kconfig migration easier.
Furthermore, simplify the vme8349 and caddy2 configs by keeping only the
options necessary for each board.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
CONFIG_TARGET_VME8349 can replace CONFIG_VME8349. Hence, replace
CONFIG_VME8349 with CONFIG_TARGET_VME8349, and remove CONFIG_VME8349.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
MPC8313ERDB has the option of either enabling NOR or NAND boot in its
config file (by commenting out certain #ifdefs). To keep this ability
after migrating options to Kconfig, we introduce two MPC8313ERDB
configs: one for NOR, and one for NAND.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The kmeter1, and kmcoge5ne boards also build from the same config
file with #ifdef logic.
Create a separate include config for each board with the #ifdef logic
resolved as needed.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Simplify the keymile config files once more by unrolling the
km/km83xx-common.h, and resolve the #ifdef logic as needed.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The kmsupx5, tuge1, kmopti2, and kmtepr2 boards all build from the same
include config file with lots of #ifdef logic.
To ease Kconfig migration, create new config include files for these
boards, and resolve the #ifdef logic as needed.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
To further simplify config include files, unroll the km/km8309-common.h
and km/km8321-common.h include files.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
We want to unroll several include files, while keeping include
statements consistent.
To make it easier to not break the include statements, move the include
files to the main configs directory. All three include files moved will
be unrolled, so they won't pollute the directory for long.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The kmtegr1, kmvect1, and suvd3 boards all use the same config include
file with lots of #ifdefs in it.
The Kconfig migation will become easier if we get rid of these #ifdefs
first.
Hence, create distinct config include files for these boards, and unwind
the #ifdef logic in these config files to only include the options
necessary for each board.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Pull the vidconsole_put_string() function from DM tests, make it
available to e.g. boards that want to display information on the
LCD on boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Enable DM_VIDEO in config and don't overwrite console so it can be set
from environment
Acked-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Signed-off-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Minor patches to improve UEFI specification compliance are provided.
To allow running the UEFI self compliance tests an outdated version of
the Unicode collation protocol has been added as a configuration option
(disabled by default).
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Merge tag 'efi-2019-07-rc3-2' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc3 (2)
Minor patches to improve UEFI specification compliance are provided.
To allow running the UEFI self compliance tests an outdated version of
the Unicode collation protocol has been added as a configuration option
(disabled by default).
In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
language codes existed. This protocol is not part of the UEFI specification
any longer. Unfortunately it is required to run the UEFI Self Certification
Test (SCT) II, version 2.6, 2017. So we implement it here for the sole
purpose of running the SCT. It can be removed once a compliant SCT is
available.
The configuration option defaults to no.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Most of Rob's original patch is already merged. Only the deprecated
protocol is missing. Rebase it and make it configurable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rename variables to make it clear they refer to the Unicode collation
protocol identified by the EFI_UNICODE_PROTOCOL2_GUID.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This takes the latest changes from AOSP from the file
bootloader_message/include/bootloader_message/bootloader_message.h
in the repository
https://android.googlesource.com/platform/bootable/recovery
and re-licensed them to BSD-3 for U-Boot.
Minimum local changes have been applied (convert C++ to C comments and
adding #ifndef __UBOOT__ block to skip all the function declarations).
Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Set the spl_image->fdt_addr pointer both for simple fitImage configuration
as well as full fitImage configuration, to let spl_perform_fixups() access
the DT and perform modifications to it if necessary.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
but it's a mistake. It's a workaround for an issue in nand core.
This issue was fixed by the commit 5f626e7849 ("mtd: nand: raw:
Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag
break the nand on this board, so we simply remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
but it's a mistake. It's a workaround for an issue in nand core.
This issue was fixed by the commit 5f626e7849 ("mtd: nand: raw:
Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag
break the nand on this board, so we simply remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This board define the flag CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
but it's a mistake. It's a workaround for an issue in nand core.
This issue was fixed by the commit 5f626e7849 ("mtd: nand: raw:
Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior"). Now, this flag
break the nand on this board, so we simply remove it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
parameters; only for the ARC architecture. This patch turns these two
parameters into Kconfig items everywhere else they are found.
All of the include/configs/* and defconfig changes in this patch are
for arm machines only. The Kconfig changes for arc, nds32, riscv,
and xtensa have been included since these symbols are found in code
under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
include/configs/* or defconfigs for these architectures exist which
include these symbols.
These results have been confirmed with tools/moveconfig.py.
Acked-by: Alexey Brodkin <abrodkin@snopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Re-migrate for a few more boards]
Signed-off-by: Tom Rini <trini@konsulko.com>
Eventually these configuration items will be converted to Kconfig,
therefore there's little point in leaving commented-out versions of
them in include/configs.
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
This config is the only config that uses:
#define CONFIG_SYS_DCACHE_OFF 1
in its #define.
Remove the superfluous "1" so this cache #define is like all the others.
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
The CONFIG_POWER and CONFIG_POWER_I2C were introduced in
include/configs/exynos5-common.h in commit 19bd3aaa59 ("exynos5: fix
build break by adding CONFIG_POWER") and then it propagated up to
include/configs/arndale.h. However before that commit, there was no
build break at all on Arndale and SMDK5250 boards. It seems the commit
fixed nothing and just added unused defines.
In fact, the Arndale board is not configuring its PMIC (S5M8767) which
uses I2C bus.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Re-add support for Aries Embedded MCV SoM, which is CycloneV based
and the associated MCVEVK and MCVEVP baseboard. The board can boot
from eMMC. Ethernet and USB is supported.
The Aries Embedded boards have been removed with commit 03b54997d5
("board/aries: Remove"). I will now take care of them.
The device-tree files are from mainline Linux commit e93c9c99a629
("Linux v5.1)".
Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de>
CC: Marek Vasut <marex@denx.de>
CC: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Move the U-Boot environment to 0x80000 to match the downstream
vendor fork and allow easy migration from one to the other.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The development target for the UEFI sub-system is EBBR compliance. We have
already implemented some further protocols to enable running the UEFI Shell
and the UEFI SCT test suite.
As some boards are severely memory constrained make some of these extras
customizable.
Provide bug fixes. The most prominent ones let us pass the UEFI SCT memory
allocation tests.
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Merge tag 'efi-2019-07-rc3' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc3
The development target for the UEFI sub-system is EBBR compliance. We have
already implemented some further protocols to enable running the UEFI Shell
and the UEFI SCT test suite.
As some boards are severely memory constrained make some of these extras
customizable.
Provide bug fixes. The most prominent ones let us pass the UEFI SCT memory
allocation tests.
Correct the description of utf8_utf16_strnlen() and utf8_utf16_strlen() to
reflect that they return u16 count and not byte count.
For these functions and utf16_utf8_strnlen() describe the handling of
invalid code sequences.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Increasing Malloc pool size up to 0x15000 is required to support FAT in SPL
. The result of calculation is come from default max cluster(0x10000) +
others(0x2000) + additional memory for headroom(0x3000).
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Mark Jonas <mark.jonas@de.bosch.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
There is no check for CONFIG_CRC32 so the #define in image.h does
nothing. Remove it.
Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Due to some mistakes in the source code, it was not possible to really
turn FIT support off. This commit fixes the problem by means of the
following changes:
- Enclose "bootm_host_load_image" and "bootm_host_load_images" between
checks for CONFIG_FIT_SIGNATURE, in common/bootm.c.
- Enclose the declaration of "bootm_host_load_images" between checks for
CONFIG_FIT_SIGNATURE, in common/bootm.h.
- Condition the compilation and linking of fit_common.o fit_image.o
image-host.o common/image-fit.o to CONFIG_FIT=y, in tools/Makefile.
Signed-off-by: Carlos Santos <casantos@datacom.ind.br>
[fabio: adapt for 2016.07]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
[Ricardo: fix conditional compilation and linking of the files mentioned above
for 2016.07]
Signed-off-by: Ricardo Martincoski <ricardo.martincoski@gmail.com>
[Jörg: adapt for 2019.01]
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
[Retrieved from:
https://git.buildroot.net/buildroot/tree/package/uboot-tools/0003-Make-FIT-support-really-optional.patch]
Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie
When AE350 boots from flash, use CONFIG_OF_SEPARATE instead of
CONFIG_OF_BOARD.
Also remove unused code about prior_stage_fdt_address.
And modify CONFIG_SYS_FDT_BASE as flash address.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
- Set fdt_addr variable, which is needed for extlinux to find FDT.
Otherwise booting kernel using extlinux results in missing FDT.
- Also run fdt addr with FDT address so that fdt commands would
work out of the box in U-Boot prompt.
This is successfully used by Fedora/RISCV with 5.1-rc3+ kernel using
OpenSBI -> U-Boot (S-mode) [extlinux] -> Kernel setup.
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
After updating Fedora/RISCV kernel to 5.1-rc3+ the size increased above
the current threshold. Looking into HiKey, Dragonboards, etc. seems that
SZ_64M is a popular option.
This sucessfully boots Fedora/RISCV with 5.1-rc3+ kernel on QEMU 4.0 (master)
with OpenSBI -> U-Boot (S-mode) [extlinux] -> Kernel setup.
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
CRS305-1G-4S has a switch chip with an integrated CPU (98DX3236) and
like some of the other similar boards requires bin_hdr.
bin_hdr (DDR3 init stage) is currently retrieved from the stock
bootloader and compiled into the kwb image.
Adds support for U-Boot, enable UART, SPI, Winbond SPI flash chip
support and writing env to SPI flash.
Signed-off-by: Luka Kovacic <me@lukakovacic.xyz>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Getting a RESET by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process RESET operation for child
without udevice but with ofnode.
So add reset_get_by_index_nodev() and move the common code
in reset_get_by_index_tail() to use for reset_get_by_index()
Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Getting a CLK by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process CLK operation for child
without udevice but with ofnode.
So add clk_get_by_index_nodev() and move the common code
in clk_get_by_index_tail() to use for clk_get_by_index()
Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Allow x86 boards to use TPL, SPL and U-Boot proper
- Update sysreset x86 driver to utilize ACPI registers to do power off
- Add a new chromebook_samus_tpl board for TPL support
- Several minor changes in binman tool
Fix a bunch of errors in the UEFI sub-system:
* implement missing UnloadImage(),
* implement missing RegisterProtocolNotify(),
* unload images in Exit(),
* parameter checks.
Provide a unit test for UnloadImage().
Remove a redundant function for unit tests.
Clean up the UEFI sub-system initialization
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Merge tag 'efi-2019-07-rc2-2' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc2 (2)
Fix a bunch of errors in the UEFI sub-system:
* implement missing UnloadImage(),
* implement missing RegisterProtocolNotify(),
* unload images in Exit(),
* parameter checks.
Provide a unit test for UnloadImage().
Remove a redundant function for unit tests.
Clean up the UEFI sub-system initialization
Rockchip platform suppose to use TPL(run in SRAM) as dram init and
SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be
limited by SRAM size.
This patch add rk3399-board-tpl.c and its common configs.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Move original spl to tpl, and add spl to load next stage firmware,
adapt all the address and option for them.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add a version of samus which supports booting from TPL to SPL and then
to U-Boot. This allows TPL to select from an A or B SPL to support
verified boot with field upgrade.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add the required CPU code so that TPL builds correctly. Also update the
SPL code to deal with being booted from TPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With the move to Kconfig this option should be set in Kconfig, not in the
config header file. Move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a new ioctl() request to read information about the power-management
system. This can be used to power off the device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This reverts commit aec4298ccb.
Unfortunately this has a dramatic impact on the pre-relocation memory
used on x86 platforms (increasing it by 2KB) since it increases the
overhead for each PCI device from 220 bytes to 412 bytes.
The offending line is in UCLASS_DRIVER(pci):
.per_device_auto_alloc_size = sizeof(struct pci_controller),
This means that all PCI devices have the controller struct associated
with them. The solution is to move the regions[] member out of the array,
makes its size dynamic, or split UCLASS_PCI into controllers and
non-controllers, as the comment suggests.
For now, revert the commit to get things running again.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
to allow access to the MMD PHY registers.
The MMD PHY registers can be accessed by several means:
1. Using two new MMD access function hooks in the PHY driver. These
functions can be implemented when the PHY driver does not support the
standard IEEE Compatible clause 45 access mechanism described in clause
22 or if the PHY uses its own non-standard access mechanism.
2. Direct access for C45 PHYs and C22 PHYs when accessing the reachable
DEVADs.
3. The standard clause 45 access extensions to the MMD registers through
the indirection registers (clause 22) in all the other cases.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Consistently use efi_uintn_t as type of memory keys.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <graf@amazon.com>