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https://github.com/AsahiLinux/u-boot
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CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig parameters; only for the ARC architecture. This patch turns these two parameters into Kconfig items everywhere else they are found. All of the include/configs/* and defconfig changes in this patch are for arm machines only. The Kconfig changes for arc, nds32, riscv, and xtensa have been included since these symbols are found in code under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined include/configs/* or defconfigs for these architectures exist which include these symbols. These results have been confirmed with tools/moveconfig.py. Acked-by: Alexey Brodkin <abrodkin@snopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Re-migrate for a few more boards] Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
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commit
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98 changed files with 129 additions and 51 deletions
2
README
2
README
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@ -634,8 +634,6 @@ The following options need to be configured:
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the defaults discussed just above.
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- Cache Configuration:
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CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
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CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
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CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
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- Cache Configuration for ARM:
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@ -109,12 +109,16 @@ config CPU_BIG_ENDIAN
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Build kernel for Big Endian Mode of ARC CPU
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config SYS_ICACHE_OFF
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bool "Do not use Instruction Cache"
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bool "Do not enable icache"
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default n
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help
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Do not enable instruction cache in U-Boot.
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config SYS_DCACHE_OFF
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bool "Do not use Data Cache"
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bool "Do not enable dcache"
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default n
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help
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Do not enable data cache in U-Boot.
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menuconfig ARC_DBG
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bool "ARC debugging"
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@ -74,6 +74,18 @@ config ARM_ASM_UNIFIED
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config THUMB2_KERNEL
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bool
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config SYS_ICACHE_OFF
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bool "Do not enable icache"
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default n
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help
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Do not enable instruction cache in U-Boot.
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config SYS_DCACHE_OFF
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bool "Do not enable dcache"
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default n
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help
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Do not enable data cache in U-Boot.
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config SYS_ARM_CACHE_CP15
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bool "CP15 based cache enabling support"
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help
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@ -26,12 +26,6 @@
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#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
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#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
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#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */
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/*
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* Disable the dcache. Currently the network driver (mvgbe.c) and USB
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* EHCI driver (ehci-marvell.c) and possibly others rely on the data
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* cache being disabled.
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*/
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#define CONFIG_SYS_DCACHE_OFF
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/*
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* By default kwbimage.cfg from board specific folder is used
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@ -16,6 +16,18 @@ config TARGET_ADP_AE3XX
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endchoice
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config SYS_ICACHE_OFF
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bool "Do not enable icache"
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default n
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help
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Do not enable instruction cache in U-Boot.
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config SYS_DCACHE_OFF
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bool "Do not enable dcache"
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default n
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help
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Do not enable data cache in U-Boot.
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source "board/AndesTech/adp-ag101p/Kconfig"
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source "board/AndesTech/adp-ae3xx/Kconfig"
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@ -19,6 +19,18 @@ config TARGET_SIFIVE_FU540
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endchoice
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config SYS_ICACHE_OFF
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bool "Do not enable icache"
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default n
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help
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Do not enable instruction cache in U-Boot.
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config SYS_DCACHE_OFF
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bool "Do not enable dcache"
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default n
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help
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Do not enable data cache in U-Boot.
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# board-specific options below
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source "board/AndesTech/ax25-ae350/Kconfig"
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source "board/emulation/qemu-riscv/Kconfig"
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@ -16,6 +16,18 @@ config TARGET_XTFPGA
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endchoice
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config SYS_ICACHE_OFF
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bool "Do not enable icache"
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default n
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help
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Do not enable instruction cache in U-Boot.
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config SYS_DCACHE_OFF
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bool "Do not enable dcache"
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default n
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help
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Do not enable data cache in U-Boot.
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source "board/cadence/xtfpga/Kconfig"
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endmenu
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x00600000
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CONFIG_TARGET_SBx81LIFKW=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x00600000
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CONFIG_TARGET_SBx81LIFXCAT=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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# CONFIG_SYS_THUMB_BUILD is not set
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CONFIG_ARCH_RMOBILE=y
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CONFIG_SYS_TEXT_BASE=0xE80C0000
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@ -1,4 +1,6 @@
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CONFIG_ARM=y
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CONFIG_SYS_ICACHE_OFF=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
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CONFIG_TARGET_BCM23550_W1D=y
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CONFIG_SYS_TEXT_BASE=0x9f000000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_TARGET_COLIBRI_PXA270=y
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CONFIG_SYS_TEXT_BASE=0x0
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CONFIG_NR_DRAM_BANKS=1
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_NET2BIG_V2=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_SYS_THUMB_BUILD=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_SYS_THUMB_BUILD=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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@ -1,4 +1,6 @@
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CONFIG_ARM=y
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CONFIG_SYS_ICACHE_OFF=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_LPC32XX=y
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CONFIG_SYS_TEXT_BASE=0x83F00000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_DNS325=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_DOCKSTAR=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_DREAMPLUG=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_DS109=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_ASPEED=y
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CONFIG_SYS_TEXT_BASE=0x0
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CONFIG_ASPEED_AST2500=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_TARGET_FLEA3=y
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CONFIG_SYS_TEXT_BASE=0xA0000000
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CONFIG_NR_DRAM_BANKS=1
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_GOFLEXHOME=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_TARGET_GPLUGD=y
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CONFIG_SYS_TEXT_BASE=0x00f00000
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CONFIG_NR_DRAM_BANKS=2
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_GURUPLUG=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_SYS_THUMB_BUILD=y
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CONFIG_ARCH_HIGHBANK=y
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CONFIG_SYS_TEXT_BASE=0x00008000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_IB62X0=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_ICONNECT=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_NETSPACE_V2=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_KEYSTONE=y
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CONFIG_ISW_ENTRY_ADDR=0xC100000
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CONFIG_SYS_TEXT_BASE=0xC000000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_KEYSTONE=y
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CONFIG_TI_SECURE_DEVICE=y
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CONFIG_ISW_ENTRY_ADDR=0xC100000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_KEYSTONE=y
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CONFIG_ISW_ENTRY_ADDR=0xC0A0000
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CONFIG_SYS_TEXT_BASE=0xC000000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_KEYSTONE=y
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CONFIG_TI_SECURE_DEVICE=y
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CONFIG_ISW_ENTRY_ADDR=0xC0A0000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_KEYSTONE=y
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CONFIG_ISW_ENTRY_ADDR=0xC200000
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CONFIG_SYS_TEXT_BASE=0xC000000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_KEYSTONE=y
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CONFIG_TI_SECURE_DEVICE=y
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CONFIG_ISW_ENTRY_ADDR=0xC200000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_KEYSTONE=y
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CONFIG_ISW_ENTRY_ADDR=0xC100000
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CONFIG_SYS_TEXT_BASE=0xC000000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_ARCH_KEYSTONE=y
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CONFIG_TI_SECURE_DEVICE=y
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CONFIG_ISW_ENTRY_ADDR=0xC100000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x07d00000
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CONFIG_TARGET_KM_KIRKWOOD=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x07d00000
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CONFIG_TARGET_KM_KIRKWOOD=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x07d00000
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CONFIG_TARGET_KM_KIRKWOOD=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x07d00000
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CONFIG_TARGET_KM_KIRKWOOD=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x07d00000
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CONFIG_TARGET_KM_KIRKWOOD=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x07d00000
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CONFIG_TARGET_KM_KIRKWOOD=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x07d00000
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CONFIG_TARGET_KM_KIRKWOOD=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_LSXL=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_LSXL=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x07d00000
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CONFIG_TARGET_KM_KIRKWOOD=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_NAS220=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_NET2BIG_V2=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_NETSPACE_V2=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_NETSPACE_V2=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_NETSPACE_V2=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_NETSPACE_V2=y
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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CONFIG_TARGET_NSA310S=y
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_SYS_THUMB_BUILD=y
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CONFIG_KIRKWOOD=y
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CONFIG_SYS_TEXT_BASE=0x600000
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@ -1,4 +1,5 @@
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CONFIG_ARM=y
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CONFIG_SYS_DCACHE_OFF=y
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CONFIG_SYS_THUMB_BUILD=y
|
||||
CONFIG_KIRKWOOD=y
|
||||
CONFIG_SYS_TEXT_BASE=0x600000
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_SYS_THUMB_BUILD=y
|
||||
CONFIG_KIRKWOOD=y
|
||||
CONFIG_SYS_TEXT_BASE=0x600000
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_ARCH_EXYNOS=y
|
||||
CONFIG_SYS_TEXT_BASE=0x43E00000
|
||||
CONFIG_ARCH_EXYNOS4=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_KIRKWOOD=y
|
||||
CONFIG_SYS_TEXT_BASE=0x600000
|
||||
CONFIG_TARGET_POGO_E02=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_KIRKWOOD=y
|
||||
CONFIG_SYS_TEXT_BASE=0x07d00000
|
||||
CONFIG_TARGET_KM_KIRKWOOD=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_SYS_THUMB_BUILD=y
|
||||
CONFIG_KIRKWOOD=y
|
||||
CONFIG_SYS_TEXT_BASE=0x600000
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_TARGET_STV0991=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00010000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_TARGET_WOODBURN=y
|
||||
CONFIG_SYS_TEXT_BASE=0xA0000000
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_TARGET_WOODBURN_SD=y
|
||||
CONFIG_SYS_TEXT_BASE=0x82000000
|
||||
CONFIG_SPL_GPIO_SUPPORT=y
|
||||
|
|
|
@ -1,4 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_ARCH_LPC32XX=y
|
||||
CONFIG_SYS_TEXT_BASE=0x80100000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini_qspi"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_ARCH_VERSAL=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFFC0000
|
||||
CONFIG_ENV_SIZE=0x80
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_ARCH_VERSAL=y
|
||||
CONFIG_SYS_TEXT_BASE=0x10000
|
||||
CONFIG_ENV_SIZE=0x80
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_ARCH_VERSAL=y
|
||||
CONFIG_SYS_TEXT_BASE=0x10000
|
||||
CONFIG_ENV_SIZE=0x80
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFFC0000
|
||||
CONFIG_ENV_SIZE=0x80
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_TEXT_BASE=0x10000
|
||||
CONFIG_ENV_SIZE=0x80
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_TEXT_BASE=0x10000
|
||||
CONFIG_ENV_SIZE=0x80
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_nand"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_TEXT_BASE=0x10000
|
||||
CONFIG_ENV_SIZE=0x80
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFFC0000
|
||||
CONFIG_ENV_SIZE=0x80
|
||||
|
|
|
@ -1,5 +1,7 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="zynq_cse"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_ARCH_ZYNQ=y
|
||||
CONFIG_SYS_TEXT_BASE=0x100000
|
||||
CONFIG_ENV_SIZE=0x190
|
||||
|
|
|
@ -1,5 +1,7 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="zynq_cse"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_ARCH_ZYNQ=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFFC0000
|
||||
CONFIG_ENV_SIZE=0x190
|
||||
|
|
|
@ -1,5 +1,7 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="zynq_cse"
|
||||
CONFIG_SYS_ICACHE_OFF=y
|
||||
CONFIG_SYS_DCACHE_OFF=y
|
||||
CONFIG_ARCH_ZYNQ=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFFC0000
|
||||
CONFIG_ENV_SIZE=0x190
|
||||
|
|
|
@ -21,7 +21,6 @@
|
|||
#define CONFIG_SYS_TIMER_COUNTS_DOWN
|
||||
#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
|
||||
#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
/* STACK */
|
||||
#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
|
||||
|
|
|
@ -15,9 +15,6 @@
|
|||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_INITRD_TAG
|
||||
|
||||
/* Enable cache controller */
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x80000000
|
||||
|
||||
#ifdef CONFIG_PRE_CON_BUF_SZ
|
||||
|
|
|
@ -100,8 +100,6 @@
|
|||
|
||||
#define CONFIG_USBID_ADDR 0x34052c46
|
||||
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
#define CONFIG_SYS_L2CACHE_OFF
|
||||
|
||||
#endif /* __BCM23550_W1D_H */
|
||||
|
|
|
@ -16,9 +16,6 @@
|
|||
/* Avoid overwriting factory configuration block */
|
||||
#define CONFIG_BOARD_SIZE_LIMIT 0x40000
|
||||
|
||||
/* We will never enable dcache because we have to setup MMU first */
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
/*
|
||||
* Environment settings
|
||||
*/
|
||||
|
|
|
@ -94,6 +94,4 @@
|
|||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */
|
||||
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
#endif /* _CONFIG_DB_88F6281_BP_H */
|
||||
|
|
|
@ -14,8 +14,6 @@
|
|||
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250
|
||||
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
#if !defined(CONFIG_SPL_BUILD)
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#endif
|
||||
|
|
|
@ -17,8 +17,6 @@
|
|||
/* High Level Configuration Options */
|
||||
#define CONFIG_MX35
|
||||
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
|
||||
|
||||
/* Set TEXT at the beginning of the NOR flash */
|
||||
|
|
|
@ -33,9 +33,6 @@
|
|||
* Commands configuration
|
||||
*/
|
||||
|
||||
/* Disable DCACHE */
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
/* Network configuration */
|
||||
#ifdef CONFIG_CMD_NET
|
||||
#define CONFIG_ARMADA100_FEC
|
||||
|
|
|
@ -6,8 +6,6 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
|
||||
|
||||
#define CONFIG_SYS_TIMER_RATE (150000000/256)
|
||||
|
|
|
@ -36,8 +36,6 @@
|
|||
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
|
||||
#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
|
||||
#define CONFIG_MALLOC_F_ADDR 0x182000
|
||||
|
|
|
@ -24,8 +24,6 @@
|
|||
#define CONFIG_SYS_SPL_MALLOC_START 0x00120000
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
|
||||
#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
#define CONFIG_MALLOC_F_ADDR 0x00120000
|
||||
|
||||
#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
|
||||
|
|
|
@ -23,8 +23,6 @@
|
|||
#define CONFIG_SYS_SPL_MALLOC_START 0x00120000
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
|
||||
#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
#define CONFIG_MALLOC_F_ADDR 0x00120000
|
||||
|
||||
#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
|
||||
|
|
|
@ -14,8 +14,6 @@
|
|||
#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
|
||||
#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
|
||||
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
/* ORIGEN has 4 bank of DRAM */
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x40000000
|
||||
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
|
||||
|
|
|
@ -6,7 +6,6 @@
|
|||
|
||||
#ifndef __CONFIG_STV0991_H
|
||||
#define __CONFIG_STV0991_H
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
|
||||
|
||||
/* ram memory-related information */
|
||||
|
|
|
@ -17,7 +17,6 @@
|
|||
/* SoC Configuration */
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
#define CONFIG_SPL_TARGET "u-boot-spi.gph"
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
/* Memory Configuration */
|
||||
#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
|
||||
|
|
|
@ -17,8 +17,6 @@
|
|||
#define CONFIG_MX35_HCLK_FREQ 24000000
|
||||
#define CONFIG_SYS_FSL_CLK
|
||||
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
|
||||
|
||||
/* This is required to setup the ESDC controller */
|
||||
|
|
|
@ -19,8 +19,6 @@
|
|||
*/
|
||||
#define CONFIG_MACH_TYPE 736
|
||||
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
#if !defined(CONFIG_SPL_BUILD)
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#endif
|
||||
|
|
|
@ -10,8 +10,6 @@
|
|||
#ifndef __CONFIG_VERSAL_MINI_H
|
||||
#define __CONFIG_VERSAL_MINI_H
|
||||
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS
|
||||
|
|
|
@ -12,7 +12,6 @@
|
|||
|
||||
#include <configs/xilinx_zynqmp_mini.h>
|
||||
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_MALLOC_LEN 0x800000
|
||||
|
||||
|
|
|
@ -12,7 +12,6 @@
|
|||
|
||||
#include <configs/xilinx_zynqmp_mini.h>
|
||||
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
#define CONFIG_SYS_SDRAM_SIZE 0x1000000
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x0
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000)
|
||||
|
|
|
@ -12,7 +12,6 @@
|
|||
|
||||
#include <configs/xilinx_zynqmp_mini.h>
|
||||
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000)
|
||||
#define CONFIG_SYS_MALLOC_LEN 0x2000
|
||||
|
||||
|
|
|
@ -10,8 +10,6 @@
|
|||
#define __CONFIG_ZYNQ_CSE_H
|
||||
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
|
||||
#include <configs/zynq-common.h>
|
||||
|
||||
|
|
Loading…
Reference in a new issue