Commit graph

531 commits

Author SHA1 Message Date
Yang Xiwen
08ad608aa2 dt-binding: histb-clock: add clocks definition for Hi3798MV200
These clocks are found on Hi3798MV200

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-05-03 09:05:24 -04:00
Linus Walleij
8a5122bfd3 arm: dts: Import device tree for Broadcom Northstar
This brings in the main SoC device tree used by the
Broadcom Northstar chipset, i.e. BCM4709x and BCM5301x.
This is taken from the v6.3 Linux kernel.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02 14:23:58 -04:00
Jianlong Huang
d60f384938 dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions
Add pinctrl definitions for StarFive JH7110 SoC.

Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
58c9c60b64 dt-bindings: clock: Add StarFive JH7110 clock definitions
Add all clock outputs for the StarFive JH7110 clock generator.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Yanhong Wang
c10483045e dt-bindings: reset: Add StarFive JH7110 reset definitions
Add resets for the StarFive JH7110 system(SYS),system-top-group(STG) and
always-on(AON) reset controller.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-20 16:08:44 +08:00
Tho Vu
0296ec364d dt-bindings: clock: Add R8A779G0 V4H CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the
Renesas R-Car V4H (R8A779G0) SoC from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Tho Vu
3813c3c0a5 dt-bindings: power: Add R8A779G0 V4H SYSC power domain definitions
Add power domain indices for R-Car V4H (R8A779G0) from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Tho Vu
2fa93af66a dt-bindings: clock: Add R8A779F0 S4 CPG Core Clock headers
Add definitions for R8A779F0 S4 CPG Core Clock headers from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Tho Vu
ec6f6acac1 dt-bindings: power: Add R8A779F0 S4 SYSC power domain definitions
Add power domain indices for R-Car S4 (R8A779F0) from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Andre Przywara
6621cc85f7 sunxi: dts: arm: update devicetree files from Linux v6.2-rc2
Sync the devicetree files from the Linux kernel repo, v6.2-rc2.
This is covering the 32-bit SoCs, from arch/arm/boot/dts.

This enables some new devices for the F1C100s family, though this is of
little relevance to U-Boot itself.
The H3 gains the "phys" property for the first USB controller, which
prevents an error message when U-Boot's USB stack comes up, and allows
using this port in host mode.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-03-05 23:33:13 +00:00
Jagan Teki
a0f5a61dc1 dt-bindings: reset: add rk3588 reset definitions
Add reset ID defines for rk3588.

commit <0a8eb7dae617> ("dt-bindings: reset: add rk3588 reset
definitions")

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Jagan Teki
a8ac0d53f9 dt-bindings: power: Add power-domain header for rk3588
Add power-domain header for RK3588 SoC from description in TRM.

commit <67944950c2d0> ("dt-bindings: power: add power-domain header for
rk3588")

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Jagan Teki
f71feb4738 dt-bindings: clk: Add dt-binding header for RK3588
Add the dt-bindings header for the Rockchip RK3588, that gets
shared between the clock controller and the clock references
in the dts.

commit <f204a60e545c> ("dt-bindings: clock: add rk3588 clock
definitions")

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:27 +08:00
Jagan Teki
1bb92d7cb3 dt-bindings: rockchip: Sync rockchip, vop2.h from Linux
Sync rockchip,vop2.h from linux-next, and the last commit is

commit <604be85547ce> ("drm/rockchip: Add VOP2 driver")

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2023-02-28 18:07:26 +08:00
Sumit Garg
56443285f2 pinctrl-snapdragon: Get rid of custom drive-strength values
Use standard pinconf drive-strength values from Linux DT bindings rather
than ones based on custom u-boot header. These changes are in direction
to make u-boot DTs for Qcom SoCs to be compatible with standard Linux
DT bindings.

Also, add support for pinconf bias-pull-up.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Hai Pham
e019f98a2a dt-bindings: clock: Pick R-Car Gen3 R8A77961 M3W+ header from Linux 6.1.7
Pick R-Car Gen3 R8A77961 M3W+ CPG Core Clock header from Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update commit message
2023-02-02 01:49:19 +01:00
Hai Pham
cd6ad682ca dt-bindings: power: Pick R-Car Gen3 R8A77961 M3W+ header from Linux 6.1.7
Pick R-Car Gen3 R8A77961 M3W+ power domain header from Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update commit message
2023-02-02 01:49:19 +01:00
Marek Vasut
71d2a5e5ef ARM: dts: rmobile: Synchronize DTs with Linux 6.1.7
Synchronize R-Car device trees with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

The following script has been used for the synchronization:

$ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do
	if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then
		cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ;
	elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then
		cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/
	else
		echo "NOT FOUND: $i"
	fi
done
$ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' )

Move the include/dt-bindings/{clk,clock}/versaclock.h header used by
the renesas boards to match Linux 6.1.y as well.

Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used
by the arch/arm/dts/r8a774c0-cat874.dts board.

Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts
from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" .

Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect
the card enumeration in ebisu.dtsi /aliases DT node .

Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to
reflect the card enumeration in ulcb.dtsi /aliases DT node .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> # r8a779a0-falcon-u-boot.dts
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> # r8a779a0-falcon-u-boot.dts
2023-02-02 01:49:19 +01:00
Marek Vasut
9696b246e6 ARM: dts: rmobile: Synchronize DT headers with Linux 6.1.7
Synchronize R-Car device tree headers with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

This is only a copyright and SPDX identifier update, no
functional change.

The following script has been used for the synchronization:

$ for i in $(cd include/dt-bindings/clock/ ; ls -1 r8a*) ; do cp /linux-2.6/include/dt-bindings/clock/$i include/dt-bindings/clock/ ; done
$ for i in $(cd include/dt-bindings/power/ ; ls -1 r8a*) ; do cp /linux-2.6/include/dt-bindings/power/$i include/dt-bindings/power/ ; done

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-02-02 01:49:19 +01:00
Jagan Teki
766e7e04bc dt-bindings: power: Add power-domain header for rv1126
Add power-domain header for RV1126 SoC from description in TRM.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
4ebc5e36fb dt-bindings: clk: Add dt-binding header for RV1126
Add the dt-bindings header for the Rockchip RV1126, that gets shared
between the clock controller and the clock references in the dts.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Tom Rini
b82f12b642 First set of u-boot-at91 features for the 2023.04 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmO2mnEcHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyBAOB/4y7e9y0jdKSWDwMdZj
 enXK/U/GREFyuiSdadil0aJl9WfayjwZkh7uHSTj4pi9ApNivfoqsL7WZYpJxhRD
 WlpNhs3TZ70i8CgKUosdzcpquAQZUZhg6iV5DCObrK6yNJRGOXLIwMOd+vw/Xz6/
 YTGqzivEDMBuH/9HLuC0m+26PEpff8nenNEjC2k8ssG26ojLz7oCQh2HoHcSgNRc
 HkEYlFJ/Le8kM8Ak2F3ebmsfgMTnFrRVwV1BsZa5vO0BrMYgJCORsl7Cnfcw6/2N
 LEHG7kwlSorJeETn/gkLiZ+NyqzU+oFH0jGRZ5Ciqg1qcCO3k9yBMgWQzd7nTL6C
 5oZA
 =Ocdd
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-at91-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2023.04 cycle:

This feature set includes the new DM-based NAND flash driver (old non-DM
driver is still kept for backwards compatibility), and the move to DM
NAND flash driver for sam9x60ek board. Feature set also includes
devicetree alignment for sama7g5 with Linux, devicetree alignment on USB
with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor
configs and tweaks.
2023-01-06 11:53:26 -05:00
Sergiu Moga
ee25ed5899 dt-bindings: clk: at91: Define additional UTMI related clocks
Add definitions for an additional main UTMI clock as well as its
respective subclocks.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
7b88887ba7 dt-bindings: reset: add sama7g5 definitions
Upstream linux commit 5994f58977e0.

Add reset bindings for SAMA7G5. At the moment only USB PHYs are
included.

The three reset USB phy's have their ID's mapped from 4 to 6. There are
no USB phy's with ID's numbered from 0 to 3.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Tom Rini
14f43797d0 Prepare v2023.01-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmOgaw0ACgkQFHw5/5Y0
 tyxIeQv8DfAAB8hN+wWeDhQAJBXBLvV+RrocGJ2lpuWN0DUgT955l0zSjP4eD5I/
 sSsT8iJ15obkbWHq61V9W81Velw5qR+gHW9IAzFKiQBfvdcdfgWFeme9fWp/gqxn
 vvPc2sULA9utkc+kQ+qJy2hmTM7I0ZbKzUwTXSv+Tp9on3vlc0quKSHiZ1EvHNww
 8tW13d1r+Be+CC+GVPrhJojfKBcYVJhW21rJMgb4JdfGNWKmpUpF6fUzHe0wiy2P
 HSnScr44E099t9RDZabw0V1fEgQqxIAmL1qQamXf9ddLZQM9Sq63lygTtGsqg61+
 qeHCZVjPg9cXayGfRVesH8sko3vW+IPuo0Q6Ox0vAyRSyzTpOcTuzn3RcMrq+mfu
 ZRF32aFJKVvAI3xesOj1aCBBYjl4POiHA8i3yeP9KcjqW3So0aphDtxp1idgwOZl
 kIxuC4ItWyF7xoyng/7RWwr2VjcKSyw58stRjfV+WNcByV4+ud1A59vsgZOqO49m
 0bLx5dGu
 =EX/F
 -----END PGP SIGNATURE-----

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-21 13:09:01 -05:00
Eugen Hristev
f2d6c888f4 dt-bindings: mfd: add at91-usart.h from Linux
Copy include file dt-bindings/mfd/at91-usart.h from Linux

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2022-12-20 11:59:07 +02:00
Johan Jonker
4d89330b8a rockchip: rk3128-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3128
sync the clock dt-binding header.
This is the state as of v6.0 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Bryan Brattlof
253802912a arm: dts: introduce am62a7 dtbs from linux kernel
Introduce the basic am62a7 SoC dtbs from the v6.1-rc3 tag of the linux
kernel along with the new am62a specific pinmux definition that we will
use to generate the dtbs for the u-boot-spl and u-boot binaries

Co-developed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-12-09 14:10:28 -05:00
Gabriel Fernandez
01c8b664d2 dt-bindings: stm32mp13: add clock & reset support for STM32MP13
Add support of stm32mp13 DT bindings of clock and reset.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-07 16:49:35 +01:00
Conor Dooley
540d02217f dt-bindings: clk: add missing clk ids for microchip mpfs
When this binding header was initally upstreamed, the PLL clocking the
microprocessor subsystem (MSS) and the RTC reference clocks were
omitted. Add them now, matching the IDs used in Linux.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Marcel Ziswiler
dbd5ca2e46 imx8mm: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
f067b59743 imx8mn: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
0b42fdca2d imx8mp: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
cb9b70fd2f imx8mq: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
ed7bda5710 imx8ulp: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-08 17:35:00 +01:00
Marcel Ziswiler
62f96866d3 imxrt1050: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Note: Nowadays, the intent is for them regular device trees to just be
synchronised from them Linux kernel device trees and any and all U-Boot
specific changes need to go into the -u-boot.dtsi device tree include
files which BTW get included automatically by the U-Boot build system.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-08 17:35:00 +01:00
Tom Rini
7d8ab3cd63 u-boot-imx-20221024
-------------------
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13916
 
 - for 2022.01
 - rework Kontron boards (mx6 and mx8)
 - fixes for Toradex
 - fixes (SPI, CAAM, )
 - sync DT with Linux
 - fixes for Gateworks GW7903 and GW7904 PMIC
 - Engicam i.Core MX8M Plus EDIMM2.2
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCY1aVgA8cc2JhYmljQGRl
 bnguZGUACgkQ9PVl5Jpo76YlhwCfXTQJzJXruk6UKg1zbsimD3bsChUAoJFzB3yp
 zft+THzNdQTnfUGN9u+U
 =JHxW
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20221024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20221024
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13916

- for 2022.01
- rework Kontron boards (mx6 and mx8)
- fixes for Toradex
- fixes (SPI, CAAM, )
- sync DT with Linux
- fixes for Gateworks GW7903 and GW7904 PMIC
- Engicam i.Core MX8M Plus EDIMM2.2
2022-10-24 10:04:30 -04:00
Marcel Ziswiler
2419acf7e2 imx6sl: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-10-24 13:43:21 +02:00
Marcel Ziswiler
97e530dd56 imx6sll: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-10-24 13:43:21 +02:00
Marcel Ziswiler
dfd0adc2f6 imx7ulp: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-10-24 13:43:21 +02:00
Tom Rini
145a996592 Merge tag 'u-boot-rockchip-20221020' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- dts update and sync for rk356x, rk3288, rk3399 from Linux;
- Add rk3399 EAIDK-610 board support;
- Update for puma-rk3399 board;
- some fix and typo fix in different drivers;
2022-10-20 22:32:38 -04:00
FUKAUMI Naoki
85a8ef1264 arm: dts: rockchip: rk356x: sync with Linux 6.0
prepare for rk3566 based board

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Andre Przywara
7f53f5093b sunxi: dts: arm64: update devicetree files
Update the devicetree files from the Linux kernel, version v6.0-rc4.
This is covering the 64-bit SoCs, from arch/arm64/boot/dts/allwinner.

This avoids the not backwards-compatible r_intc binding change, to allow
older kernels to boot, but the other nodes are updated.

Not much change here, the vast majority is actually cosmetic: node names
and using symbolic names for the the RTC clocks.
Some A64 boards gain some audio nodes.
The H616 DTs are now switched to the version finally merged into the
kernel, which brings some changes, but none affecting U-Boot.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-18 08:15:59 +01:00
Jim Liu
9ca71c9c19 arm: nuvoton: Add support for Nuvoton NPCM845 BMC
Add basic support for the Nuvoton NPCM845 EVB (Arbel).

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-10-06 21:05:17 -04:00
Weijie Gao
40746bf429 clk: mediatek: add clock driver support for MediaTek MT7981 SoC
This patch adds clock driver support for MediaTek MT7981 SoC

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:16 -04:00
Weijie Gao
37d5a9a29d clk: mediatek: add clock driver support for MediaTek MT7986 SoC
This patch adds clock driver support for MediaTek MT7986 SoC

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:16 -04:00
Weijie Gao
14c81eb2f6 dt-bindings: pinctrl: mediatek: add a header for common pinconf parameters
This patch adds a pinctrl header for common pinconf parameters such as
pull-up/pull-down resistors and drive strengths.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:15 -04:00
Tom Rini
e9a1ff9724 Merge branch 'master' into next
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-19 16:07:12 -04:00
Jesse Taube
7d9c6f1781 RAM: Add changes for i.MXRT11xx series
The i.MXRT11 series has different offsets for IOCR_MUX, it also can
address 64MiB of SDRAM so add a macro for that.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00
Jesse Taube
3d579c11e0 dt-bindings: imx: Add clock binding for i.MXRT1170
Add the clock binding doc for i.MXRT1170.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-09-18 20:42:56 +02:00