Commit graph

90813 commits

Author SHA1 Message Date
Randolph
866dcd88a0 riscv: binman: fix the load field format
Using /bits/ 64 prefix for 64 bits address

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-06 16:05:39 +08:00
Yu Chien Peter Lin
d1b24a6140 riscv: andes: Fix enable register settings of PLICSW
On 32-core platform, hart31 gets stuck at secondary_hart_loop
as the corresponding enable bit is not set in enable_ipi().
We should program the next word (0x2f84) which is assigned
as the enable register of hart31. It should be done in the same
way when we invoke riscv_send_ipi() to trigger software interrupt
on hart31.

The following diagram shows the enable bits of the fixed PLICSW
scheme.

   Pending regs: 0x1000  x---0---0---0---0------0---0
Pending hart ID:             0   1   2   3 ... 30  31
   Interrupt ID:         0   1   2   3   4 ... 31  32
                         |   |   |   |   |      |   |
    Enable regs: 0x2000  x---1---0---0---0-...--0---0---> hart0
                         |   |   |   |   |      |   |
                 0x2080  x---0---1---0---0-...--0---0---> hart1
                         |   |   |   |   |      |   |
                 0x2100  x---0---0---1---0-...--0---0---> hart2
                         |   |   |   |   |      |   |
                 0x2180  x---0---0---0---1-...--0---0---> hart3
                         .   .   .   .   .      .   .
                         .   .   .   .   .      .   .
                         .   .   .   .   .      .   .
                 0x2f00  x---0---0---0---0-...--1---0---> hart30
                         |   |   |   |   |      |   |
                 0x2f80  x---0---0---0---0-...--0---1---> hart31
                         <-------- word 0 -------><--- word 1 --->

This patch includes some cleanups to macros/functions.

Fixes: ebf11273220a ("riscv: andes: Rearrange Andes PLICSW to single-bit-per-hart strategy")
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Randolph <randolph@andestech.com>
2023-12-06 16:05:39 +08:00
Heinrich Schuchardt
3980baa411 risc-v: qemu: imply NVME_PCI
CONFIG_NVME=y without CONFIG_NVME_PCI=y does not provide working NVMe
support. Instead of implying CONFIG_NVME we must imply CONFIG_NVME_PCI
which will select CONFIG_NVME.

Fixes: e64db0d92e ("riscv: qemu: Enable e1000 and nvme support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2023-12-06 16:05:39 +08:00
Chanho Park
21ea9a9dd7 configs: visionfive2: Enable watchdog driver
Enables StarFive Watchdog driver and WDT command.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00
Chanho Park
a31622cd64 riscv: dts: jh7110: Add watchdog device tree node
Adds jh7110 watchdog device tree node.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00
Chanho Park
da26455098 watchdog: Add StarFive Watchdog driver
Add to support StarFive watchdog driver. The driver is imported from
linux kernel's drivers/watchdog/starfive-wdt.c without jh7100 support
because there is no support of jh7100 SoC in u-boot yet.
Howver, this patch has been kept the variant coding style because JH7100
can be added later and have a consistency with the linux driver.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00
Chanho Park
8ef2d7926f clk: starfive: jh7110: Add watchdog clocks
Add JH7110_SYSCLK_WDT_APB and JH7110_SYSCLK_WDT_CORE clocks for JH7110
watchdog device.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00
Tom Rini
d379150621 Prepare v2024.01-rc4
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Merge tag 'v2024.01-rc4' into next

Prepare v2024.01-rc4

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# gpg: Signature made Mon 04 Dec 2023 01:47:24 PM EST
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]
2023-12-04 21:39:57 -05:00
Ilias Apalodimas
6805b4dbad efi_loader: Make DisconnectController follow the EFI spec
commit 239d59a65e ("efi_loader: reconnect drivers on failure")
tried to fix the UninstallProtocol interface which must reconnect
any controllers it disconnected by calling ConnectController()
in case of failure. However, the reconnect functionality was wired in
efi_disconnect_all_drivers() instead of efi_uninstall_protocol().

As a result some SCT tests started failing.
Specifically, BBTestOpenProtocolInterfaceTest333CheckPoint3() test
 - Calls ConnectController for DriverImageHandle1
 - Calls DisconnectController for DriverImageHandle1 which will
   disconnect everything apart from TestProtocol4. That will remain
   open on purpose.
 - Calls ConnectController for DriverImageHandle2. TestProtocol4
   which was explicitly preserved was installed wth BY_DRIVER attributes.
   The new protocol will call DisconnectController since its attributes
   are BY_DRIVER|EXCLUSIVE, but TestProtocol4 will not be removed. The
   test expects EFI_ACCESS_DENIED which works fine.

   The problem is that DisconnectController, will eventually call
   EFI_DRIVER_BINDING_PROTOCOL.Stop(). But on the aforementioned test
   this will call CloseProtocol -- the binding protocol is defined in
   'DBindingDriver3.c' and the .Stop function uses CloseProtocol.
   If that close protocol call fails with EFI_NOT_FOUND, the current code
   will try to mistakenly reconnect all drivers and the subsequent tests
   that rely on the device being disconnected will fail.

Move the reconnection in efi_uninstall_protocol() were it belongs.

Fixes: commit 239d59a65e ("efi_loader: reconnect drivers on failure")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-12-05 01:38:56 +01:00
Heinrich Schuchardt
1be415b21b efi_loader: create memory reservations in ACPI case
ACPI tables cannot convey memory reservations for ARM and RISC-V.
x86 uses the BIOS E820 table for this purpose. We cannot simply ignore the
device-tree when booting via ACPI. We have to assign EfiReservedMemory
according to the prior stage device-tree ($fdtaddr) or as fallback the
control device-tree ($fdtcontroladdr).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-05 01:38:56 +01:00
Simon Glass
8c06b27eec efi: Correct display of table GUIDs
The printf() %pU option decodes GUIDs so it is not necessary to do this
first. Drop the incorrect code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-12-05 01:38:56 +01:00
Simon Glass
a900d88e1a efi: Collect the ACPI tables in the app
Locate these so that they can be displayed using the 'acpi' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-12-05 01:38:56 +01:00
Masahisa Kojima
f32fee0359 scripts/Makefile.lib: print error when no public key is specified
The current build system embeds the EFI Signature List(ESL)
into the dtb to be used in the EFI capsule authentication.
This ESL file is specified through the CONFIG_EFI_CAPSULE_ESL_FILE
Kconfig option. If CONFIG_EFI_CAPSULE_ESL_FILE is not specified,
U-boot build ends up with failure but the cause of failure is not
easily understandable. Current error message is as follows.

FATAL ERROR: Error reading file into data: Is a directoryCheck /home/ubuntu/src/ledge/u-boot/arch/arm/dts/.synquacer-sc2a11-developerbox.dtb.pre.tmp for errors
make[2]: *** [scripts/Makefile.lib:355: arch/arm/dts/synquacer-sc2a11-developerbox.dtb] Error 1
make[1]: *** [dts/Makefile:44: arch-dtbs] Error 2
make: *** [Makefile:1165: dts/dt.dtb] Error 2
make: *** Waiting for unfinished jobs....

This commit shows the error message that CONFIG_EFI_CAPSULE_ESL_FILE
must be specified when the EFI capsule authentication is enabled, then
terminate the build with error.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Weizhao Ouyang <o451686892@gmail.com>
2023-12-05 01:38:56 +01:00
Mattijs Korpershoek
1e8a8f3232 doc: sending_patches.rst: s/Superseeded/Superseded
This is a common typo listed in scripts/spelling.txt. Fix it to match the
patchwork status, which is superseded.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-12-05 01:38:56 +01:00
Tom Rini
463e341348 doc: clang: Update and correct support notes
At this point, clang can be used on both 32bit and 64bit targets without
issue. Make note of logic we have that will inform clang of the
architecture to build for.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-12-05 01:38:56 +01:00
Simon Glass
a6ac50cad5 sandbox: Fix VPL instructions
Fix the devicetree used with sandbox. This is needed because the
default (full) devicetree must be used by all phases of boot, with
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-12-05 01:38:56 +01:00
Tom Rini
2f0282922b Prepare v2024.01-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-12-04 13:46:56 -05:00
Heinrich Schuchardt
89cb3a9f0a efi_loader: generated SMBIOS table below 4 GiB
We currently use an outdated format 32-bit format for SMBIOS tables.
So we must allocate SMBIOS tables below 4 GiB.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-12-04 13:42:40 -05:00
Tom Rini
e37e6f181e Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-watchdog
- Correct watchdog timeout print message (Chanho Park)
2023-12-04 13:37:18 -05:00
Chanho Park
a341a0e01f watchdog: Correct watchdog timeout print message
The wdt_start function takes timeout_ms as a parameter and starts the
watchdog with this value. However, when you output the message, it shows
the default timeout value for the watchdog device.
So this patch fixes that part to output the correct timeout value.

Before -->
StarFive # wdt start 3000
WDT:   Started watchdog@13070000 without servicing  (60s timeout)

After -->
StarFive # wdt start 3000
WDT:   Started watchdog@13070000 without servicing  (3s timeout)

Fixes: c2fd0ca1a8 ("watchdog: Integrate watchdog triggering into the cyclic framework")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-12-04 08:09:09 +01:00
Tom Rini
5c4e9d0c74 Merge branch 'master-rpc-off' of https://source.denx.de/u-boot/custodians/u-boot-sh 2023-12-03 16:30:32 -05:00
Tom Rini
b56d21f3bb Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-usb
- USB XHCI fixes
2023-12-02 13:37:27 -05:00
Cong Dang
13bdb6a269 ARM: dts: renesas: Disable RPC driver on R8A779G0 V4H White Hawk board
As requirement of CR side, QSPI Flash usage via RPC driver shall
be disabled and leaving the control of this module to CR side.
Perform DT modification to disable the RPC SPI.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Do not modify defconfig, modify the DT instead, this way
        the RPC SPI can be enabled without recompiling the U-Boot
	itself. Update commit message accordingly.]
2023-12-02 17:16:01 +01:00
Marek Vasut
b95a250805 ARM: dts: renesas: Clean up R8A779G0 V4H RPC SPI DT node
Use the phandle reference to &rpc node in arch/arm/dts/r8a779g0.dtsi
and remove properties which are already in arch/arm/dts/r8a779g0.dtsi.
No functional change and no resulting DT change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-02 17:16:01 +01:00
Heinrich Schuchardt
493e0e2577 usb: USB_XHCI_PCI depends on PCI
Compiling with CONFIG_USB_XHCI_PCI and CONFIG_PCI=n results in

    usb/host/xhci-pci.c:48:(.text.xhci_pci_probe+0x44):
    undefined reference to `dm_pci_write_config32

Add the missing Kconfig dependency.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 16:01:59 +01:00
Jonas Karlman
6e91df96dc usb: dwc3-generic: Use combined glue and ctrl node for RK3588
Like Rockchip RK3328 and RK3568, the RK3588 also have a single node to
represent the glue and ctrl for USB 3.0.

Use rk_ops as driver data to select correct ctrl node for RK3588 DWC3.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:12 +01:00
Hector Martin
75aabe595f usb: storage: Use the correct CBW lengths
USB UFI uses fixed 12-byte commands (as does RBC, which is not
supported), but SCSI does not have this limitation. Use the correct
command block lengths depending on the subclass.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:12 +01:00
Hector Martin
b5999f8f6c usb: hub: Add missing reset recovery delay
Some devices like YubiKeys need more time before SET_ADDRESS. The spec
says we need to wait 10ms.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:12 +01:00
Hector Martin
a14843fdac usb: xhci: Fix DMA address calculation in queue_trb
We need to get the DMA address before incrementing the pointer, as that
might move us onto another segment.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
2fd7037122 usb: xhci: Do not panic on event timeouts
Now that we always check the return value, just return NULL on timeouts.
We can still log the error since this is a problem, but it's not reason
to panic.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
fb5502be25 usb: xhci: Fail on attempt to queue TRBs to a halted endpoint
This isn't going to work, don't pretend it will and then end up timing
out.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
9d88bd4dcf usb: xhci: Recover from halted bulk endpoints
There is currently no codepath to recover from this case. In principle
we could require that the upper layer do this explicitly, but let's just
do it in xHCI when the next bulk transfer is started, since that
reasonably implies whatever caused the problem has been dealt with.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
6f64f0ae23 usb: xhci: Allow context state errors when halting an endpoint
There is a race where an endpoint may halt by itself while we are trying
to halt it, which results in a context state error. See xHCI 4.6.9 which
mentions this case.

This also avoids BUGging when we attempt to stop an endpoint which was
already stopped to begin with, which is probably a bug elsewhere but
not a good reason to crash.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
2526cd9932 usb: xhci: Better error handling in abort_td()
If the xHC has a problem with our STOP ENDPOINT command, it is likely to
return a completion directly instead of first a transfer event for the
in-progress transfer. Handle that more gracefully.

We still BUG() on the error code, but at least we don't end up timing
out on the event and ending up with unexpected event errors.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
8d1e03f984 usb: xhci: Guard all calls to xhci_wait_for_event
xhci_wait_for_event returns NULL on timeout, so the caller always has to
check for that. This addresses immediate explosions in this part
of the code when timeouts happen, but not the root cause for the
timeout.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Tom Rini
4a363dd516 Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next
Device tree improvents for Paz00 and DM PMIC convertion of recently
merged Tegra boards.
2023-11-30 09:33:31 -05:00
Tom Rini
6357cf0cc4 Merge branch '2023-11-29-assorted-platform-updates' into next
- Add a TFTP put test, a few TI Keystone 2 updates, fix stack-protector
  for PowerPC, fixes in lib/slre, timer-uclass and pvblock.
2023-11-29 11:16:13 -05:00
Andrew Davis
53a2300012 ARM: keystone2: Remove unneeded inclusions of common.h
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-29 09:32:15 -05:00
Andrew Davis
cef52c9cb2 configs: keystone2: Do not include hardware.h
This is a hacky way to have this file included in all source files that
include common.h, instead just include from the files that need it.

Signed-off-by: Andrew Davis <afd@ti.com>
2023-11-29 09:32:15 -05:00
Andrew Davis
83ad745cb9 configs: keystone2: Remove unused SPL_MALLOC_F_SIZE and KEYSTONE_SPL_STACK_SIZE
These are leftover definitions. While here cleanup some leftover comments.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-29 09:32:15 -05:00
Christophe Leroy
4072572b0f Fix stack-protector for powerpc
On powerpc, stack protector expects a function called
__stack_chk_fail_local() instead of __stack_chk_fail()

And some versions of GCC for powerpc default to TLS canary
instead of global canary, so always force GCC to use global
canary with -mstack-protector-guard=global

Cc: Joel Peshkin <joel.peshkin@broadcom.com>
Fixes: 4e9bce1243 ("Add support for stack-protector")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2023-11-29 09:32:15 -05:00
AKASHI Takahiro
654580eee1 xen: pvblock: fix the maximum io size in one operation
The current implementation may cause BUG_ON() in blkfront_aio()
	BUG_ON(n > BLKIF_MAX_SEGMENTS_PER_REQUEST);

In pvblock_iop(), a read/write operation will be split into smaller
chunks of data so that the size in one access (aio_nbytes) is limited
to, at the maximum,
	BLKIF_MAX_SEGMENTS_PER_REQUEST * PAGE_SIZE

But this works only if when the *buffer* passed in to pvblock_io()
is page-aligned. If not, the given data region may stand across
(BLKIF_MAX_SEGMENTS_PER_REQUEST + 1) pages. See the logic in
blkfront_aio():
	start = (uintptr_t)aiocbp->aio_buf & PAGE_MASK;
	end = ((uintptr_t)aiocbp->aio_buf + aiocbp->aio_nbytes +
	       PAGE_SIZE - 1) & PAGE_MASK;
Then this will lead to BUG_ON() above.

This can be fixed by decreasing the maximum size of aio_nbytes.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: commit 3a739cc6c9 ("xen: pvblock: Implement front-back protocol and do IO")
2023-11-29 09:32:15 -05:00
Alex Bee
d6d8078cb3 timer-uclass: Always use "clock-frequency" property as fallback
Currently the "clock-frequency" DT property is only being considered as an
fallback if either there is no clock driver, the clock driver implements
the request-op correctly or there is no clock defined for the timer at all.

This patch makes "clock-frequency" also being picked as a fallback if
getting the clock-rate fails, since clk_get(_by_index) will return no
error, if a clock driver does not implement the request-op and does also
not support getting the rate of the clock in question.
timer_post_probe will take care if the property does not exist in the DT or
is defined as 0.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
2023-11-29 09:32:15 -05:00
Francois Berder
891b178c57 lib/slre: Fix memory leak if regex compilation fails
Signed-off-by: Francois Berder <fberder@outlook.fr>
2023-11-29 09:32:15 -05:00
Love Kumar
9f0588a1a9 test/py: net: Add a TFTP put test
Execute tftpput command for uploading files to a server and validate its
size & CRC32.

Signed-off-by: Love Kumar <love.kumar@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-11-29 09:32:15 -05:00
Tom Rini
339d96822e Merge patch series "cmd: add scmi command"
To quote the author:

"Scmi" command will be re-introduced per Michal's request.
The functionality is the same as I put it in my patch set of adding
SCMI base protocol support, but made some tweak to make UT, "ut dm
scmi_cmd," more flexible and tolerable when enabling/disabling a specific
SCMI protocol for test purpose.

Each commit may have some change history inherited from the preceding
patch series.

Test
====
The patch series was tested on the following platforms:
* sandbox
2023-11-28 22:31:09 -05:00
AKASHI Takahiro
3d6fe58437 test: dm: add scmi command test
In this test, "scmi" command is tested against different sub-commands.
Please note that scmi command is for debug purpose and is not intended
in production system.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
2023-11-28 22:31:03 -05:00
AKASHI Takahiro
23b159ed4a doc: cmd: add documentation for scmi
This is a help text for scmi command.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
2023-11-28 22:31:03 -05:00
AKASHI Takahiro
8055f90bd0 cmd: add scmi command for SCMI firmware
This command, "scmi", may provide a command line interface to various SCMI
protocols. It supports at least initially SCMI base protocol and is
intended mainly for debug purpose.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
2023-11-28 22:31:03 -05:00
AKASHI Takahiro
9c07c0a4fc firmware: scmi: support protocols on sandbox only if enabled
This change will be useful when we manually test SCMI on sandbox
by enabling/disabling a specific SCMI protocol.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-28 22:31:03 -05:00