Commit graph

83025 commits

Author SHA1 Message Date
Heinrich Schuchardt
00ec77f2b0 MAINTAINERS: add UEFI commands to EFI PAYLOAD
Add the following files to EFI PAYLOAD:

- cmd/bootefi.c
- cmd/efidebug.c
- cmd/eficonfig.c
- cmd/nvedit_efi.c

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-11-16 08:34:06 +01:00
Ilias Apalodimas
9fb3269ab3 efi_loader: initialize return values in efi_uninstall_multiple_protocol_interfaces_int()
If the va_list we got handed over contains no protocols we must return
EFI_SUCCESS.  However in that case the current code just returns
an unintialized value.
Fix that by setting the return value in the variable definition

Addresses-Coverity: CID 376195:  ("Uninitialized variables  (UNINIT)")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-11-16 08:34:06 +01:00
Quentin Schulz
2b94359e9c doc: fix build with sphinx 5.0 and later.
Sphinx 5.0 and later fails to build when language is set to None:
Warning, treated as error:
Invalid configuration value found: 'language = None'. Update your configuration to a valid langauge code. Falling back to 'en' (English)

Let's set the language to English since it is the language used for the
documentation.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-11-16 08:34:06 +01:00
Heinrich Schuchardt
030c2d187e doc: add man-page for cmp command
Provide a man-page for the cmp command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-11-16 08:34:06 +01:00
Heinrich Schuchardt
5727f922ca Documentation: man-page for command bootd
Provide a man-page for the bootd command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-16 08:34:06 +01:00
Heinrich Schuchardt
dd706c83be sandbox: fix documentation of struct host_ops
The documentation of struct host_ops should be Sphinx compliant.

Fixes: 9bd1aa8af2 ("dm: sandbox: Create a new HOST uclass")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-11-16 08:34:06 +01:00
Heinrich Schuchardt
a8a0fc4628 doc: fix documentation of enum gd_flags
Correct GD_FLG_CYCLIC_RUNNING documentation to match Sphinx style.

Fixes: d7de5ef629 ("cyclic: use a flag in gd->flags for recursion protection")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-11-16 08:34:06 +01:00
Heinrich Schuchardt
591e0f8780 riscv: enable reset via SBI on PolarFire Icicle Kit
HSS 2022.10 provides support for resetting the board.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-15 15:37:17 +08:00
Heinrich Schuchardt
5c89467262 riscv: clarify meaning of CONFIG_SBI_V02
Describe that CONFIG_SBI_V02=y does not mean SBI specification v0.2
but v0.2 or later.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-11-15 15:37:17 +08:00
Yu Chien Peter Lin
c277c787a0 riscv: Fix detecting FPU support in standard extension
We should check the string until it hits underscore, in case it
searches multi-letter extensions. For example, "rv64imac_xandes"
will be treated as D extension support since there is a "d" in
"andes", resulting illegal instruction caused by initializing FCSR.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-11-15 15:37:17 +08:00
Conor Dooley
3f3527044d riscv: dts: fix the mpfs's reference clock frequency
The initial devicetree for PolarFire SoC incorrectly created a fixed
frequency clock in the devicetree to represent the msspll, but the
msspll is not a fixed frequency clock. The actual reference clock on a
board is either 125 or 100 MHz, 125 MHz in the case of the icicle kit.
Swap the incorrect representation of the msspll out for the actual
reference clock.

Fixes: dd4ee416a6 ("riscv: dts: Add device tree for Microchip Icicle Kit")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Conor Dooley
4e405c68fb clk: microchip: mpfs: fix criticality of peripheral clocks
Sync the critical clocks in the U-Boot driver with those marked as
critical in Linux. The Linux driver has an explanation of why each clock
is considered to be critical, so import that too.

Fixes: 2f27c9219e ("clk: Add Microchip PolarFire SoC clock driver")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Conor Dooley
88b697fb37 clk: microchip: mpfs: fix periph clk parentage
Not all "periph" clocks are children of the AHB clock, some have the AXI
clock as their parent & the mtimer clock is derived from the external
reference clock directly. Stop assuming the AHB clock to be the parent
of all "periph" clocks and define their correct parents instead.

Fixes: 2f27c9219e ("clk: Add Microchip PolarFire SoC clock driver")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Conor Dooley
32cfdd5163 clk: microchip: mpfs: fix reference clock handling
The original devicetrees for PolarFire SoC messed up & defined the
msspll's output as a fixed-frequency, 600 MHz clock & used that as the
input for the clock controller node. The msspll is not a fixed
frequency clock and later devicetrees handled this properly. Check the
devicetree & if it is one of the fixed ones, register the msspll.
Otherwise, skip registering it & pass the reference clock directly to
the cfg clock registration function so that existing devicetrees are
not broken by this change.

As the MSS PLL is not a "cfg" or a "periph" clock, add a new driver for
it, based on the one in Linux.

Fixes: 2f27c9219e ("clk: Add Microchip PolarFire SoC clock driver")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Conor Dooley
fb103971fe clk: microchip: mpfs: convert parent rate acquistion to get_get_rate()
Currently the clock driver for PolarFire SoC takes a very naive approach
to the relationship between clocks. It reads the dt to get an input
clock, assumes that that is fixed frequency, reads the "clock-frequency"
property & uses that to set up both the "cfg" and "periph" clocks.

Simplifying for the sake of incremental fixes, the "correct" parentage for
the clocks currently supported in U-Boot is that the "cfg" clocks should
be children of the fixed frequency clock in the dt. The AHB clock is one
of these "cfg" clocks and is the parent of the "periph" clocks.

Instead of passing the clock rate of the fixed-frequency clock to the
"cfg" and "periph" registration functions and the name of the parents,
pass their actual parents & use clk_get_rate() to determine their parents
rates.

The "periph" clocks are purely gate clocks and should not be reading the
AHB clocks registers to determine their rates, as they can simply report
the output of clk_get_rate() on their parent.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Conor Dooley
540d02217f dt-bindings: clk: add missing clk ids for microchip mpfs
When this binding header was initally upstreamed, the PLL clocking the
microprocessor subsystem (MSS) and the RTC reference clocks were
omitted. Add them now, matching the IDs used in Linux.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-15 15:37:17 +08:00
Tom Rini
c4ee4fe92e For 2022.01
-----------
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14083
 
 - Fix UART
 - moved to binman (MX8 boards)
 - Toradex: sync DTS with Linux
 - Gateworks: fixes
 - New boards : MSC SM2S iMX8MP
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Merge tag 'u-boot-imx-20221114' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

For 2022.01
-----------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14083

- Fix UART
- moved to binman (MX8 boards)
- Toradex: sync DTS with Linux
- Gateworks: fixes
- New boards : MSC SM2S iMX8MP
2022-11-14 09:33:36 -05:00
Tom Rini
fac432652f Merge tag 'for-v2023.01-rc2' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c Fixes for v2023.01-rc2

- i2c-gpio: add a missing new line in printed string
  detected and fixed by Sergei

- microchip i2c driver fixes from Conor
  - fix erroneous late ack send
  - fix ack sending logic
2022-11-14 07:29:30 -05:00
Sergei Antonov
b0c485fd38 i2c: i2c-gpio: add newline
Add newline at the end of the printed string.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-11-14 07:24:47 +01:00
Conor Dooley
6d133b3158 i2c: microchip: fix erroneous late ack send
A late ack is currently being sent at the end of a transfer due to
incorrect logic in mchp_corei2c_empty_rx(). Currently the Assert Ack
bit is being written to the controller's control reg after the last
byte has been received, causing it to sent another byte with the ack.
Instead, the AA flag should be written to the control register when
the penultimate byte is read so it is sent out for the last byte.

Reported-by: Andreas Buerkler <andreas.buerkler@enclustra.com>
Fixes: 0dc0d1e094 ("i2c: Add Microchip PolarFire SoC I2C driver")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>

Removed Tag by hs: Fixes: 0190d48488 ("i2c: microchip: fix ack sending logic")
2022-11-14 07:21:58 +01:00
Conor Dooley
95b22bd6dc i2c: microchip: fix ack sending logic
"Master receive mode" was not correctly sending ACKs/NACKs in the
interrupt handler. Bring the handling of M_SLAR_ACK, M_RX_DATA_ACKED &
M_RX_DATA_NACKED in line with the Linux driver.

Fixes: 0dc0d1e094 ("i2c: Add Microchip PolarFire SoC I2C driver")
Reported-by: Shravan Chippa <shravan.chippa@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-11-14 07:20:10 +01:00
Fabio Estevam
fc1c1760de Revert "serial: mxc: have putc use the TXFIFO"
This reverts commit c7878a0483.

Since commit c7878a0483 ("serial: mxc: have putc use the TXFIFO"),
serial console corruption can be seen when priting inside board_init().

Revert it to avoid the regression.

Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
2022-11-12 14:16:26 +01:00
Fabio Estevam
c9713c1551 imx8-u-boot: Fix SPL guard option
We should guard the SPL nodes against CONFIG_SPL_BUILD to fix
the following build error when the blobs are absent:

binman: Fail open first container file mx8qm-ahab-container.img

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-11-12 14:13:49 +01:00
Tom Rini
0cbeed4f66 Merge branch '2022-11-10-symbol-migrations'
- Migrate a number of CONFIG symbols to Kconfig and start migrating some
  symbol families from CONFIG to the CFG namespace.
2022-11-10 10:09:40 -05:00
Tom Rini
cc1159bbfa global: Migrate CONFIG_HPS* symbols to the CFG namespace
Migrate all of CONFIG_HPS* to the CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
6cc04547cb global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
5155207ae1 global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace
Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-11-10 10:08:55 -05:00
Tom Rini
d236210c11 Convert CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
8c778f7834 Convert CONFIG_SYS_NONCACHED_MEMORY to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NONCACHED_MEMORY

To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to
gate if we are going to have noncached_... functions available and then
continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said
cache. We make this new option depend on both the architectures which
implement support and the drivers which make use of it.

Cc: Tom Warren <twarren@nvidia.com>
Cc: Mingming lee <mingming.lee@mediatek.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
02f5a01441 SYS_NONCACHED_MEMORY: Correct comment in common/board_f.c
The comment block in reserve_noncached has a typo in one filename and
an incorrect filename in another function reference. Correct both of
these.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
15713fc855 mediatek: Include <linux/sizes.h> where needed
These files reference SZ_ macros without including <linux/sizes.h>,
correct this.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
08574ed339 Convert CONFIG_SYS_MONITOR_LEN to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MONITOR_LEN

To do this, we set a default of 0 for everyone because there are a
number of cases where we define CONFIG_SYS_MONITOR_LEN but the only
impact is that we set TOTAL_MALLOC_LEN to be CONFIG_SYS_MALLOC_LEN +
CONFIG_ENV_SIZE, so we must continue to allow all boards to set this
value. Update the SPL code to use 200 KB as the default raw U-Boot size
directly, if we don't have a real CONFIG_SYS_MONITOR_LEN value.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:55 -05:00
Tom Rini
9ba938e744 Convert CONFIG_SYS_MMC_MAX_DEVICE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MMC_MAX_DEVICE

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-11-10 10:08:55 -05:00
Tom Rini
75fc79e530 Convert CONFIG_SYS_MMC_MAX_BLK_COUNT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MMC_MAX_BLK_COUNT

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-11-10 10:08:55 -05:00
Tom Rini
a918df21f0 Convert CONFIG_SYS_MAX_NAND_DEVICE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MAX_NAND_DEVICE

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 10:08:54 -05:00
Tom Rini
e28e0f47f3 rtc: Remove unused drivers
These drivers are not enabled anywhere, remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:54 -05:00
Tom Rini
2c8d04dd17 Convert CONFIG_SYS_LOADS_BAUD_CHANGE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_LOADS_BAUD_CHANGE
   CONFIG_LOADS_ECHO

As part of this, we move CMD_SAVES to be after CMD_LOADS as they are
logically related (load or save an s-record format file) and this makes
grouping of CONFIG_SYS_LOADS_BAUD_CHANGE easier.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:54 -05:00
Tom Rini
b85d75951f powerpc: Migrate SYS_L3_SIZE to Kconfig
Introduce three options, one for each observed L3 cache size, and have
the size select'd as needed.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:54 -05:00
Tom Rini
22a2283f2d powerpc: Migrate SYS_L2_SIZE to Kconfig
Introduce two options, one for each observed L2 cache size, and have the
size select'd as needed.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:54 -05:00
Tom Rini
3b677dcd9d fs: jffs2: Move SYS_JFFS2_SORT_FRAGMENTS to Kconfig
Move the symbol SYS_JFFS2_SORT_FRAGMENTS to Kconfig and use the only
remaining part of doc/README.JFFS2 that is still relevant and useful to
the help for this option.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:54 -05:00
Tom Rini
e020b974ce Remove unused symbols CONFIG_SYS_JFFS2_FIRST_BANK et al
This removes the following symbols:
   CONFIG_RTC_MCFRRTC
   CONFIG_SYS_JFFS2_FIRST_BANK
   CONFIG_SYS_JFFS2_FIRST_SECTOR
   CONFIG_SYS_JFFS2_NUM_BANKS
   CONFIG_SYS_LBC_CACHE_BASE
   CONFIG_SYS_LIME_SIZE
   CONFIG_SYS_MAMR
   CONFIG_SYS_MCFRRTC_BASE
   CONFIG_SYS_MONITOR_SEC

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:54 -05:00
Tom Rini
c56289ddaf Convert CONFIG_SYS_INTERLAKEN et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_INTERLAKEN
   CONFIG_SYS_ISA_IO
   CONFIG_SYS_ISA_IO_BASE_ADDRESS

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:54 -05:00
Tom Rini
14a5d3b50e Remove dead code
This header is unreferenced, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:53 -05:00
Tom Rini
d3d0b5bb62 Convert CONFIG_SYS_INIT_RAM_LOCK to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_INIT_RAM_LOCK

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:53 -05:00
Tom Rini
9244b2fda9 Convert CONFIG_SYS_I2C_INIT_BOARD to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_INIT_BOARD

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10 09:45:53 -05:00
Stefano Babic
cca660c2bd Convert mx8 u-boot.dtsi to CONFIG_TEXT_BASE
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-11-09 17:12:32 +01:00
Oliver Graute
b8072ae848 imx: imx8: apalis: switch to binman
Switch to use binman to pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-11-09 17:12:32 +01:00
Oliver Graute
bdadc140a1 imx: imx8x: colibri: switch to binman
Switch to use binman to pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-11-09 17:12:32 +01:00
Oliver Graute
bc1d145eaf imx: imx8qxp: deneb switch to binman
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-11-09 17:12:32 +01:00
Oliver Graute
dcbc4ae9d6 imx: imx8qxp: giedi switch to binman
Switch to use binman to pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-11-09 17:12:32 +01:00