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powerpc: Migrate SYS_L2_SIZE to Kconfig

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Introduce two options, one for each observed L2 cache size, and have the
size select'd as needed.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Tom Rini 2022-10-28 20:27:00 -04:00
parent 3b677dcd9d
commit 22a2283f2d
3 changed files with 16 additions and 6 deletions
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16
arch/powerpc/cpu/mpc85xx/Kconfig
View file

@ -113,6 +113,7 @@ config TARGET_P1010RDB_PA
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select SUPPORT_TPL
select SYS_L2_SIZE_256KB
imply CMD_EEPROM
imply CMD_SATA
imply PANIC_HANG
@ -123,6 +124,7 @@ config TARGET_P1010RDB_PB
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select SUPPORT_TPL
select SYS_L2_SIZE_256KB
imply CMD_EEPROM
imply CMD_SATA
imply PANIC_HANG
@ -132,6 +134,7 @@ config TARGET_P1020RDB_PC
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P1020
select SYS_L2_SIZE_256KB
imply CMD_EEPROM
imply CMD_SATA
imply PANIC_HANG
@ -141,6 +144,7 @@ config TARGET_P1020RDB_PD
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P1020
select SYS_L2_SIZE_256KB
imply CMD_EEPROM
imply CMD_SATA
imply PANIC_HANG
@ -150,6 +154,7 @@ config TARGET_P2020RDB
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P2020
select SYS_L2_SIZE_512KB
imply CMD_EEPROM
imply CMD_SATA
imply SATA_SIL
@ -1277,6 +1282,17 @@ config SYS_ETVPE_CLK
default 1
endif
config SYS_L2_SIZE_256KB
bool
config SYS_L2_SIZE_512KB
bool
config SYS_L2_SIZE
int
default 262144 if SYS_L2_SIZE_256KB
default 524288 if SYS_L2_SIZE_512KB
config BACKSIDE_L2_CACHE
bool

3
include/configs/P1010RDB.h
View file

@ -311,18 +311,15 @@ extern unsigned long get_sdram_size(void);
#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#else
#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#endif
#endif

3
include/configs/p1_p2_rdb_pc.h
View file

@ -27,7 +27,6 @@
#define __SW_BOOT_NOR_BANK_UP 0x5c /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */
#define __SW_BOOT_NOR_BANK_LO 0x5e /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */
#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */
#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
/*
@ -58,7 +57,6 @@
#define __SW_BOOT_NOR_BANK_UP 0x64 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */
#define __SW_BOOT_NOR_BANK_LO 0x66 /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */
#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */
#define CONFIG_SYS_L2_SIZE (256 << 10)
/*
* Dynamic MTD Partition support with mtdparts
*/
@ -79,7 +77,6 @@
#define __SW_BOOT_NOR_BANK_UP 0xc8 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */
#define __SW_BOOT_NOR_BANK_LO 0xca /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */
#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */
#define CONFIG_SYS_L2_SIZE (512 << 10)
/*
* Dynamic MTD Partition support with mtdparts
*/