port at91_udc driver from linux:
original commit Message:
commit c94e289f195e0e13cf34d27f9338d28221a85751
Author: Arnd Bergmann <arnd@arndb.de>
Date: Sat Apr 11 00:14:21 2015 +0200
usb: gadget: remove incorrect __init/__exit annotations
A recent change introduced a link error for the composite
printer gadget driver:
`printer_unbind' referenced in section `.ref.data' of drivers/built-in.o: defined in discarded section `.exit.text' of drivers/built-in.o
Evidently the unbind function should not be marked __exit here,
because it is called through a callback pointer that is not necessarily
discarded, __composite_unbind() is indeed called from the error path of
composite_bind(), which can never work for a built-in driver.
Looking at the surrounding code, I found the same problem in all other
composite gadget drivers in both the bind and unbind functions, as
well as the udc platform driver 'remove' functions. Those will break
if anyone uses the 'unbind' sysfs attribute to detach a device from a
built-in driver.
This patch removes the incorrect annotations from all the gadget
drivers.
Signed-off-by: Heiko Schocher <hs@denx.de>
When building dm version of designware eth driver on a platform
with 64-bit phys_addr_t, it reports the following warnings:
drivers/net/designware.c: In function 'designware_eth_probe':
drivers/net/designware.c:599:2:
warning: format '%lx' expects argument of type 'long unsigned int',
but argument 3 has type 'phys_addr_t' [-Wformat]
drivers/net/designware.c:600:21:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
drivers/net/designware.c:601:21:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
This commit fixes the build warnings.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present, until a PCI bus is probed, it cannot be found by its sequence
number unless it has an alias. This is the same with any device.
However with PCI this is more annoying than usual, since bus 0 is always the
same device.
Add a function that tries a little harder to locate PCI bus 0. This means
that PCI enumeration will happen automatically on the first access.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit converts pch_gbe ethernet driver to driver model.
Since this driver is only used by Intel Crown Bay board, the
conversion does not keep the non-dm version.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
When an EHCI device is registered in device mode, the HW isn't actually
initialized at all, and hence isn't left in a running state. Consequently,
when the device is deregistered, ehci_shutdown() will fail, since the HW
bits it expects to see set in response to its shutdown requests will not
be sent, and the message "EHCI failed to shut down host controller." will
be printed.
Fix ehci-hcd.c to remember whether the device was registered in host or
device mode, and only call ehci_shutdown() for host mode registrations.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The dfu tftp feature can be now enabled via Kconfig. This
commit provides necessary code for it.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This function allows writing via DFU data stored from fixed buffer address
(like e.g. loadaddr env variable).
Such predefined buffers are used in the update_tftp() code. In fact this
function is a wrapper on the dfu_write() and dfu_flush().
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit adds initial support for using tftp for downloading and
upgrading firmware on the device.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
After extension of the dfu_get_buf() to also setup (implicitly) the dfu_buf_size
variable it is not needed to set dfu_buf_size to CONFIG_SYS_DFU_DATA_BUF_SIZE.
This variable is set in the dfu_get_buf() by not only considering
CONFIG_SYS_DFU_DATA_BUF but more importantly the "dfu_bufsiz" env variable.
Therefore, dfu_get_buf() should be used for initialization.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
Allocate request up to THOR_PACKET_SIZE not the ep0->maxpacket
as the descriptors data depend on the number of descriptors
and this 64 bytes were not enough and the buffer might overflow
which results in memalign failures later.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Dont perform reset at the end of thor download
if configured to do reset off.
Reset may not be required in all cases and hence
provided an option to do so.
The case would be to download the images to DDR instead
of flash device.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zap variable which is set but never used.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
Rework the driver to probe the MMC controller from Device Tree
and make it mandatory. There is no longer support for probing
from the ancient qts-generated header files.
This patch now also removes previous temporary workaround.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
During mmc initialize probe all devices with the MMC Uclass if build
with CONFIG_DM_MMC
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a SPI driver for the Rockchip RK3288, using driver model. It should work
for other Rockchip SoCs also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an I2C driver for the Rockchip RK3288, using driver model. It should work
for other Rockchip SoCs also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an MMC driver which supports RK3288, but may also support other SoCs.
It uses the Designware MMC device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a full regulator driver for the ACT8846. This provides easy access to
voltage and current settings for each regulator.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a driver for the ACT8846 PMIC. This supports several LDOs and BUCKs and
is connected to the I2C bus. This driver supports using a regulator driver
to access the regulators.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for the Rockchip serial device using the ns16550 driver.
This uses driver model and device tree for both SPL and U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
All devices should bind without error. But when they don't, they can cause
driver model init to fail. A real situation where this can happen is when
there is a missing uclass.
Add a debug() call to dm_scan_fdt_node to make this easier to track.
Signed-off-by: Simon Glass <sjg@chromium.org>
When a uclass definition is missing, no drivers in that uclass can operate.
This can happen if a board has a strange collection of options (e.g. the
driver is enabled but the uclass is not).
Unfortunately this is very confusing at present. Starting up driver model
results in a -ENOENT error, which is pretty generic. Quite a big of digging
is needed to get to the root cause.
To help with this, change the error to a very strange one with no other
users in U-Boot. Also add a debug message.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
At present SPL does not have its own option. But these features can
increase SPL code size. Adjust the Kconfig and Makefile so that
separate a SPL option can be selected.
Signed-off-by: Simon Glass <sjg@chromium.org>
My original pinctrl patch operating using a peripheral ID enum. This was
shared between pinmux and clock and provides an easy way to specify a device
that needs to be controlled, even it is does not (yet) have a driver within
driver model.
Masahiro's new simple pinctrl gets around this by providing a
set_state_simple() pinctrl method. By passing a device to that call the
peripheral ID becomes unnecessary. If the driver needs it, it can calculate
it itself and use it internally.
However this does not solve the problem for peripheral clocks. The 'pure'
solution would be to pass a driver to the clock uclass also. But this
requires that all devices should have a driver, and a struct udevide. Also
a key optimisation of the clock uclass is allowing a peripheral clock to
be set even when there is no device for that clock.
There may be a better way to achive the same goal, but for now it seems
expedient to add in peripheral ID to the pinctrl uclass. Two methods are
added - one to get the peripheral ID and one to select it. The existing
set_state_simple() is effectively the union of these.
Signed-off-by: Simon Glass <sjg@chromium.org>
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Remove CONFIG_LWMON5 references.
(Also, remove undefined CONFIG_WD_MAX_RATE while I am here.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
SANDBOX_SERIAL depends on SANDBOX, and SANDBOX selects DM.
So, "SANDBOX_SERIAL depends on DM" is redundant.
Likewise, UNIPHIER_SERIAL depends on ARCH_UNIPHIER, and
ARCH_UNIPHIER selects DM_SERIAL.
So, "UNIPHIER_SERIAL depends on DM_SERIAL" is redundant.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
There is a hole in shadow registers address map of size 0x100
between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL.
Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses,
we should account for this hole in address space.
Similar hole exists between bank 14 and bank 15 of size
0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX.
Note: iMX6SL has only 0-7 banks and there is no hole.
Note: iMX6UL doesn't have this one.
When reading, we use register offset, so need to account for holes
to get the correct address.
When writing, we use bank/word index, there is no need to account
for holes, always use bank/word index from fuse map.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
make the spi bus and the spi chipselect configurable
for the lg4573 driver. Use it on the aristainetos
boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
* Ocotp of i.MX7D has different operation rule.
This patch is to add support for i.MX7D ocotp.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
* Add mxc_gpio support for imx7d SoC
* Use CONFIG_MX7 to extend mxc gpio driver support for imx7d
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* Add pmic pfuze3000 support, implement power_pfuze3000_init to be
used in power_init_board callback function.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
The MIB RAM and FIFO receive start register does not exist on
i.MX6UL. Accessing these register will cause enet not work well.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Stefano Babic <sbabic@denx.de>
When the original HBUS divider value is retrieved in mxs_ocotp_scale_hclk()
for the purpose or restoring it back later, the value is not shifted by the
HBUS divider offset in that register. This is not a problem, since the shift
is zero on all MXS hardware. Add the shift anyway, for completeness and in
case FSL ever decides to re-use this driver on future designs.
Signed-off-by: Chris Smith <chris@zxdesign.info>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Setup mmu-masters property for the PCIe controllers. This would be
used by the Linux SMMU driver, while setting up stream ID table mappings
for the PCIe devices.
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
DEVDISRn registers provides a mechanism for gating clocks of IP blocks
that are not used. Here we implement hwconfig option to allow users
to disable unused peripherals on the board.
For ex. If eSDHC/qDMA/eDMA are unused and with disabled status in dts,
User can enable CONFIG_FSL_DEVICE_DISABLE and set "devdis:esdhc,qdma,edma"
in hwconfig, thus ESDHC controller & eDMA/qDMA will be clock gated to
save more power.
Signed-off-by: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Replace the DMACTRL[LE] hack with recommended settings
for ETSECDMAMCR to get the same end effect - obtaining
big-endian buffer descriptors and frame data for eTSEC.
The reset / default value for ETSECDMAMCR is preserved,
excepting the BD and FR bits which are cleared to enable
the BE mode in accordance with the H/W specifications.
Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA"
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Tested-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Append "debug server FW" in error message to make more informative.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add support of VSC8584 phy placed on new QSGMII/SGMII ethernet riser cards
used on LS2085QDS platforms.
Signed-off-by: King Chung Lo@freescale.com <KingChungLo@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
RTC devices can generate 32KHz output if for
-DS3232 device, EN32KHz bit and BB32KHz bit are set
-DS3231 device, EN32KHz bit is set, BB32KHz bit is don't care
Patch adds rtc_enable_32khz_output() which when called
will enable 32KHz output on 32KHz pin
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Recently the FMan Port and MAC compatibles were changed.
This patch aligns the FMan Port and MAC compatibles
to the new FMan device tree binding document.
The FMan device tree binding document can be found in the Linux kernel:
./Documentation/devicetree/bindings/powerpc/fsl/fman.txt
This patch doesn't affect legacy compatibles support.
Signed-off-by: Igal Liberman <igal.liberman@freescale.com>
Tested-by: Xing Lei <xing.lei@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
