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ls102xa: etsec: Use proper settings for BE BDs

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Replace the DMACTRL[LE] hack with recommended settings
for ETSECDMAMCR to get the same end effect - obtaining
big-endian buffer descriptors and frame data for eTSEC.
The reset / default value for ETSECDMAMCR is preserved,
excepting the BD and FR bits which are cleared to enable
the BE mode in accordance with the H/W specifications.

Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA"
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Tested-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Claudiu Manoil 2015-08-12 13:29:14 +03:00 • committed by York Sun
parent da2919b4a9
commit ebe4c1e646
4 changed files with 5 additions and 9 deletions
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2
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
View file

@ -143,7 +143,7 @@ struct ccsr_gur {
u32 sdhcpcr;
};
#define SCFG_ETSECDMAMCR_LE_BD_FR 0xf8001a0f
#define SCFG_ETSECDMAMCR_LE_BD_FR 0x00000c00
#define SCFG_ETSECCMCR_GE2_CLK125 0x04000000
#define SCFG_ETSECCMCR_GE0_CLK125 0x00000000
#define SCFG_ETSECCMCR_GE1_CLK125 0x08000000

3
board/freescale/ls1021aqds/ls1021aqds.c
View file

@ -280,7 +280,8 @@ int board_early_init_f(void)
unsigned int major;
#ifdef CONFIG_TSEC_ENET
out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
/* clear BD & FR bits for BE BD's and frame data */
clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
#endif
#ifdef CONFIG_FSL_IFC

3
board/freescale/ls1021atwr/ls1021atwr.c
View file

@ -481,7 +481,8 @@ int board_early_init_f(void)
unsigned int major;
#ifdef CONFIG_TSEC_ENET
out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
/* clear BD & FR bits for BE BD's and frame data */
clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125);
#endif

6
drivers/net/tsec.c
View file

@ -271,9 +271,6 @@ void redundant_init(struct eth_device *dev)
out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
out_be32(&regs->rstat, RSTAT_CLEAR_RHALT);
clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
#ifdef CONFIG_LS102XA
setbits_be32(&regs->dmactrl, DMACTRL_LE);
#endif
do {
uint16_t status;
@ -370,9 +367,6 @@ static void startup_tsec(struct eth_device *dev)
out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
out_be32(&regs->rstat, RSTAT_CLEAR_RHALT);
clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
#ifdef CONFIG_LS102XA
setbits_be32(&regs->dmactrl, DMACTRL_LE);
#endif
}
/* This returns the status bits of the device. The return value