Commit graph

4827 commits

Author SHA1 Message Date
Masahiro Yamada
0b198670c6 ARM: uniphier: remove useless wrapper functions
The wrapper functions, uniphier_board_*, are just making function
calls complex.  Remove them.

Also, use empty inline functions in case CONFIG_MICRO_SUPPORT_CARD
is disabled, so that prototype checking works.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
f1378cabc0 ARM: uniphier: remove unused header file
This has been unused since commit f4e190e317 ("ARM: uniphier:
enable SPL_OF_CONTROL").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
cf88affab6 ARM: uniphier: parse device tree to determine DRAM base and size
Device tree specifies the available memory ranges in its "/memory"
node.  Use it to simplify the CONFIG defines.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
9628afa7f5 ARM: uniphier: remove ifdef CONFIG_{SOC} conditionals from sg-regs.h
To achieve the complete run-time configuration by device trees, ifdef
conditionals in header files are not preferable.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
d5ed8c5727 ARM: uniphier: change the external bus address mapping
In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces
 0x00000000 - 0x0fffffff
 0x40000000 - 0x4fffffff
are both mapped to the external bus (also called system bus),
so either was OK.

In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is
assigned for the serial NOR interface.

Going forward, use the latter for the external bus.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-25 00:27:53 +09:00
Masahiro Yamada
9879842c6f ARM: uniphier: drop DCC micro support card support
Historically (for compatibility with very old platforms), two
different types of micro support cards have been used with the
UniPhier SoC development boards.  It has been painful to maintain
both.  Having one of them is enough.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-25 00:27:52 +09:00
Masahiro Yamada
1386233da3 ARM: uniphier: drop ad-hoc input enable settings
These input enable settings are handled by the pinctrl drivers.

Because the external bus pins are input-enabled by default, on-board
devices such as LED still work fine even with this delayed input
enabling.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:52 +09:00
Masahiro Yamada
11f3afeaa5 ARM: uniphier: drop ad-hoc early pin-muxing settings
As the UniPhier serial driver had already switched to Drive Model
and the pinctrl drivers are now enabled, these pin-muxing settings
are properly handled by the pinctrl drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-25 00:27:52 +09:00
Masahiro Yamada
b25c4ab5be ARM: dts: uniphier: prepare device trees to use pinctrl in SPL
Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB
(spl/u-boot-spl.dtb).

The "soc" node (this is simple-bus node) also needs the property
to bind the pinctrl node located under it.

I am collecting this U-Boot specific hack to the bottom of board
DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI.
My goal is to sync DTSI with Linux for easier maintenance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-25 00:27:52 +09:00
Peng Fan
f697c2acca imx: fix coding style
Fix coding style.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-24 11:32:38 +02:00
Peng Fan
4406da0f49 imx-common: wrap boot_mode_apply with CONFIG_CMD_BMODE
boot_mode_apply should be applied only with CONFIG_CMD_BMODE enabled.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-24 11:31:58 +02:00
Peng Fan
d449701b83 imx: mx7: discard unused global variable
Discard unused global variable.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-24 11:31:37 +02:00
Peng Fan
cf226d9942 imx-common: consider mux_ctrl_ofs when setting mux_mode
Some i.MXes use __NA_ or 0 to avoid setting mux_mode, but the following patch
only take i.MX6/7 into consideration.

"c3c8a5748897b24f18618047804317167a531dd3 imx-common: fix iomux settings"

Use is_soc_type(MXC_CPU_MX7) to avoid breaking other i.MXes when
setting mux_mode.

In this patch, switch to use "asm/imx-common/sys_proto.h" to avoid
build break for "is_soc_type" for vf610 and mx25.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2015-09-24 11:27:22 +02:00
Dinh Nguyen
3cbc7b878b arm: socfpga: rename socfpga_cyclone5 and socfpga_arria5 config files
Rename the socfpga_cyclone5.h to socfpga_cyclone5_socdk.h, and
socfpga_arria.h to socfpga_arria5_socdk.h. This matches the other SoCFPGA
board config files.

Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-09-23 03:55:28 +02:00
Peng Fan
f05f4528f2 imx: mx7: drop select CPU_V7 for board target
drop select CPU_V7 for board target, since ARCH_MX7 selects CPU_V7.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-20 09:55:11 +02:00
Peng Fan
c3c8a57488 imx-common: fix iomux settings
When setting iomux for a pin mux, there is no need to check mux_ctrl_ofs.
Also If still checking mux_ctrl_ofs, we have no chance to set iomux
for i.MX7D IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00, because the mux_ctrl_ofs
for this register is 0.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-09-20 09:39:06 +02:00
Thierry Reding
8e1601d994 ARM: tegra114: Clear IDDQ when enabling PLLC
Enabling a PLL while IDDQ is high. The Linux kernel checks for this
condition and warns about it verbosely, so while this seems to work
fine, fix it up according to the programming guidelines provided in
the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup
Sequence"). The Tegra114 TRM doesn't contain this information, but
the programming of PLLC is the same on Tegra114 and Tegra124.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:11:31 -07:00
Thierry Reding
aba11d4476 ARM: tegra124: Clear IDDQ when enabling PLLC
Enabling a PLL while IDDQ is high. The Linux kernel checks for this
condition and warns about it verbosely, so while this seems to work
fine, fix it up according to the programming guidelines provided in
the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup
Sequence").

Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:11:31 -07:00
Mirza Krak
20613c9231 ARM: tegra: Add Tegra20 SPI device nodes
Add the device tree node for the SPI controllers found on Tegra20 SOCs.

Signed-off-by: Mirza Krak <mirza.krak@hostmobility.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:23 -07:00
Thierry Reding
97c02d87f4 ARM: tegra: clk_m is the architected timer source clock
While clk_m and the oscillator run at the same frequencies on Tegra114
and Tegra124, clk_m is the proper source for the architected timer. On
more recent Tegra generations, Tegra210 and later, both the oscillator
and clk_m can run at different frequencies. clk_m will be divided down
from the oscillator.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Thierry Reding
c043c0259c ARM: tegra: Implement clk_m
On currently supported SoCs, clk_m always runs at the same frequency as
the oscillator input. However newer SoC generations such as Tegra210 no
longer have that restriction. Prepare for that by separating clk_m from
the oscillator clock and allow SoC code to override the clk_m rate.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Thierry Reding
70bcb43e7d armv8: Make COUNTER_FREQUENCY optional
Some platforms have the means to determine the counter frequency at
runtime, so give them an opportunity to do so.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Stephen Warren
6c7dc6236a ARM: tegra: fix PLLP frequency calc on T210
AFAIK, for all PLLs on all Tegra SoCs, the primary PLL output frequency
is (input * m) / (n * p). However, PLLP's primary output (pllP_out0) on
T210 is the VCO output, and divp is not applied. pllP_out2 does have divp
applied. All other pllP_outN are divided down from pllP_out0. We only
support pllP_out0 in U-Boot at the time of writing.

Fix clock_get_rate() to handle this special case.

This corrects the returned rate for PLLP to be 408MHz rather than 204MHz.
In turn, this causes high enough dividers to be calculated for the various
peripheral clocks that feed off of PLLP. Without this, some peripherals
failed to operate correctly. For instance, one of my SD cards worked
perfectly but an older (presumably slower) card could not be read.

Note that prior to commit 722e000ccd "Tegra: PLL: use per-SoC pllinfo
table instead of PLL_DIVM/N/P, etc.", the calculated PLL frequency was
816MHz since the wrong values were being extracted from the PLLP divider
register. This caused overly large peripheral dividers to be calculated,
which while wrong, didn't cause any correctness issues; things simply ran
slower than they could.

Reported-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Axel Lin
a6b2daffde tegra: Remove tegra_spl_gpio_direction_output declaration from header file
This function is deleted by commit 2fccd2d96b
"tegra: Convert tegra GPIO driver to use driver model".

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Stephen Warren
2573428140 ARM: tegra: Add p2371-2180 board
P2371-2180 is a P2180 CPU board married to a P2597 I/O board. The
combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB
micro-B port, Ethernet via USB3, USB3 host port, SATA, PCIe, and
two GPIO expansion headers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Stefan Roese
86dc8b14f9 arm: Remove unused reference to nomadik
Commit 0abdd9d0 "arm: Remove nhk8815 boards and nomadik arch" missed one
reference to this arch. Lets remove this as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2015-09-15 15:05:22 -04:00
Stefan Roese
68282f55b8 arm: Remove unused ST-Ericsson u8500 arch
This arch does not seem to be supported / used at all in the current
U-Boot mainline source tree any more. So lets remove the core u8500 code
and code that was only referenced by this platform.

Please note that this patch also removes these config options:

- CONFIG_PL011_SERIAL_RLCR
- CONFIG_PL011_SERIAL_FLUSH_ON_INIT

As they only seem to be referenced by u8500 based boards. Without any
such board in the current code, these config option don't make sense
any more. Lets remove them as well.

If someone still wants to use this platform, then please send patches
to re-enable support by adding at least one board that references this
code.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: John Rigby <john.rigby@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-15 15:05:21 -04:00
Tom Rini
850f788709 Merge branch 'rmobile' of git://git.denx.de/u-boot-sh 2015-09-13 17:25:16 -04:00
Fabio Estevam
3a384b494c imx-common: cpu: Do not print on invalid temperature
It is not very useful to have the message below on every boot
(especially when we are using early silicon):

U-Boot 2015.10-rc2-23945-g37cf215 (Sep 08 2015 - 14:12:14 -0300)

CPU:   Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C)CPU:   Thermal invalid data, fuse: 0x0
 - invalid sensor device

, so turn the error message into debug level.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-09-13 10:50:55 +02:00
Peng Fan
ada5771f09 imx: mx6 discard 'select CPU_V7' for different targets
Discard the 'select CPU_V7' from Kconfig in arch/arm/cpu/armv7/mx6
for different targets, because ARCH_MX6 selects CPU_V7.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-13 10:38:48 +02:00
Peng Fan
d9cbb264e8 imx: mx6ul: support mx6ul 9x9 evk board
This patch is to support mx6ul_9x9_evk board based on mx6ul_14x14_evk,
the difference between mx6ul 9x9 evk and mx6ul 14x14 evk are:
1. mx6ul 9x9 evk use pfuze3000, while mx6ul 14x14 evk use DCDC.
2. mx6ul 9x9 evk supports 256MB LPDDR2, while mx6ul 14x14 evk
   supports 512MB DDR3
3. mx6ul_9x9_evk use 9x9 package, while mx6ul_14x14_evk use 14x14 package.

This patch add the following:
1. Discard PHYS_SDRAM_SIZE from header file, use imx_ddr_size()
2. Introduce a macro is_mx6ul_9x9_evk using
   CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) to avoid "#ifdef xxx" in non-SPL
   part. To SPL part, CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) can not work,
   so still use "#ifdef CONFIG_TARGET_MX6UL_9X9_EVK" to differentiate with
   mx6ul_14x14_evk. And we have no way to dymaically checking this chip
   is 9x9 or 14x14.
3. mx6ul_9x9_evk use pfuze3000, so enabled POWER related configurations.
   POWER related configurations also effect for mx6ul_14x14_evk. But
   power_init_board implementation using 'if (is_mx6ul_9x9_evk())' to
   do initialization for mx6ul_9x9_evk, and do nothing for mx6ul_14x14_evk.
4. mx6ul_9x9_evk use lpddr2 with size 256MB, so add related SPL DRAM
   configurations.
5. Enable CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and setting dtb file
   according to board_rev and board_name.
6. Add TARGET_MX6UL_9X9_EVK Kconfig entry

Boot Log:
U-Boot SPL 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53)
reading u-boot.img
reading u-boot.img

U-Boot 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53 +0800)

CPU:   Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 41C
Reset cause: POR
Board: MX6UL 9x9 EVK
I2C:   ready
DRAM:  256 MiB
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial
Out:   serial
Err:   serial
Net:   FEC1
Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-13 10:32:44 +02:00
Peng Fan
0eca9f6f0d Revert "imx: mx6: ddr correct tRFC and tXS"
This reverts commit 059323fb6a8f21637bb617919715c2427f24777c.

This commit 059323fb6a8f21637bb617919715c2427f24777c use JESD79-3E which
is not the newest spec. Should use JESD79-3F in which tRFC is 260ns for
4Gb chip.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
2015-09-13 10:26:45 +02:00
Adrian Alonso
1a8150d4b1 imx: mx7dsabresd: Add support for MX7D SABRESD board
* Add i.MX7D SABRESD target board support with enabled modules:
  UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX.

  Build target: mx7dsabresd_config

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
cd562c8d07 imx: imx7d: add imx-common cpu support for imx7d
Add imx-common cpu support for imx7d SoC
- Update reset_cause for imx7d
- Enable watchdog driver built for imx7d

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
648539c906 arm: imx-common: init: rework wdog settings for imx6/imx7
Rework imx_set_wdog_powerdown to be reused by imx6 and imx7

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
75a565f297 arm: imx-common: init: extend init_aips to support imx7
Extend init_aips to support imx7 SoC, use is_soc_type
and is_cpu_type to resolve at run time aips3 settings

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
c5752f73a5 imx: imx7d: Add SoC system support
Add imx7d basic SoC system support
Misc arch dependent functions for system bring up

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
7bebc4b04e imx: imx7d: clock control module support
* Add Clock control module (CCM) support
* iMX7D SoC introduces 3 main clock sysmtem abstraction for clock
  root frequency generation denominated clock slices.
  Core clock slice: hihg speed clock for ARM core
  Bus clock slice: for bus clocks
  IP clock slice: Peripheral clocks
* At system boot ROM enables PLL_ARM, PLL_DDR, PLL_SYS, PLL_ENET
  In u-boot, we have to:
  - Configure PFD3- PFD7 for freq we needed in u-boot
  - Set clock root for peripherals (ip channel)

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
b1d902a9f7 imx: imx7d: initial arch level support
* Add system arch level header files
  - imx-regs.h: iMX7D SoC system architecture registers
  - crm_regs.h: Clock control module registers
  - sys_proto.h: helper callback function for SoC setup

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
6953574188 imx: system counter driver for imx7d and mx6ul
Add system counter driver for imx7d and mx6ul
imx7 and imx6ul supports system counter timer as well as
GPT timer (arch/arm/imx-common/timer.c); The default for
imx7 is systemcounter timer.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
50a082a88c arm: imx: imx-common: init: move arch init common setup
Move common imx6 arch init setup, init.c can be extended
and reused to support imx7 SoC keeping init arch common
code.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
ab09e72866 arm: imx: common rework cache settings for imx6
Rework cache settings for imx6, move cache configuration
to imx-common/cache.c so it can be reused for newer SoC

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
1368f99346 thermal: imx_thermal: rework driver to be reused
Rework imx_thermal driver to be used across i.MX
processor that support thermal sensor

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
15c52b3ddd imx: arch-mx6: add is_soc_type helper macro
Add helper macro is_soc_type to identify iMX SoC family

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:52 +02:00
Peng Fan
208bd51396 arm: armv8 correct value passed to __asm_dcache_all
>From source code comments:
"x0: 0 flush & invalidate, 1 invalidate only"

Current value 0xffff can make invalidate work, since we only judge whether
input value is 0 or not, see following code:
"
    tbz     w1, #0, 1f
    dc      isw, x9
    b       2f
1:  dc      cisw, x9      /* clean & invalidate by set/way */
2:  subs    x6, x6, #1    /* decrement the way */
"

Later we may add "2 clean only" support. So following the comments,
correct value from 0xffff to 1.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2015-09-12 09:03:39 +02:00
Simon Glass
ed64190f67 arm: Correct comments in crt0.S for the recent SPL improvements
The current comments need a bit of tweaking since we now support stack
and global_data relocation in SPL. Also add a reference to the README.

For AArch64 this is not implemented, so leave a TODO for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tim Harvey <tharvey@gateworks.com>
2015-09-12 09:00:35 +02:00
Sylvain Lemieux
89983478bd gpio: lpc32xx: fix issues with port3 gpio
The current simplify lpc32xx gpio driver implementation assume a
maximum of 32 GPIO per port; there are a total of 22 GPI, 24 GPO
and 6 GPIO to managed on port 3.

Update the driver to fix the following:
1) When requesting GPI_xx and GPO_xx on port 3 (xx is the same number)
   the second call to "gpio_request" will return -EBUSY.

2) The status of GPO_xx pin report the status of the
   corresponding GPI_xx pin when using the "gpio status" command.

3) The gpio driver may setup the direction register for the wrong
   gpio when calling "gpio_direction_input" (GPI_xx) or
   "gpio_direction_output" (GPO_xx) on port 3; the call to the
   direction is require to use the "gpio status" command.

The following change were done in the driver:
1) port3 GPI are cache in a separate 32 bits in the array.
2) port3 direction register written only for GPIO pins.
3) port3 GPO & GPIO (as output) are read using "p3_outp_state".
4) LPC32XX_GPI_P3_GRP updated to match the change.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-09-11 17:15:34 -04:00
Heiko Schocher
92a3188d7d bitops: introduce BIT() definition
introduce BIT() definition, used in at91_udc gadget
driver.

Signed-off-by: Heiko Schocher <hs@denx.de>
[remove all other occurrences of BIT(x) definition]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
2015-09-11 17:15:32 -04:00
Enric Balletbò i Serra
9d1b298799 board: Add Toby-Churchill SL50 board support.
Add support for Lightwriter SL50 series board, a small, robust and portable
Voice Output Communication Aids (VOCA) designed to meet the particular and
changing needs of people with speech loss resulting from a wide range of
acquired, progressive and congenital conditions.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
2015-09-11 17:15:27 -04:00
Stefan Roese
da53ba0219 arm: spear: Add command to switch between 1-bit HW ECC and SW BCH4
This patch adds the "nandecc" command to switch between the SPEAr600 internal
1-bit HW ECC and the 4-bit SW BCH4 ECC. This can be needed to support NAND
chips with a stronger ECC than 1-bit, as on the x600. And to dynamically
switch between both ECC schemes for backwards compatibility.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-09-11 17:15:14 -04:00
Simon Glass
b9599dd857 arm: Remove tx25 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:15:12 -04:00
Simon Glass
ad4f54ea86 arm: Remove palmtreo680 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:14:44 -04:00
Simon Glass
1c87dd76c4 arm: Remove xaeniax board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:14:43 -04:00
Simon Glass
452ef83046 arm: Remove vpac270_nor_128 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:14:23 -04:00
Simon Glass
6e830dfc1a arm: Remove vl_ma2sc board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:12:57 -04:00
Simon Glass
bee2b99d06 arm: Remove vision2 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-09-11 16:05:03 -04:00
Simon Glass
b928e658f4 arm: Remove versatileab board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 15:01:25 -04:00
Simon Glass
0c81f37d9a arm: Remove tt01 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 15:00:52 -04:00
Simon Glass
f73db66d62 arm: Remove tk71 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 15:00:22 -04:00
Simon Glass
7650beb7ca arm: Remove scb9328 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 15:00:03 -04:00
Simon Glass
47b87d2eed arm: Remove rd6281a board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:59:16 -04:00
Simon Glass
daf770864d arm: Remove qong board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:59:16 -04:00
Simon Glass
49d8899ba9 arm: Remove pxa255_idp, zipitz2 boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:58:48 -04:00
Simon Glass
79d19734a9 arm: Remove portuxg20, stamp9g20 boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:58:48 -04:00
Simon Glass
f6eac00aba arm: Remove polaris and trizepsiv boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-09-11 14:58:47 -04:00
Simon Glass
8896325d73 arm: Remove palmtc board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:57:41 -04:00
Simon Glass
35782e9cca arm: Remove palmld board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:57:41 -04:00
Simon Glass
819216ddfa arm: Remove otc570 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:57:40 -04:00
Simon Glass
7a2c1b13d7 arm: Remove openrd boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:56:53 -04:00
Simon Glass
93b25c0813 arm: Remove omap3_sdp3430 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:56:52 -04:00
Simon Glass
8dc372f93b arm: Remove omap3_mvblx board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:56:51 -04:00
Simon Glass
0abdd9d01a arm: Remove nhk8815 boards and nomadik arch
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:56:04 -04:00
Simon Glass
b6073fd211 arm: Remove mx51_efikamx, mx51_efikasb boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:56:03 -04:00
Simon Glass
7cd768cf2c arm: Remove mv88f6281gtw_ge board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:55:18 -04:00
Simon Glass
9f840b8d56 arm: Remove lp8x4x board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:53:50 -04:00
Simon Glass
df0b116de1 arm: Remove jornada board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:53:10 -04:00
Simon Glass
36d14178fc arm: Remove mx31_litekit board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:52:46 -04:00
Simon Glass
bc0840bcb7 arm: Remove imx27lite, imx27_litekit and magnesium boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:52:11 -04:00
Simon Glass
3eb8f58d75 arm: Remove ima3-mx53 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:11:53 -04:00
Simon Glass
a6f7f78744 arm: Remove enbw_cmc board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:11:15 -04:00
Simon Glass
5522f12b3c arm: Remove eb_cpu9k2 and eb_cpu9k2_ram boards
These board have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:11:13 -04:00
Simon Glass
5ff33d0404 arm: Remove dig297 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:11:12 -04:00
Simon Glass
6761946fb7 arm: Remove unmaintained davinci boards
These boards have not been converted to generic board by the deadline.
Remove dm355evm, dm355leopard, dm365evm, dm6467evm, dvevm, ea20, schmoogie,
sffsdr, sonata.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:11:11 -04:00
Simon Glass
7495e41ba6 arm: Remove snowball and u8500_href boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:08:06 -04:00
Simon Glass
af7f884ba1 arm: Remove eukrea boards
These boards have not been converted to generic board by the deadline.
Remove all cpu9260 and cpuat91 boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:06:45 -04:00
Simon Glass
679d4456e9 arm: Remove balloon3 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:06:44 -04:00
Lokesh Vutla
d6927a5d10 ARM: DRA7: emif: Fix disabling/enabling of refreshes
clrsetbits_le32/clrbits_le32 takes mask of the bits as input that
are needed to be set/clear. But emif driver passes the shift of the bits.
Fixing it here.

Reported-by: Mark Mckeown <m-mckeown@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-09-11 14:05:36 -04:00
Vladimir Zapolskiy
bab8d1e228 lpc32xx: remove duplicated DMA_CLK_ENABLE bit definition
Because there is an originally defined CLK_DMA_ENABLE macro in clk.h,
no reason to add another DMA_CLK_ENABLE macro with the same value.

Remove DMA_CLK_ENABLE, since it does not follow naming convention from
the code, this implies renaming of DMA_CLK_ENABLE to CLK_DMA_ENABLE in
lpc32xx/devices.c file.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-09-11 14:05:35 -04:00
Jelle van der Waa
2ad76bf2c7 sun5i: Add A10s-Wobo-i5 defconfig and dts
The Wobo i5 top set box is a somewhat curious A10s based top set box,
it uses an AXP209 rather then the AXP152 usually used in combination
with the A10s. It has an ethernet phy connected to PORTD rather then
PORTA, and its built-in usb wifi is connected via the otg controller.

The dts file changes are identical to the changes submitted to the
upstream kernel.

Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-09-10 20:13:01 +02:00
Hans de Goede
56f5eb401d sun5i: Add q8_a13_tablet defconfig and dts
This commits adds a generic support for q8 formfactor a13 based tablets.

These tablets ship in many variants, with the difference mainly being the
touchscreen controller / accelerometer / wifi chip used.

The wifi is USB based, and thus not listed in devicetree.

ATM the kernel does not support the touchscreen / accelerometer on these
devices. In the future we may need multiple configs with different
CONFIG_DEFAULT_DEVICE_TREE settings, this depends on how we solve the
hw differences on the kernel side.

For now this will suffice.

The dts files are identical to the dts files submitted to the upstream
kernel for these tablets.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-09-10 20:11:58 +02:00
Hans de Goede
05e4d62a63 sun4i: Add dts and defconfig for iNet-1 based tablets
The iNet-tek iNet-1 PCB is a PCB found in various generic 10.1" 1024x600
A10 based tablets such as the Point of View Protab2 XXL and the
Cherry M1007.

This patch has been tested on both rev2 and rev5 of this board / these
tablets.

These tablets feature the usual connectors: headphone, mini hdmi,
power-barrel, mini-usb and a micro-sd slot.

The dts is identical to the dts submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-09-10 17:11:45 +02:00
Hans de Goede
deed69d62d sun4i: Add defconfig and dts for inet9f-rev03 based tablets
The inet9f-rev03 pcb is specially designed for gaming tablets, such as
the qware tb-g100 tablet.

These 7" tablets feature a dpad, firebuttons and 2 joysticks on the sides
of the screen.

Besides this they have the usual connectors: power-barrel, mini usb,
mini hdmi, headphone and micro-sd slot.

The dts is identical to the dts submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-09-10 17:11:45 +02:00
Hans de Goede
dd9d013c03 sun4i: Add defconfig and dts for the pov protab2-ips9 tablet
The Point of View protab2-ips9 is a tablet with a 9" ips 1024x768 lcd
screen, microsd slot, headphones, mini hdmi, mini usb b and power barrel
connectors.

The dts file is identical to the one submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-09-10 16:55:22 +02:00
Dinh Nguyen
55c7a765f6 arm: socfpga: Add support for the Terasic DE-0 Atlas board
Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV
based board. The board can boot from SD/MMC. Ethernet is also supported.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-09-04 11:54:21 +02:00
Marek Vasut
d88995a82b arm: socfpga: Add support for DENX MCV SoM and MCVEVK board
Add support for DENX MCV SoM, which is CycloneV based and the
associated DENX MCVEVK baseboard. The board can boot from eMMC.
Ethernet and USB is supported.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-09-04 11:54:21 +02:00
Marek Vasut
952caa289e arm: socfpga: Add support for Terasic SoCkit board
Add support for Terasic SoCkit, which is CycloneV based board.
The board can boot either from SD/MMC or QSPI. Ethernet is also
supported.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-09-04 11:54:21 +02:00
Marek Vasut
a665b051b5 arm: socfpga: Do not call board_init_r() from board_init_f()
Instead of calling board_init_r() directly from board_init_f(), just
return from board_init_f(). This will make the code continue executing
in crt0.S _main(), from which the board_init_r() is called. This patch
aligns the SoCFPGA SPL with the correct SPL design as well as reduces
the stack utilisation slightly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-09-04 11:54:20 +02:00
Marek Vasut
dfd3dff50a arm: socfpga: Always enable OF_CONTROL and SPL_OF_CONTROL
The SoCFPGA probes mostly from OF and the OF is mandatory both in
U-Boot itself and U-Boot SPL. Enable it by default.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-09-04 11:54:20 +02:00
Marek Vasut
65d372c44c arm: socfpga: Assure ISWGRP 0 and 1 are inited
This fix makes sure that the ISWGRP0 and ISWGRP1 registers are
correctly inited. In case those registers are not initialized,
it is not possible to access the registers synthesised in the
FPGA through the bridges. Any such access produces data abort.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-09-04 11:54:20 +02:00
Marek Vasut
129adf5bf4 mmc: dw_mmc: Probe the MMC from OF
Rework the driver to probe the MMC controller from Device Tree
and make it mandatory. There is no longer support for probing
from the ancient qts-generated header files.

This patch now also removes previous temporary workaround.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
2015-09-04 11:54:20 +02:00