Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-02-18 06:58:54 +00:00
Code Issues Projects Releases Packages Wiki Activity

ARM: tegra: clk_m is the architected timer source clock

Browse source 
While clk_m and the oscillator run at the same frequencies on Tegra114
and Tegra124, clk_m is the proper source for the architected timer. On
more recent Tegra generations, Tegra210 and later, both the oscillator
and clk_m can run at different frequencies. clk_m will be divided down
from the oscillator.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Thierry Reding 2015-08-20 11:42:20 +02:00 • committed by Tom Warren
parent c043c0259c
commit 97c02d87f4
3 changed files with 8 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
arch/arm/mach-tegra/tegra114/clock.c
View file

@ -679,8 +679,8 @@ void arch_timer_init(void)
struct sysctr_ctlr *sysctr = (struct sysctr_ctlr *)NV_PA_TSC_BASE;
u32 freq, val;
freq = clock_get_rate(CLOCK_ID_OSC);
debug("%s: osc freq is %dHz [0x%08X]\n", __func__, freq, freq);
freq = clock_get_rate(CLOCK_ID_CLK_M);
debug("%s: clk_m freq is %dHz [0x%08X]\n", __func__, freq, freq);
/* ARM CNTFRQ */
asm("mcr p15, 0, %0, c14, c0, 0\n" : : "r" (freq));

4
arch/arm/mach-tegra/tegra124/clock.c
View file

@ -859,8 +859,8 @@ void arch_timer_init(void)
struct sysctr_ctlr *sysctr = (struct sysctr_ctlr *)NV_PA_TSC_BASE;
u32 freq, val;
freq = clock_get_rate(CLOCK_ID_OSC);
debug("%s: osc freq is %dHz [0x%08X]\n", __func__, freq, freq);
freq = clock_get_rate(CLOCK_ID_CLK_M);
debug("%s: clk_m freq is %dHz [0x%08X]\n", __func__, freq, freq);
/* ARM CNTFRQ */
asm("mcr p15, 0, %0, c14, c0, 0\n" : : "r" (freq));

10
arch/arm/mach-tegra/tegra210/clock.c
View file

@ -1014,13 +1014,11 @@ void arch_timer_init(void)
struct sysctr_ctlr *sysctr = (struct sysctr_ctlr *)NV_PA_TSC_BASE;
u32 freq, val;
freq = clock_get_rate(CLOCK_ID_OSC);
debug("%s: osc freq is %dHz [0x%08X]\n", __func__, freq, freq);
freq = clock_get_rate(CLOCK_ID_CLK_M);
debug("%s: clk_m freq is %dHz [0x%08X]\n", __func__, freq, freq);
/* ARM CNTFRQ */
#ifndef CONFIG_ARM64
asm("mcr p15, 0, %0, c14, c0, 0\n" : : "r" (freq));
#endif
if (current_el() == 3)
asm("msr cntfrq_el0, %0\n" : : "r" (freq));
/* Only Tegra114+ has the System Counter regs */
debug("%s: setting CNTFID0 to 0x%08X\n", __func__, freq);