Commit graph

11094 commits

Author SHA1 Message Date
Meng Dongyang
e85f00abda usb: Kconfig: config USB_XHCI_ROCKCHIP depends on DM_REGULATOR and DM_USB
The xhci-rockchip driver depends on DM_REGULATOR and DM_USB.
So add dependent features for xhci-rockchip driver in Kconfig.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:48 +02:00
eric.gao@rock-chips.com
0c6d52bc4b rockchip: video: mipi: Modify format type for debug message
Modify format type for debug message.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
2017-07-11 12:13:48 +02:00
eric.gao@rock-chips.com
0c9eceb7af rockchip: video: mipi: Modify variable type for arm32 compatibility
Some address relevant varibable is defined originally as u64. To
compatible with arm32, this patch change them to uintptr_t type.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:47 +02:00
Kever Yang
419b08012a Revert "mmc: dw_mmc: rockchip: select proper card clock"
The origin patch get rockchip dwmmc by name 'ciu', which lead
to the SPL not able to remove 'clock-names' node in dts.
I'm not saying this is not correct, but I would prefer to handle
this in dts or clock driver to save memory for SPL.
For example the rk3288 SPL size has out of memory if not enable
BACK_TO_BROM option, there are many other SoCs has less internal
memory than rk3288.

This reverts commit 480a9b834c.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:47 +02:00
Kever Yang
8093529809 rockchip: dwmmc: use max-frequency when OF_PLATDATA enabled
Since the 'clock-freq-min-max' is deprecated, we use max-frequency for
all rockchip SoC dwmmc controller.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:47 +02:00
Kever Yang
a21e132894 rockchip: rk322x: add sysreset driver
Rockchip rk322x sysreset is much like rk3036 and other Rockchip SoCs,
only difference is that the target register address is different.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:46 +02:00
Kever Yang
5cc9d31a79 rockchip: rk322x: add pinctrl driver
Add init pinctrl driver support for:
- i2c;
- spi;
- uart;
- pwm;
- emmc/sdmmc;

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:46 +02:00
Kever Yang
045029cbd1 rockchip: rk322x: add clock driver
Add clock driver init support for:
- cpu, bus clock init;
- emmc, sdmmc clock;
- ddr clock;

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fixed format specified (%x -> %p) in clk_rk322x.c:
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-07-11 12:13:45 +02:00
Philipp Tomsich
3d40479f00 rockchip: ns16550: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This covers the serial driver (ns16550 and compatible) used for the
Rockchip devices.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:44 +02:00
Philipp Tomsich
7ad326a905 rockchip: net: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This covers the Gigabit Ethernet MAC (i.e. common designware driver and
rockchip-specific wrapper).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:43 +02:00
Philipp Tomsich
fd1bf8df25 rockchip: mmc: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This covers the dw_mmc and sdhci wrapper drivers for Rockchip.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:43 +02:00
Philipp Tomsich
f2708c97c2 rockchip: xhci: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This change covers the USB3 (xhci) driver for the Rockchip devices.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:43 +02:00
Philipp Tomsich
6c65577ce6 rockchip: spi: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This change covers the rk_spi.c (SPI driver) used in Rockchip devices.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:43 +02:00
Philipp Tomsich
9f4f914d7f rockchip: pinctrl: dm: convert fdt_get to dev_read
With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This change covers the pinctrl drivers for the Rockchip devices.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:43 +02:00
Jean-Jacques Hiblot
6b26aaef08 pipe3: Fix broken dependency
ARCH_OMAP2 has been renamed ARCH_OMAP2PLUS in commit a93fbf4a78
("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-07-10 14:26:05 -04:00
Patrice Chotard
c5c1756c68 mtd: stm32: use parameter instead of default value
To set wait state, a hard coded value is used instead of using
latency parameter. stm32_flash_latency_cfg() is currently used
in arch/arm/mach-stm32/stm32f4/clock.c and in
drivers/clk/clk_stm32f7.c with, in both case, "5" as parameter.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-07-10 14:26:05 -04:00
Jorge Ramirez-Ortiz
fc50a6cbc0 driver: mmc: update debug info
This driver is used in another board; remove board information from
the driver debug log.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-10 14:26:03 -04:00
Christophe Kerello
bb44b96803 pinctrl: stm32: add set_state ops
set_state_ops is kept under PINCTRL_FULL flag in order
to decrease memory footprint in some configuration.
PINCTRL_FULL can be enabled for debug purpose.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-07-10 14:26:02 -04:00
Christophe Kerello
ad0376e093 pinctrl: stm32: handle a configuration list
This patch handles a configuration list behind pinctrl-0
like pinctrl-0 = <&qspi_clk_a &qspi_bk1_a &qspi_bk2_a>;

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
2017-07-10 14:26:02 -04:00
Christophe Leroy
53193a4f07 powerpc, 8xx: Add support for MCR3000 board from CSSI
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885 processors.

This patch adds support for the first board.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08 15:56:06 -04:00
Christophe Leroy
dd7ff4721a powerpc, 8xx: move Serial driver to drivers/serial/
At the same time, move to Kconfig

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08 15:56:04 -04:00
Christophe Leroy
f88c431b8a powerpc, 8xx: move SPI driver to drivers/spi/
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08 15:56:03 -04:00
Christophe Leroy
fad51ac3af powerpc, 8xx: move FEC Ethernet driver in drivers/net
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08 15:56:02 -04:00
Christophe Leroy
b1e41d1cee powerpc, 8xx: Migrate to Kconfig
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-08 15:56:01 -04:00
Andy Shevchenko
ea926511dc wdt: Unify option of timeout value
There is no need to duplicate same option with different name.

Kill HW_WATCHDOG_TIMEOUT_MS in favor of WATCHDOG_TIMEOUT_MSECS.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-07 07:38:23 -04:00
Andy Shevchenko
b71e0c1a30 wdt: Fix spelling Resettting -> Resetting
Fix spelling Resettting -> Resetting.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-07-07 07:38:07 -04:00
Andy Shevchenko
daab59ac05 avr32: Retire AVR32 for good
AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).

Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).

There is no good point to keep this support in U-Boot either.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-06 16:17:19 -04:00
Masahiro Yamada
fb07f97d6e gpio: add static to get_function()
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-06 13:09:36 -04:00
Masahiro Yamada
49ddcf3e0e serial: make serial_stub_* to static functions
Add missing static to serial_stub_puts().

Unexport serial_stub_{getc,tstc} because they are used locally.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-06 13:09:35 -04:00
Heiko Schocher
98f705c9ce powerpc: remove 4xx support
There was for long time no activity in the 4xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 4xx,
so remove it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-07-03 17:35:28 -04:00
Heiko Schocher
d4db3b86a5 drivers, block: remove sil680 driver
driver is not used anymore, so remove it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-07-03 17:34:49 -04:00
Heiko Schocher
2fa5130d46 drivers, usb, gadget: fix compiler warnings for at91_udc.c
fix warnings:
drivers/usb/gadget/at91_udc.c:1344:12: warning: 'at91rm9200_udc_init' defined but not used [-Wunused-function]
drivers/usb/gadget/at91_udc.c:1379:13: warning: 'at91rm9200_udc_pullup' defined but not used [-Wunused-function]
drivers/usb/gadget/at91_udc.c:1476:12: warning: 'at91sam9263_udc_init' defined but not used [-Wunused-function]

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-29 10:01:11 -04:00
Lukasz Majewski
2a0583e3e8 usb: gadget: Call g_dnl_bind_fixup() before testing g_dnl_serial length
After the commit SHA1: 842778a091 - the serial number descriptor is only
visible when we have non zero length of g_dnl_serial.

However, on some platforms (e.g. Siemens) the serial number is set at
g_dnl_bind_fixup(), so with the current code we will always omit the
serial (since it is not set).

This commit moves the g_dnl_bind_fixup() call before the g_dnl_serial
length test.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2017-06-29 09:51:05 -04:00
Tom Rini
de8203653f ti816x: Enable ethernet support
The ti816x SoC revision of the ethernet IP block is handled by the
"davinci_emac" driver, rather than the "cpsw" driver as done by later
members of the family.  Enable the relevant plumbing.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-28 11:43:39 -04:00
Tom Rini
08546df976 Merge git://git.denx.de/u-boot-x86 2017-06-27 09:33:10 -04:00
Tom Rini
821560fd8e Merge git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/imx6qdl_icore_rqs.h
	include/configs/imx6ul_geam.h
	include/configs/imx6ul_isiot.h
2017-06-27 09:32:37 -04:00
Bin Meng
da2364cc14 Revert "x86: Convert MMC to driver model"
This reverts commit ddb3ac3c71.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-27 16:31:30 +08:00
Tom Rini
b8a238f137 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2017-06-26 15:48:05 -04:00
Masahiro Yamada
5e75ea1506 i2c_eeprom: add static to i2c_eeprom_std_ops/probe
These are only used in drivers/mis/i2c_eeprom.c

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-06-26 07:12:47 +02:00
Tom Rini
524b42bc2c Merge git://git.denx.de/u-boot-uniphier
- fix sparse warnings
- sync DT with Linux
- add new board support (LD11/LD20 global)
2017-06-24 18:18:41 -04:00
Masahiro Yamada
1d21e1b97c ARM: uniphier: fix various sparse warnings
Fix warnings reported by sparse:
 - ... was not declared. Should it be static?"
 - cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25 06:06:09 +09:00
Tom Rini
7df4ff2c26 Merge branch 'master' of git://git.denx.de/u-boot-rockchip 2017-06-23 11:02:21 -04:00
Kever Yang
6a464d9cab rockchip: clk: rk3036: correct setting for pll integer mode
According to rk3036 TRM, pll_con1[12] should be set to '1' for the pll
integer mode, while the '0' means the frac mode.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-23 16:40:23 +02:00
Heiko Schocher
0424990c1f serial, kconfig: fix menutext
fix menutext for the options SPL_DM_SERIAL and TPL_DM_SERIAL.
Both have the same text as DM_SERIAL, which is
confusing.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-06-23 10:38:09 -04:00
Ladislav Michl
4e118ce6d8 mtd: OneNAND: Fix onenand_block_markbad
commit dfe64e2c89
    Author: Sergey Lapin <slapin@ossfans.org>
    Date:   Mon Jan 14 03:46:50 2013 +0000

        mtd: resync with Linux-3.7.1

modified onenand_block_markbad to call mtd_block_markbad,
but as _block_markbad function pointer used by mtd_block_markbad
to do actual job is by default pointing back to
onenand_block_markbad there is no way this function ever
finishes its job.
Fix it by changing function body according current (4.12-rc6)
linux implementation.
Tested on IGEPv2 board with Muxed OneNAND(DDP) 512MB containing
several unerasable blocks this function marked bad.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2017-06-23 10:38:07 -04:00
Ladislav Michl
b51ced8e2a onenand_spl_simple: Add DDP OneNAND support
Current implementation is unable to access second half of
DDP OneNAND flash (reads first half mirrored). Use block
and bufferram address calculations from onenand_base to
fix this.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2017-06-23 10:38:07 -04:00
Ladislav Michl
0da008ef8d onenand_spl_simple: Call onenand_spl_get_geometry() only once
Do not call onenand_spl_get_geometry() for each block read.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2017-06-23 10:38:06 -04:00
Tom Rini
872faf5d13 clk_rv1108.c: Fix unused variable warning
The variables gpll_init_cfg and apll_init_cfg are unused in this file,
remove them.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-23 10:38:05 -04:00
Ken Ma
ae118b6855 pinctrl: a3700: Fix the issue that gpio controller is registered with wrong node id
In armada_37xx_gpiochip_register, the return value of fdtdec_get_bool
should be true when gpio-controller is found; current codes makes a
wrong inverse return value judgement, this patch fixes it.

Signed-off-by: Ken Ma <make@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-06-23 07:09:40 +02:00
Ken Ma
b5a6c94a03 pinctrl: a3700: Fix uart2 group selection register mask
If north bridge selection register bit1 is clear, pins [10:8] are for
SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
and CTSn, so bit1 should be added to uart2 group and it must be set
for both "gpio" and "uart" functions of uart2 group.

Signed-off-by: Ken Ma <make@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-06-23 07:09:40 +02:00
Tom Rini
9c067c873f Merge branch 'master' of git://git.denx.de/u-boot-tegra 2017-06-21 08:00:04 -04:00
Tom Rini
784667d7f9 Xilinx changes for v2017.07
ZynqMP:
 - config cleanup
 - SD LS mode support
 - psu_init* cleanup
 - unmap OCM
 - Support for SMC
 
 Zynq:
 - add ddrc to Kconfig
 - add topic-miamilite board support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAllJNGcACgkQykllyylKDCEBrACdE1X8RroAQZQ3cN3yEXp/OQ3V
 D+gAn1PAUvy3zT8UDiJcF1rCxptvlKlv
 =4ans
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.07

ZynqMP:
- config cleanup
- SD LS mode support
- psu_init* cleanup
- unmap OCM
- Support for SMC

Zynq:
- add ddrc to Kconfig
- add topic-miamilite board support
2017-06-21 07:57:37 -04:00
Simon Glass
542b5f8567 tegra: mmc: Set the bus width correctly
The driver currently does not reset bit 5 of the hostctl register even if
the MMC stack requests it. Then means that once a bus width of 8 is
selected it is not possible to change it back to 1. This breaks
'mmc rescan' which needs to start off with a bus width of 1.

The problem was surfaced by enabling CONFIG_DM_MMC_OPS on tegra. Without
this option the MMC stack fully reinits the driver on a 'mmc rescan'.
But with this option driver model does not re-probe a driver once it has
been probed once.

Fix the driver to honour the request.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Chubb <peter.chubb@data61.csiro.au>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2017-06-20 09:47:59 -07:00
Mike Looijmans
988390b8e1 arm: zynq: Move CONFIG_SF_DUAL_FLASH to defconfig
Move the only use of CONFIG_SF_DUAL_FLASH to defconfig. This makes the
associated topic_miamiplus.h header obsolete, so remove that as well.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:42:13 +02:00
Siva Durga Prasad Paladugu
7033ae272e fpga: zynqmppl: Reuse invoke_smc routine
Reuse invoke_smc() routine which is already defined
instead of duplicating same at multiple places.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:42:13 +02:00
Peter Robinson
9e6e2bc229 block: sata: ceva: drop extraneous netdev.h include
Drop include of netdev.h as it's a SATA driver not a network driver.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:40:58 +02:00
Tom Rini
6188752187 at91_udc.c: Fix unused variable warning
With gcc-6 and later we see warnings that at91sam9263_udc_caps and
at91rm9200_udc_caps are unused.

Fixes: 620197670a ("usb: gadget: at91_udc: add at91_udc into U-Boot")
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
2017-06-18 21:11:10 +02:00
Alexey Brodkin
9000eddbae drivers/usb/ehci: Use platform-specific accessors
Current implementation doesn't allow utilization of platform-specific
reads and writes.

But some arches or platforms may want to use their accessors that do
some extra work like adding barriers for data serialization etc.

Interesting enough OHCI accessors already do that so just aligning
EHCI to it now.

This is a resend of http://patchwork.ozlabs.org/patch/726714/
Back in the day this patch broke some PPC and Sandbox boards
as they we missing inclusion of "asm/io.h". Those missing items were
fixed with:
 1) http://patchwork.ozlabs.org/patch/751397/
 2) http://patchwork.ozlabs.org/patch/771099/

So now it should be safe to apply this patch.
FWIW TravisCI builds everything with all 3 patches in place,
see https://travis-ci.org/abrodkin/u-boot/builds/239563813

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2017-06-17 17:59:03 +02:00
Meng Dongyang
c65a34942e usb: dwc2: force to host mode if not support HNP/SRP
In current code, after running the command of "usb start", the controller
will keep in otg mode and can't switch to host mode if not support
SNP/SRP capability. So add the property of "hnp-srp-disable" in the DTS
to config the contrller work in force mode of host.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
2017-06-17 17:59:03 +02:00
Heiko Schocher
b9f7d88174 powerpc, 5xx: remove some "5xx" remains
we removed 5xx support. So delete some forgotten remains.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-16 10:14:56 -04:00
Heiko Schocher
9057df88e1 powerpc, 82xx: remove some missed mpc82xx remains
we removed 82xx support. Missed some 82xx remains,
remove them now.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-16 10:14:56 -04:00
Heiko Schocher
064b55cfcb powerpc, 5xxx, 512x: remove support for mpc5xxx and mpc512x
There was for long time no activity in the mpx5xxx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in mpc5xxx,
so remove it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-16 10:14:55 -04:00
Masahiro Yamada
51855e8981 treewide: remove unneeded semicolons
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-16 10:11:38 -04:00
Tom Rini
4f58002013 Merge git://git.denx.de/u-boot-mpc85xx 2017-06-14 18:53:03 -04:00
York Sun
ef621da7f8 net: phy: marvell: Fix init function for m88e1145
Commit a058052c changed the generic phy_reset() to clear all bits in
BMCR. This inevitably clears the ANEG bit. m88e1145 requires any
change to ANEG bit to be followed by a software reset. This seems to
be different from other PHYs. Implement read-modify-write procedure
for this PHY init.

Signed-off-by: York Sun <york.sun@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-12 12:18:14 -07:00
York Sun
7c8e0e0528 driver: ddr: fsl: Fix compiling error for DDR2
Fix compiling error of "no member named 'taamin_ps'" for DDR2.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12 11:30:00 -07:00
Axel Lin
d2d20d9925 dm: bcm6345_gpio: Set proper output level in bcm6345_gpio_direction_output
Current code does not set output level in bcm6345_gpio_direction_output,
fix it.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
2017-06-12 08:38:41 -04:00
Patrice Chotard
1afcf9cb25 serial: stm32x7: simplify baud rate register calculation
Simplify baud rate register formula and use the oversampling
uart feature.
This code is aligned with what is implemented in kernel driver
drivers/tty/serial/stm32-usart.c since kernel v4.9.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
2017-06-12 08:38:38 -04:00
Patrice Chotard
1113ad49dc serial: stm32x7: align compatible with kernel one
stm32x7.c driver is dedicated for STM32F7.
In kernel, "st,stm32-usart" and "st,stm32-uart" compatible
strings are dedicated for STM32F4.

To keep U-boot and kernel aligned, replace the serial compatible
string from "st,stm32-usart", "st,stm32-uart" to
"st,stm32f7-usart", "st,stm32f7-uart" specific for STM32F7.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
2017-06-12 08:38:13 -04:00
Simon Glass
73027a853d dm: core: Supress dead-code warning in __of_get_next_child()
Suppress a warning on next = next->sibling.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 163245)
Fixes 644ec0a (dm: core: Add livetree access functions)
2017-06-12 08:38:10 -04:00
Heiko Schocher
2eb48ff7a2 powerpc, 8260: remove support for mpc8260
There was for long time no activity in the 8260 area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 8260,
so remove it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-12 08:38:02 -04:00
Heiko Schocher
5b8e76c35e powerpc, 8xx: remove support for 8xx
There was for long time no activity in the 8xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 8xx,
so remove it (with a heavy heart, knowing that I remove
here the root of U-Boot).

Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-12 08:37:55 -04:00
Tom Rini
8cb3ce64f9 Merge git://git.denx.de/u-boot-dm 2017-06-10 18:01:22 -04:00
Tom Rini
d2e1ee686a Merge branch 'master' of git://git.denx.de/u-boot-video 2017-06-10 09:48:09 -04:00
Tom Rini
75fd49c836 Merge branch 'master' of git://git.denx.de/u-boot-mmc 2017-06-10 09:47:57 -04:00
Simon Glass
d3cb46aa8c rockchip: Init clocks again when chain-loading
Detect with a previous boot loader has already set up the clocks and set
them up again so that U-Boot gets what it expects.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:33 -06:00
Simon Glass
b223c1aead rockchip: rk3288: Convert clock driver to use shifted masks
Shifted masks are the standard approach with rockchip since it allows
use of the mask without shifting it each time. Update the definitions and
the driver to match.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:45:33 -06:00
Simon Glass
6b5a09aa38 rockchip: video: Take the vop device out of standby
On reset the standby bit is clear, but if U-Boot is chain-loaded from
another boot loader it may be set. Clear it before starting up video so
that it works correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Squashed in 'rockchip: video: fix taking the VOP device out of standby':
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-09 13:45:33 -06:00
Simon Glass
f418676e9a rockchip: video: Add remove() methods
Add remove() methods for EDP and VOP so that U-Boot can shut down the
video on exit. This avoids leaving DMA running while booting Linux which
can cause problems if Linux uses the frame buffer for something else.

It also makes it clear what is needed to shut down video.

While we are here, make rkvop_enable() static.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Squashed in 'rockchip: video: fix taking the VOP device out of standby':
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-09 13:45:28 -06:00
Simon Glass
385105983a rockchip: Setup default PWM flags
At present if the

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 874ee59 (rockchip: pwm: implement pwm_set_invert())
2017-06-09 13:39:34 -06:00
Simon Glass
505907a467 tegra: video: Don't power up the SOR twice
If U-Boot is the secondary boot loader, or has been run from itself, the
SOR may already be powered up. Powering it up again causes a hang, so
detect this situation and skip it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2017-06-09 13:39:33 -06:00
Simon Glass
4a7b9ee15e tegra: spi: Wait a little after setting the clocks
For devices that need a delay between SPI transactions we seem to need an
additional delay before the first one if the CPU is running at full speed.
Add this, under control of the existing setting. At present it will only
be enabled with the Chrome OS EC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 13:39:33 -06:00
Simon Glass
422f04b68f power: regulator: Add more debugging and fix a missing newline
This file does not report a few possible errors and one message is missing
a newline. Fix these.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 13:39:32 -06:00
Chris Packham
2bd3cab335 rtc: ds1337: drop "SYS" from config variables
There is some inconsistency between uses of CONFIG_RTC_DS13xx and
CONFIG_SYS_RTC_DS13xx. Address this by dropping the "SYS" from
these variables.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 11:24:01 -04:00
Vikas Manocha
6c0c3ce8aa serial: stm32f7: disable overrun
With overrun enabled, serial port console freezes & stops receiving data with
overun error if we keep sending data.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-06-09 11:23:59 -04:00
Vikas Manocha
b97476965b stm32: stm32f7: add spl build support
This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
	- spl U-Boot		: 0x0800_0000
	- standard U-Boot	: 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-09 11:23:55 -04:00
Philipp Tomsich
76a5e1b715 rockchip: video: document externally visible functions for rk_vop
Documents the externally visible functions shared between the VOP
drivers for the RK3288 and RK3399.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 15:57:25 +02:00
Philipp Tomsich
56c7ba3462 rockchip: video: document externally visible functions for rk_hdmi
Documents the externally visible functions shared between the HDMI
drivers for the RK3288 and RK3399.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 15:53:48 +02:00
Wenyou Yang
31e5c892b3 video: atmel_hlcdfb: Fix misaligned cache operation warning
Fix the warning,
 ---8<---
CACHE: Misaligned operation at range [3fdffff0, 3fdffffc]
 ---<8---

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 15:33:28 +02:00
Jernej Skrabec
b98efa1db3 sunxi: video: Add support for CSC and TVE to DE2 driver
Extend DE2 driver with support for TVE driver, which will be added in
next commit. TVE unit expects data to be in YUV format, so CSC support
is also added here.

Note that HDMI driver has higher priority, so TV out is not probed if
HDMI monitor is detected.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 15:30:47 +02:00
Jernej Skrabec
af4c874f11 sunxi: video: Rename tve.c to tve_common.c
In order to avoid future confusion with similary named files, rename
tve.c to tve_common.c. New name better represents the fact that this file
holds code which can be and will be shared between multiple drivers.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 15:30:13 +02:00
Keerthy
2dd9dc02a3 power: regulator: lp87565: add regulator support
The driver provides regulator set/get voltage
enable/disable functions for lp87565 family of PMICs.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Keerthy
cdad57a7c1 power: pmic: lp87565: Add the basic pmic support
Add support to bind the regulators/child nodes with the pmic.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Simon Glass
9752564722 dm: mmc: Avoid probing block devices in find_mmc_device()
We do not need to probe the block device here, so avoid doing so. The MMC
device itself must be active, but the block device can come later.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-09 20:25:16 +09:00
Simon Glass
9f103b9cb5 dm: blk: Add a way to obtain a block device from its parent
Many devices support a child block device (e.g. MMC, USB). Add a
convenient way to get this device given the parent device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-09 20:25:16 +09:00
Keerthy
e395b8848a power: pmic: tps65218: Add DCDC3 configuration
Some boards like am437x-gp-evm require dcdc3 also to be configured
as it feeds on to ddr. Hence add the capability as well.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-06-09 20:25:16 +09:00
Keerthy
75bceb22b3 power: regulator: palmas: Add smps12 dual regulator for tps65917
Add smps12 dual regulator for tps65917

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 20:25:16 +09:00
Marek Vasut
0f53118511 mmc: sh_sdhi: Fix Kconfig entry
The Kconfig entry depends on RMOBILE, but this was renamed
to ARCH_RMOBILE in commit 1cc95f6e1b (ARM: Rmobile: Rename
CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE) . Fix this omission.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Kouei Abe
a5950f8dfb mmc: sh_sdhi: Add SDHI support
R-Car Gen3 series have four SD card interfaces (SDHI0 to SDHI3),
two of which can also be used as MMC interfaces (SDHI2 and SDHI3).
This adds High-speed mode SD clock frequency between 25MHz and 50MHz,
8bit/4bit bus width, high capacity and low voltage device support.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Kouei Abe
91a16c3b2f mmc: sh_sdhi: Add MMC version 5.0 support
Renesas SDHI SD/MMC driver did not support MMC version 5.0 devices.
This adds MMC version 5.0 device support.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-06-09 20:25:16 +09:00
Kouei Abe
5eada1dbd0 mmc: sh_sdhi: Add 64-bit access to sd_buf support
Renesas SDHI SD/MMC driver has 16-bit width bus access to SD_BUF.
This adds 64-bit width bus access to SD_BUF.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Kouei Abe
3ebc62c987 mmc: sh_sdhi: Set SD_INFOx interrupt mask before command starting
When setting interrupt mask after command starting, an unintended
interrupt status sometimes occurs.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-09 20:25:16 +09:00
Philipp Tomsich
64199d4ead rockchip: video: rk_vop: add grf field
The last set of rebases had dropped the 'grf' field from the common
rk_vop.  Add this back to un-break the build (and driver).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-07 21:30:50 -06:00
Philipp Tomsich
ca562b630e rockchip: video: rk3399: add HDMI TX support on the RK3399
This commit enables the RK3399 HDMI TX, which is very similar to the
one found on the RK3288.  As requested by Simon, this splits the HDMI
driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and
a common portion (rk_hdmi.c).

Note that the I2C communication for reading the EDID works well with
the default settings, but does not with the alternate settings used on
the RK3288... this configuration aspect is reflected by the driverdata
for the RK3399 driver.

Having some sort of DTS-based configuration for the regulator
dependencies would be nice for the future, but for now we simply use
lists of regulator names (also via driverdata) that we probe.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:50 -06:00
Philipp Tomsich
147fd3ac5a rockchip: video: split RK3288-specific part off from rk_hdmi
To prepare for the addition of RK3399 HDMI support, the HDMI driver is
refactored and broken into a chip-specific and a generic part.  This
change adds the internal interfaces, makes common/reusable functions
externally visible and splits the RK3288 driver into a separate file.

For the probing of regulators, we reuse the infrastructure created
during the VOP refactoring... i.e. we simply call into the helper
function defined for the VOP.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:50 -06:00
Philipp Tomsich
f210e5574f rockchip: video: add mpixelclock settings from Linux driver
The Linux driver now supports higher mpixelclock settings.
Add these to rockchip_phy_config[] and rockchip_mpll_cfg[].

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:50 -06:00
Philipp Tomsich
cc75afc5d7 rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399
This commit adds a driver for the RK3399 VOPs capable and all the
necessary plumbing to feed the HDMI encoder. For the VOP-big, this
correctly tracks the ability to feed 10bit RGB data to the encoder.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:49 -06:00
Philipp Tomsich
d46d40474a rockchip: video: refactor rk_vop and split RK3288-specific code off
To prepare for adding the RK3399 VOP driver (which shares most of its
registers and config logic with the RK3228 VOP), this change refactors
the driver and splits the RK3288-specific driver off.

The changes in detail are:
- introduces a data-structure for chip-specific drivers to register
  features/callbacks with the common driver: at this time, this is
  limited to a callback for setting the pin polarities (between the
  VOP and the encoder modules) and a flag to signal 10bit RGB
  capability
- refactors the probing of regulators into a helper function that
  can take a list of regulator names to probe and autoset
- moves the priv data-structure into a (common) header file to be
  used by the chip-specific drivers to provide base addresses to
  the common driver
- uses a callback into the chip-specific driver to set pin polarities
  (replacing the direct register accesses previously used)
- splits enabling the output (towards an encoder) into a separate
  help function withint the common driver

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:49 -06:00
Philipp Tomsich
89b2b6186d rockchip: video: Kconfig: set MAX_XRES and MAX_YRES via Kconfig
This introduces two new Kconfig options that configure the maximum
allowable framebuffer size (i.e. the memory reservation/allocation for
the framebuffer):
 - VIDEO_ROCKCHIP_MAX_XRES
 - VIDEO_ROCKCHIP_MAX_YRES
The resulting memory allocation will cover 4 byte per pixel for these
resolutions.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:49 -06:00
Philipp Tomsich
d4bee08419 rockchip: video: Kconfig: reformat help for VIDEO_ROCKCHIP
For consistency sake (and as we are about to add new options to this
file), reformat the help for VIDEO_ROCKCHIP.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:49 -06:00
Philipp Tomsich
1208523935 rockchip: video: rk_hdmi: fix implicit definition warnings
When enabling CONFIG_DISPLAY_ROCKCHIP_HDMI, compile-time warning for
the following implicitly defined functions are raised due to a missing
include directive:

  drivers/video/rockchip/rk_hdmi.c: In function 'rk_hdmi_probe':
  drivers/video/rockchip/rk_hdmi.c:150:2: warning: implicit declaration of function 'rk_setreg' [-Wimplicit-function-declaration]
    rk_setreg(&priv->grf->soc_con6, 1 << 15);
    ^~~~~~~~~
  drivers/video/rockchip/rk_hdmi.c:153:2: warning: implicit declaration of function 'rk_clrsetreg' [-Wimplicit-function-declaration]
    rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,
    ^~~~~~~~~~~~

This change fixes this by including <asm/hardware.h> in rk_hdmi.c.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:47 -06:00
Meng Dongyang
d3cb14b910 rockchip: usb: host: xhci-rockchip: add support for rk3328
Add the compatible "rockchip,rk3328-xhci" in match table
for rk3328 to probe xhci controller. Use fixed regulator
to control the voltage of vbus and turn off vbus when
usb stop.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:25 -06:00
Andy Yan
2c1e11dd52 rockchip: Add core Soc start-up code for rv1108
RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core
from Rockchip. It is designed for varies application scenario such
as car DVR, sports DV, secure camera and UAV camera.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:25 -06:00
Andy Yan
bae2f282a9 rockchip: clk: Add rv1108 clock driver
Add clock driver support for Rockchip rv1108 soc

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:25 -06:00
Andy Yan
09aa7c468c rockchip: pinctrl: Add rv1108 pinctrl driver
Add pinctrl support for Rockchip rv1108 soc

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:24 -06:00
Kever Yang
077eb31514 rockchip: pinctrl: rk3328: do not set io routing
In rk3328, some function pin may have more than one choice, and muxed
with more than one IO, for example, the UART2 controller IO,
TX and RX, have 3 choice(setting in com_iomux):
- M0 which mux with GPIO1A0/GPIO1A1
- M1 which mux with GPIO2A0/GPIO2A1
- usb2phy which mux with USB2.0 DP/DM pin.

We should not decide which group to use in pinctrl driver,
for it may be different in different board, it should goes to board
file, and the pinctrl file should setting correct iomux depends on
the com_iomux value.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Kever Yang
6f0c123713 rockchip: pinctrl: move rk3328 grf reg definition in header file
Move GRF register bit definition into GRF header file, remove
'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Kever Yang
3c421f6fa9 rockchip: rk3036: clean mask definition for grf reg
U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro
definition in grf header file and pinctrl driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Kever Yang
1960b01034 rockchip: clock: rk3036: some fix according TRM
- hclk/pclk_div range should use '<=' instead of '<'
- use GPLL for pd_bus clock source
- pd_bus HCLK/PCLK clock rate should not bigger than ACLK

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Kever Yang
37943aaeea rockchip: rk3036: clean mask definition for cru reg
Embeded the shift in mask MACRO definition in cru header file
and clock driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Andy Yan
fe9d4e77ea rockchip: rk3368: Add sysreset driver
Add sysreset driver to reset rk3368 SOC.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Andy Yan
27600a5837 rockchip: rk3368: Add pinctrl driver
Add driver to support iomux setup for the most commonly
used peripherals on rk3368.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Andy Yan
d1dcf8527e rockchip: rk3368: Add clock driver
Add driver to setup the various PLLs and peripheral
clocks on the RK3368.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Mark Kettenis
c40d48bbbc regulator: pwm: Fix handling of missing init voltage
Since priv->init_voltage is an unsigned integer it can never be
negative.  So the current code fails to detect a missing
'regulator-init-microvolt' property and instead misconfigures the
PWM device.  Fix this by making the relevant members of
'struct pwm_regulator_info' signed integers.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2017-06-07 07:29:19 -06:00
Heiko Stübner
d1bf69d822 power: rk808: fix ldo register offset
Till now get_ldo_reg did a return &rk808_ldo[num - 1]; to return
the ldo register offset but didn't take into account that its
calling functions already created the ldo as ldo = dev->driver_data - 1.

This resulted in the setting for ldo8 writing to the register of ldo7
and so on. So fix this and get the correct ldo register data.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Philipp Tomsich
49cd8e85eb rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block
This adds a simple driver for reading the efuse block of the RK3399.
It should be easy enough to add drivers for other devices (e.g. the
RK3328, RK3368, etc.) by passing the device details via driver_data.

Unlike the kernel driver (using the nvmem subsystem), we don't expose
the efuse as multiple named cells, but rather as a linear memory that
can be read using misc_read(...).

The primary use case (as of today) is the generation of a 'serial#'
(and a 'cpuid#') environment variable for the RK3399-Q7 (Puma)
system-on-module.

Note that this adds a debug-only (i.e. only if DEBUG is defined)
command 'rk3399_dump_efuses' that dumps the efuse block's content.
N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to
      include a SoC-name (together with a comment in the function) to
      remind whoever adds support for additional SoCs that this
      function currently makes assumptions regarding the size of the
      fuse-box based on the RK3399. The hope is that the function is
      adjusted to reflect any changes resulting from generalising the
      driver for multiple SoCs and is then renamed.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:17 -06:00
Kever Yang
7c1fb0a794 rockchip: rk8xx: allocate priv structure for driver
The rk8xx_priv structure need to allocate for driver, or else
it will cause data abort when CPU access it.

This is a bug fix for below patch set:
https://www.mail-archive.com/u-boot@lists.denx.de/msg247345.html

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 06:57:49 -06:00
Tom Rini
b9eaeae19e Merge git://git.denx.de/u-boot-usb 2017-06-05 21:05:51 -04:00
Patrice Chotard
14a50e3736 drivers: ram: stm32: fix compilation issue
If CONFIG_CLK flag is not set, compilation raises the
following error message:

drivers/ram/stm32_sdram.c: In function 'stm32_fmc_probe':
drivers/ram/stm32_sdram.c:154:2: error: 'ret' undeclared (first use in this function)
  ret = stm32_sdram_init(dev);

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
cc: Vikas Manocha <vikas.manocha@st.com>
2017-06-05 14:13:13 -04:00
Patrice Chotard
aef5b738c9 reset: sti: add deassert counter in reset channel descriptor
This deassert counter allow to manage "shared" reset lines
encountered in some specific case. On STiH410 SoC, DWC3,
EHCI and OHCI are all using a respective PHY, but all of
these PHYs shared a "global" reset.

Currently, during command "usb stop", all host controller are
stopped (XHCI, EHCI and OHCI). XHCI is first shutdowned, which
means that PHY global reset is asserted. Then EHCI is shutdowned,
but its PHY reset has already been asserted which make handshake()
call failed in ehci_shutdown().

This counter allows to really assert a reset lines only when the
"last" user is asserting it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 14:13:02 -04:00
Simon Glass
457e51cffd common: arm: freescale: layerscape: Move header files out of common.h
We should not have an arch-specific header file in common.h. Adjust the
board files a little so it is not needed, and drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 14:12:59 -04:00
Simon Glass
6e2941d787 common: freescale: Move arch-specific declarations
The declarations should not be in common.h. Move them to the arch-specific
headers.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 12:30:55 -04:00
Simon Glass
c62db35d52 arm: Add explicit include of <asm/mach-types.h>
Rather than relying on common.h to provide this include, which is going
away at some point, include it explicitly in each file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:36 -04:00
Simon Glass
5a8ba315f1 samsung: Drop more references fo s3c24x0
This is dead code now. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:31 -04:00
Simon Glass
5644aeea8e samsung: nand: Drop s3c2410_nand driver
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:31 -04:00
Simon Glass
7a7530afb8 samsung: usb: Drop ohci-s3c24xx driver
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:30 -04:00
Simon Glass
ebf925051f samsung: mmc: Drop s3c_sdi driver
This is no-longer used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-05 11:02:30 -04:00
Simon Glass
2e5184dd5f gpio: samsung: Drop s3c2440_gpio driver
This is no longer used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:29 -04:00
Simon Glass
f66f88f643 common: Drop inclusion of pci.h
This should not be in common.h - remove it and update the only file that
needs it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:26 -04:00
Alexey Brodkin
2cb7b900f4 ehci-pci: Prepare for usage of readl()/writel() accessors
We used to have opencoded ehci_readl()/writel() which required no
external functions to be called.

Now with attempt to switch to generic readl()/writel() accessors
we see a missing declaration of those accessors in ehci-ppc4xx.
Something like that happens if applied
http://patchwork.ozlabs.org/patch/726714/:
--------------------------------->8---------------------------
  CC      drivers/usb/host/ehci-pci.o
In file included from drivers/usb/host/ehci-pci.c:14:0:
drivers/usb/host/ehci-pci.c: In function 'ehci_pci_init':
drivers/usb/host/ehci.h:108:36: warning: implicit declaration of function 'readl' [-Wimplicit-function-declaration]
 #define ehci_readl(x)  cpu_to_le32(readl(x))
                                    ^
drivers/usb/host/ehci.h:23:26: note: in definition of macro 'HC_LENGTH'
 #define HC_LENGTH(p)  (((p) >> 0) & 0x00ff)
                          ^
include/linux/byteorder/generic.h:89:21: note: in expansion of macro '__cpu_to_le32'
 #define cpu_to_le32 __cpu_to_le32
                     ^~~~~~~~~~~~~
drivers/usb/host/ehci-pci.c:33:14: note: in expansion of macro 'ehci_readl'
    HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
              ^~~~~~~~~~
--------------------------------->8---------------------------

This the same fix as we have for "ehci-ppc4xx" in
83cb46c286 "ehci-ppc4xx: Prepare for usage of readl()/writel() accessors".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
2017-06-05 13:42:09 +02:00
Tom Rini
5cafcbab58 Merge git://git.denx.de/u-boot-net 2017-06-03 18:05:28 -04:00
Tom Rini
541f538f4c Merge git://git.denx.de/u-boot-fsl-qoriq 2017-06-03 18:05:04 -04:00
Phil Edworthy
e5f00f0180 dfu: dfu_sf: Fix read offset
The offset was applied to write, but not read, now its applied to
both.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
2017-06-03 19:08:31 +02:00
Paul Burton
2303bff7d5 net: pch_gbe: Add cache maintenance
On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is
present. When there is no IOCU we need to writeback or invalidate the
data caches at appropriate points. Perform this cache maintenance in
the pch_gbe driver which is used on the MIPS Boston development board.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Paul Burton
52e727c8eb net: pch_gbe: CPU accessible addresses are virtual
Use the virt_to_bus & bus_to_virt functions rather than phys_to_bus &
bus_to_phys, since the addresses accessed by the CPU will be virtual
rather than physical. On MIPS physical & virtual addresses differ as we
use virtual addresses in kseg0, and attempting to use physical addresses
directly caused problems as they're in the user segment which would be
mapped via the uninitialised TLB.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Paul Burton
db225f1131 net: pch_gbe: Fix rx descriptor buffer addresses
The loop to set up buffer addresses in rx descriptors always operated on
descriptor 0, rather than on each descriptor sequentially. Fix this in
order to setup correct buffer addresses for each descriptor.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Paul Burton
43979cbacb net: pch_gbe: Reset during probe
Using the EG20T gigabit ethernet controller on the MIPS Boston board, we
find that we have to reset the controller in order for the RGMII link to
the PHY to become functional. Without doing so we constantly time out in
pch_gbe_mdio_ready.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Siva Durga Prasad Paladugu
f0b94c4bcd net: zynq_gem: Dont flush dummy descriptors
Dont flush dummy descriptors as they are already
allocated from a region with dcache off. Tested
this on Zynq(zc702) and ZynqMP(zcu102) boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Siva Durga Prasad Paladugu
dea004e41a net: zynq_gem: Use wait_for_bit with non breakable
Use wait_for_bit to be non breakable as using it with
breakable causes issue of un interruptible auto negotiation.
This is due to the ctrlc pressed will taken for wait_for_bit()
abort during phy_read() and hence not coming out of
auto negotiation.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Phil Edworthy
68e6ecadc5 net: phy: marvell 88e151x: Fix handling of RGMII interface types
The 88E1518 code is programming the wrong registers for rgmii-id,
rgmii-txid and rgmii-rxid interfaces.

Since the PHY defaults to rgmii-id, it would appear that the code
was previously only used with sgmii and rgmii-id interfaces.

Tested on 88E1512 PHY in rgmii-id mode which is from the same family
as 88E1518.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00