Commit graph

2162 commits

Author SHA1 Message Date
David Brownell
f1d944e30e davinci: add basic dm355/dm350/dm335 support
Add some basic declarations for DaVinci DM355/DM350/DM335 support,
keyed on CONFIG_SOC_DM355.  (DM35X isn't quite right because the
DM357 is very different; while the DM355 is like a DM355 without
the MPEG/JPEG coprocessor).

These have different peripherals than the DM6446, and some of
the peripherals are at different addresses.  Notably for U-Boot,
there's no EMAC, and the NAND controller address is different

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:48 +02:00
David Brownell
bd36fdc146 davinci: fix dm644x buglets
Fix two buglets in the dm644x support:  don't set two must-be-zero
bits in the UART management register; and only include the I2C hooks
if the I2C driver is being included.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:48 +02:00
David Brownell
f79043681f davinci: split out some dm644x-specific bits from psc
Split out DaVinci DM6446-specific bits from more generic bits:

 - Add a CONFIG_SOC_DM644X.  All current boards use DM6446 chips;
   DM6443 and DM6441 chips differ in available peripherals.

 - Move most DM644X-specific bits from psc.c to a new dm644x.c file,
   which is conditionally built.  It provides device-specific setup.

Plus minor coding style and comment updates with respect to the PSC.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:48 +02:00
David Brownell
48ef572955 davinci: cpu-specific build uses conditional make syntax
Update cpu/arm926ejs/davinci/Makefile to use COBJ-y type syntax.
Add the first conditional: for EMAC driver support.  Not all
chips have an EMAC; and boards might not use it, anyway.

This doesn't touch PHY configuration; that should eventually
become conditional too.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:47 +02:00
David Brownell
7b7808ae6d davinci: move psc support board-->cpu
Move DaVinci PSC support from board/* to cpu/* where it belongs.
The PSC module manages clocks and resets for all DaVinci-family
SoCs, and isn't at all board-specific.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:47 +02:00
David Brownell
84f7411cb9 DaVinci now respects SKIP_LOWLEVEL_INIT
Don't needlessly include lowlevel init code; that's only really
needed with boot-from NOR (not boot-from-NAND).  The 2nd stage
loader (UBL) handles that before it loads U-Boot.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:47 +02:00
Stefan Roese
d873133f2b ppc4xx: Add Sequoia RAM-booting target
This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").

Here the commands to load and start this image from the BDI2000:

440EPX>reset halt
440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX>go 0x1000000

Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:47 +02:00
Peter Tyser
655b34a78a i2c: Create common default i2c_[set|get]_bus_speed() functions
New default, weak i2c_get_bus_speed() and i2c_set_bus_speed() functions
replace a number of architecture-specific implementations.

Also, providing default functions will allow all boards to enable
CONFIG_I2C_CMD_TREE.  This was previously not possible since the
tree-form of the i2c command provides the ability to display and modify
the i2c bus speed which requires i2c_[set|get]_bus_speed() to be
present.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:45 +02:00
Peter Tyser
9c90a2c8e8 i2c.h: Provide a default CONFIG_SYS_I2C_SLAVE value
Many boards/controllers/drivers don't support an I2C slave interface,
however CONFIG_SYS_I2C_SLAVE is used in common code so provide a
default

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:45 +02:00
Kumar Gala
e7563aff17 fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
The ddr code computes most things as 64-bit quantities and had some places
in the middle that it was using phy_addr_t and phys_size_t.

Instead we use unsigned long long through out and only at the last stage of
setting the LAWs and reporting the amount of memory to the board code do we
truncate down to what we can cover via phys_size_t.

This has the added benefit that the DDR controller itself is always setup
the same way regardless of how much memory we have.  Its only the LAW
setup that limits what is visible to the system.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 09:15:50 -05:00
Kumar Gala
d4b130dc80 85xx: Use print_size to report amount of memory not mapped by TLBs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 09:15:48 -05:00
Jean-Christophe PLAGNIOL-VILLARD
a53c997dd7 at91/cpu.c: add missing Copyright & GPL header
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-10 01:29:29 +02:00
Fredrik Arnerup
90d13b8ac3 85xx: bugfix for reading maximum TLB size on mpc85xx
The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits.
This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum
(256 MB)
which made u-boot hang in board_init_f() when trying to create a new stack
in RAM.
I have an mpc8540 with one 1GB dimm.

Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-09 22:58:18 +02:00
Stefan Roese
399aab7748 ppc4xx: Fix problem with ECC ordering for PPC4xx NDFC platforms
This patch now uses the correct ECC byte order (Smart Media - SMC)
to be used on the 4xx NAND FLASH driver. Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.

Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in
drivers/mtd/nand/nand_ecc.c for correct operation. This is done with
a seperate patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2009-05-23 12:51:39 +02:00
Stefan Roese
5d841fac82 ppc4xx: Move definition for PPC4xx NAND FLASH controller to header
This patch moves the definition for the PPC4xx NAND FLASH controller
(NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the
upcoming fix for the ECC byte ordering of the NDFC driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2009-05-23 12:51:39 +02:00
Graf Yang
ec01481ddc Blackfin: fix timer_init()/timer_reset()
The timer_init() function was not using the right csync instruction, nor
was it doing it right after disabling the core timer.

The timer_reset() function would reset the timestamp, but not the actual
timer, so there was a common edge case where get_timer() return a jump of
one timestamp (couple milliseconds) right after resetting.  This caused
many functions to improperly timeout right away.

Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-05-19 04:57:33 -04:00
Thomas Lange
87423d740b MIPS: Implement ethernet halt for au1x00
Implement ethernet halt() by putting MAC0 in reset.
If we do not do this, we will get memory corruption
when ethernet frames are received during early OS boot.

Signed-off-by: Thomas Lange <thomas@corelatus.se>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2009-05-16 09:20:03 +09:00
Stefan Roese
c21f62d848 74xx_7xx: Fix rounding problem in CPU frequency calculation
This patch fixes a problem in the CPU frequency calculation. Without it
a 798MHz CPU is displayed as 368.503 MHz. And with it it's 798 MHz.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-05-15 22:22:01 +02:00
Detlev Zundel
792a09eb9d Fix e-mail address of Gary Jennejohn.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-05-15 22:11:59 +02:00
Wolfgang Denk
fe6da48373 MPC8260: fixup device tree by property instead of path
cpu/mpc8260/cpu.c used to use do_fixup_by_path_u32() to update the
clock frequencies in the device tree, using a CPU path
"/cpus/OF_CPU", with OF_CPU beind defined in the board config file.

However, this does not work when one board config file (here:
MPC8260ADS.h) is intended to be used for several diffrent CPUs and
therefor contains a generic definition like "cpu@0", as the device
trees that will then be loaded will contain specific names like
"PowerPC,8272@0".

We switch to using do_fixup_by_prop_u32() instead, so we can search
for device_type="cpu", as it is done in other architectures, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2009-05-15 22:03:09 +02:00
Sergey Lapin
c63254ef56 AFEB9260 network fix
AFEB9260 uses PA10, PA11 for ETX2 and ETX3.
Also, due to extarnal pull-up on IRQ line, Micrel PHY ID is 1 after reset sequence,
not 0.

Signed-off-by: Sergey Lapin <slapin@ossfans.org>
2009-05-13 01:17:17 +02:00
Mike Frysinger
f58bf804a1 Blackfin: avoid get_sclk() with early serial debug
When the clock functions were changed to use cached values (and thereby
avoiding expensive math functions), early serial debug broke because the
baud programming is called before external memory is available.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-05-06 08:47:27 -04:00
Mike Frysinger
02778f2f1b Blackfin: fix booting with older bootroms (no EVT1)
When dropping jump block support, the assumption was that all bootroms
supported entry point redirection via the EVT1 register.  Unfortunately,
this turned out to be incorrect for the oldest Blackfin parts (BF533-0.2
and older and BF561).  No one really noticed earlier because these parts
usually are booted by bypassing the bootrom entirely, and older BF533
parts are not supported at all (too many anomalies).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-05-06 08:47:21 -04:00
Mike Frysinger
af2c37378f Blackfin: recurse with early serial initcode
Make sure we recurse through serial_putc() rather than bang on the UART
transmit register directly to avoid hardware overflows when using \n.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-05-06 08:47:16 -04:00
Jean-Christophe PLAGNIOL-VILLARD
6b2beb5626 at91: remove lowlevel_init.S
lowlevel_init.S is not used any more so remove it.
As consequence, we also don't have to generate u-boot.lds
but can use a static version as before.

This also fixes the out-of-tree build problem introduced
with commit f0a2c7b4 "at91: add support for the PM9263 board"

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-05-01 21:24:41 +02:00
Wolfgang Denk
0ee7a31047 Update CHANGELOG; minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-05-01 00:16:11 +02:00
Manikandan Pillai
d3a513c23b OMAP3: Fix timer handling to 1ms and CONFIG_SYS_HZ to 1000
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Manikandan Pillai <mani.pillai@ti.com>
2009-04-30 23:56:01 +02:00
Wolfgang Denk
ccb71dfac9 Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-04-30 23:01:08 +02:00
Daniel Gorsulowski
a1e5f93185 at91: fixed plla calc when no USB support is active
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-29 21:42:34 +02:00
Ladislav Michl
3791a1187c arm925t: Fix CONFIG_SYS_HZ to 1000
Let CONFIG_SYS_HZ to have value of 1000 effectively fixing all users of
get_timer.

Changes since original version:
* Set PTV=2 (divisor 8) for boards using 12MHz timer clock source to
  improve timer resolution.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2009-04-29 21:39:46 +02:00
Sanjeev Premi
cba0b778dd OMAP3: Print correct silicon revision
The function display_board_info() displays incorrect
silicon revision - based on the return value from
function get_cpu_rev().

This patch fixes the problem.

Signed-off-by: Sanjeev Premi <premi@ti.com>
2009-04-29 21:11:49 +02:00
Sanjeev Premi
90006e9b33 OMAP3: Remove unused board-types
The board-types defined in struct omap3_sysinfo seem to be
unused. The function display_board_info() is passed
board type as an argument; which is ignored.

This patch removes all uses of board-type, related definitions
and functions.

Signed-off-by: Sanjeev Premi <premi@ti.com>
2009-04-29 21:11:40 +02:00
Sanjeev Premi
6a6b62e3aa OMAP3: Use functions print_cpuinfo() and checkboard()
Use the functions print_cpuinfo() and checkboard() to
display the cpu and board specific information.

These functions reuse content from the existing function
display_board_info() - which has been removed.

Also, updated the existig OMAP3 configurations to
define:
 - CONFIG_DISPLAY_CPUINFO
 - CONFIG_DISPLAY_BOARDINFO

Signed-off-by: Sanjeev Premi <premi@ti.com>
2009-04-29 21:11:32 +02:00
Peter Tyser
54e822f959 Replace __asm references with __asm__
__asm__ follows gcc's documented syntax and is generally more common
than __asm.  This change is only asthetic and should not affect
functionality.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-04-28 01:02:04 +02:00
Peter Tyser
f9a109b3ad Replace __attribute references with __attribute__
__attribute__ follows gcc's documented syntax and is generally more
common than __attribute.  This change is only asthetic and should not
affect functionality.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-04-28 01:01:39 +02:00
Wolfgang Denk
9c48a8ea38 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2009-04-27 23:41:01 +02:00
Heiko Schocher
14b9308d51 83xx: searching "muram-data" by compatible property
if using CONFIG_BOOTCOUNT_LIMIT feature on a MPC8360 CPU
in the muram-data node, the reg entry needs to be updated.
This is done in fdt_fixup_muram(), but we should use
the compatible "fsl,qe-muram-data" for searching the
node instead of searching the muram-data node with
an absolute path.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-04-24 14:38:45 -05:00
Wolfgang Denk
faa5a0c6fc Merge branch 'master' of git://git.denx.de/u-boot-at91 2009-04-24 13:31:02 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6ebff365eb at91sam9/at91cap: fix CONFIG_SYS_HZ to 1000
The timer has been rewrote with a precision at ~0,18%

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tested-by: Sergey Lapin <slapin@ossfans.org>
Tested-by: Eric BENARD <ebenard@free.fr>
2009-04-16 21:30:48 +02:00
Ilko Iliev
f0a2c7b4b6 at91: add support for the PM9263 board of Ronetix GmbH
The PM9263 board is based on the AT91SAM9263-EK board.

Here is the page on Ronetix website:
http://www.ronetix.at/starter_kit_9263.html

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-16 21:30:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
dc39ae9513 at91sam9/at91cap: improve clock framework
calculate dynamically the clock rate and pllb setting for usb

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-16 21:30:44 +02:00
Stefan Roese
cf9409885c ppc4xx: Add "booting from NAND" to 4xx NAND-booting targets
This additional text in the bootup log helps to see if the board is
configured for NAND-booting. Especially helpful for boards that can
boot from NOR and NAND (e.g. most of the AMCC eval boards).

Signed-off-by: Stefan Roese <sr@denx.de>
2009-04-16 09:12:08 +02:00
Mike Frysinger
aad4eca4ba Blackfin: audit UART for all known anomalies
There is no code change here, just new comments, but this keeps me from
having to do another audit from scratch in the future.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-04-06 17:37:49 -04:00
Mike Frysinger
8ef929afa4 Blackfin: add check for anomaly 05000362
DESCRIPTION:
The column address width settings for banks 2 and 3 are misconnected in
the SDRAM controller.  Accesses to bank 2 will result in an error if the
Column Address Width for bank 3 (EB3CAW ) is not set to be the same as
that of bank 2.

WORKAROUND:
If using bank 2, make sure that banks 2 and 3 have the same column address
width settings in the EBIU_SDBCTL register.  This must be the case
regardless of whether or not bank 3 is enabled.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-04-06 17:37:48 -04:00
Mike Frysinger
c2e07449f5 Blackfin: add comment about anomaly 05000430 avoidance
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-04-06 17:37:48 -04:00
Mike Frysinger
48ab150925 Blackfin: add workaround for anomaly 05000242
DESCRIPTION:
If the DF bit is set prior to a hardware reset, the PLL will continue to
divide CLKIN by 2 after the hardware reset, but the DF bit itself will be
cleared in the PLL_CTL register.

WORKAROUND:
Reprogram the PLL with DF cleared if the desire is to not divide CLKIN by
2 after reset.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-04-06 17:37:48 -04:00
Mike Frysinger
ce1fe4ba6b Blackfin: add workaround for anomaly 05000171
DESCRIPTION:
The Boot ROM is executed at power up/reset and changes the value of the
SICA_IWR registers from their default reset value of 0xFFFF, but does not
restore them.

WORKAROUND:
User code should not rely on the default value of these registers.  Set
the desired values explicitly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-04-06 17:37:47 -04:00
Wolfgang Denk
712ac6a1a6 Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-04-05 23:04:30 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ab29823151 arm: unify reset command
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-05 13:08:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b3acb6cd40 arm: clean cache management
unify arm cache management except for non standard cache as ARM7TDMI

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-05 13:06:31 +02:00
Jean-Christophe PLAGNIOL-VILLARD
677e62f432 arm: update co-processor 15 access
import system.h from linux

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-05 13:02:43 +02:00
Jon Smirl
3c853f31d6 mpc5200: reduce delays in i2c
The previous code waited 1000us before checking i2c
status. Measurement shows i2c is usually ready in
under 50us. Change the polling interval to 15us,
loop 6,667 times to keep the polling timeout constant
at 100ms.
2009-04-05 01:34:08 +02:00
Sanjeev Premi
3600326896 OMAP: Fix compile issue
Fixes this compile error:
board.c: In function 'do_switch_ecc':
board.c:339: error: 'cmd_tbl_t' has no member named 'help'
make[1]: *** [board.o] Error 1
make[1]: Leaving directory `/db/psp_git/users/a0756819/u-boot/cpu/arm_cortexa8/omap3'
make: *** [cpu/arm_cortexa8/omap3/libomap3.a] Error 2

This is due to the fact that current command uses long
help for the usage print even if the CONFIG_SYS_LONGHELP
is not enabled. (Thanks Jean-Christophe for explanation).

Signed-off-by: Sanjeev Premi <premi@ti.com>
2009-04-05 00:30:39 +02:00
Kyungmin Park
ab0689c316 Move machine specific code to board at s3c64xx (v2)
Move machine specific code to smdk6400.
Some board use OneNAND instead of NAND.

Some register MP0_CS_CFG[5:0] are controled by both h/w and s/w.
So it's better to use macro instead of hard-coded value.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2009-04-05 00:30:38 +02:00
Wolfgang Denk
c0a14aedc3 Update CHANGELOG, coding style cleanup. 2009-04-05 00:27:57 +02:00
Scott Wood
3a671fc06a mpc8260: Fill in brg's clock-frequency in device tree.
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-04-04 23:29:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
4758ebdd53 at91: move dataflash spi driver to drivers/spi
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:22 +02:00
Jean-Christophe PLAGNIOL-VILLARD
2b7178afce at91: move usb driver to drivers/usb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:21 +02:00
Jean-Christophe PLAGNIOL-VILLARD
f82518d7f4 at91rm9200: Reset update
Update the rm9200 reset sequence to try executing a board-specific reset
function and move specific board reset to board.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:21 +02:00
Jean-Christophe PLAGNIOL-VILLARD
3524049cd0 at91rm9200: move serial shutdown code to serial drivers
introduce serial_exit for this purpose. Use it only when the rm9200
serial driver is active

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:20 +02:00
Jean-Christophe PLAGNIOL-VILLARD
beebd851cd at91rm9200: move serial driver to drivers/serial
add CONFIG_AT91RM9200_USART to activate the driver

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:20 +02:00
Ulf Samuelsson
cb82a53266 Add support for the AT91RM9200EK Board.
The AT91RM9200-EK Evaluation Board supports the AT91RM9200
ARM9-based 32-bit RISC microcontroller and enables real-time code development
and evaluation.

Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507

with
	- NOR (cfi driver)
	- DataFlash
	- USB OHCI
	- Net
	- I2C (hard)

Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:20 +02:00
Jean-Christophe PLAGNIOL-VILLARD
90a92a708d at91: rename DATAFLASH_MMC_SELECT to CONFIG_DATAFLASH_MMC_SELECT
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:19 +02:00
Jean-Christophe PLAGNIOL-VILLARD
a47492ac60 at91sam9/at91cap: spi init add hardware chip select support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:17 +02:00
Scott Wood
8701eceffd PQ2FADS: Enable PCI.
PCI on PQ2FADS is very similar to PCI on MPC8272ADS.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-04-04 20:00:06 +02:00
Mike Frysinger
46ac352f0f Blackfin: do not delay on output bytes
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-04-02 06:42:13 -04:00
Mike Frysinger
ad9073211c Blackfin: fix crash when booting from external memory
When testing a u-boot binary that hasn't been booted from the bootrom, we
have to make sure the bootstruct structure has sane storage space.  If we
don't, the initcode will crash when it tries to dereference an invalid
pointer.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-04-02 06:41:56 -04:00
Wolfgang Denk
dfc91c3395 Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-04-02 00:24:33 +02:00
Kumar Gala
c840d26c75 85xx: Introduce determine_mp_bootpg() helper.
Match determine_mp_bootpg() that was added for 86xx.  We need this to
address a bug introduced in v2009.03 with 86xx MP booting.  We have to
make sure to reserve the region of memory used for the MP bootpg() so
other u-boot code doesn't use it.

Also added a comment about how cpu_reset() is dealing w/an errata on
early 85xx MP HW.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-01 15:29:49 -05:00
Kumar Gala
7649a590b5 86xx: Cleanup MP support
* Use CONFIG_MP instead of CONFIG_NUM_CPUS to match 85xx
* Introduce determine_mp_bootpg() helper.  We'll need this to address a
  bug introduced in v2009.03 with 86xx MP booting.  We have to make sure
  to reserve the region of memory used for the MP bootpg() so other
  u-boot code doesn't use it.
* Added dummy versions of cpu_reset(), cpu_status() & cpu_release() to
  allow cmd_mp.c to build and work. In the future we should look at
  implementing all these functions. This could be common w/85xx if we
  use spin tables on 86xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-01 15:29:44 -05:00
Haiying Wang
22b6dbc169 MPC85xx: Add MPC8569 CPU support
There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of
LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage,
then invalidate it after LBCR bit 13 is set.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-30 13:33:51 -05:00
Kumar Gala
1b3e4044a2 85xx: Add support for additional e500mc features
* Enable backside L2
* e500mc no longer has timebase enable in HID (moved to CCSR register)

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-30 13:33:50 -05:00
Dave Liu
c360ceac02 fsl-ddr: add the DDR3 SPD infrastructure
- support mirrored DIMMs, not support register DIMMs
- test passed on P2020DS board with MT9JSF12872AY-1G1D1
- test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
2009-03-30 13:33:50 -05:00
Dave Liu
6a81978367 fsl-ddr: Fix two bugs in the ddr infrastructure
1. wr_lat
   UM said the total write latency for DDR2 is equal to
   WR_LAT + ADD_LAT, the write latency is CL + ADD_LAT - 1.
   so, the WR_LAT = CL - 1;
2. rd_to_pre
   we missed to add the ADD_LAT for DDR2 case.

Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Dave Liu <daveliu@freescale.com>
2009-03-30 13:33:50 -05:00
Ladislav Michl
89c00fb158 OMAP: use {read,write}l to access timer registers
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2009-03-30 18:58:41 +02:00
Ladislav Michl
81472d893f OMAP: rename timer divisor
Divisor field is called PTV not PVT.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:41 +02:00
Ladislav Michl
fe672d60b2 OMAP: reindent timer code
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2009-03-30 18:58:40 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b3f66b0ba0 s3c2410: move nand driver to drivers/mtd/nand
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:40 +02:00
Jean-Christophe PLAGNIOL-VILLARD
d3b6357741 s3c24x0: move i2c driver to drivers/i2c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:40 +02:00
Jean-Christophe PLAGNIOL-VILLARD
300f99f453 s3c24x0: move serial driver to drivers/serial
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:39 +02:00
Jean-Christophe PLAGNIOL-VILLARD
942ba9969b davinci: move i2c driver to drivers/i2c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:39 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ee4f3e2765 davinci: move nand driver to drivers/mtd/nand
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:39 +02:00
Jean-Christophe PLAGNIOL-VILLARD
d3e55d0774 imx: move serial driver to drivers/serial
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:38 +02:00
Jean-Christophe PLAGNIOL-VILLARD
a6ef3ddeaf arm720t/clps7111: move serial driver to drivers/serial
add CONFIG_CLPS7111_SERIAL to activate the driver

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:42 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6790c55704 lpc2292: move serial driver to drivers/serial
add CONFIG_LPC2292_SERIAL to activate the driver

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:42 +02:00
Jean-Christophe PLAGNIOL-VILLARD
176a600d0e ks8695: move serial driver to drivers/serial
add CONFIG_KS8695_SERIAL to activate the driver

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:42 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6d27bca15d s3c64xx: move usb driver to drivers/usb
add CONFIG_USB_S3C64XX to activate the driver

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:42 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ecfa8dda2f imx31: move serial driver to drivers/serial
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:41 +02:00
Jean-Christophe PLAGNIOL-VILLARD
9ea91c9fef netarm: move serial driver to drivers/serial
add CONFIG_NETARM_SERIAL to activate the driver

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:41 +02:00
Jean-Christophe PLAGNIOL-VILLARD
412ab70588 sa1100: move serial driver to drivers/serial
add CONFIG_SA1100_SERIAL to activate the driver

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:41 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b2368754a9 s3c44b0: extract cache from cpu.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:41 +02:00
Jean-Christophe PLAGNIOL-VILLARD
40fd626223 s3c44b0: move serial driver to drivers/serial
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:41 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5fe1377cc4 s3c44b0: move rtc driver to drivers/rtc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:40 +02:00
Jean-Christophe PLAGNIOL-VILLARD
50f601cca8 s3c44b0: move i2c driver to drivers/i2c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:40 +02:00
Jean-Christophe PLAGNIOL-VILLARD
281dfb0c0c s3c4510b: move specific code to soc directory
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-29 23:01:36 +02:00
Heiko Schocher
76756e41cd ppc: cleanup compiler errors/warnings
Current u-boot top of tree builds with warnings/errors for
the following boards:

ads5121 cpci5200 mecp5200 v38b IAD210 MBX MBX860T NX823
RPXClassic debris PN62

following patch solves this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2009-03-27 20:23:32 +01:00
Wolfgang Denk
aaa0e0812f Merge branch 'master' of git://git.denx.de/u-boot-at91 2009-03-26 22:27:45 +01:00
Jon Smirl
33e88c557b mpc5200: suppress printf until console initialized
On boards which have the environment in eeprom, i2c_init() is called
before the console and RAM are initialized.
Suppress printfs until the console is initialized.

Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-03-25 22:50:04 +01:00
Mike Frysinger
74398b23f9 Blackfin: put memory into self-refresh before/after programming clocks
When initializing the core clocks, stick external memory into self-refresh.
This gains us a few cool things:
 - support suspend-to-RAM with Linux
 - reprogram clocks automatically when doing "go" on u-boot.bin in RAM
 - make sure settings are stable before flashing new version
 - finally fully unify initialize startup code path between LDR/non-LDR

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:55 -04:00
Mike Frysinger
d347d572ab Blackfin: do not program voltage regulator on parts that do not have one
Some newer Blackfins (like the BF51x) do not have an on-chip voltage
regulator, so do not attempt to program the memory as if it does.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:55 -04:00