Commit graph

66457 commits

Author SHA1 Message Date
Adam Ford
7bb33e4684 ARM: da850-evm: Unify config options with Kconfig
There are two options that are currently whitelisted, but they
are redundant, because there are not necessary since Kconfig options
exist to basically state the same thing.

CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and
only used by the da850 when booting from NOR, however the only time
CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since
NOR doesn't need SPL, the options for SPL can be moved to a check for
building SPL instead of checking for NOR.

This patch removes the checks for these two config options and unifies
the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH.

Since this board is the only board that uses these two config options,
they can be removed from the whitelist table.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-13 20:58:34 +05:30
Adam Ford
5f1600e03e README: davinci: Clarify when SPL is used and the target devices.
The documentation states that SPL is enabled in all config options
for the da850.  This incorrect, because devices booting from NOR
do not need the SPL to do the low level initializion because when
booting from NOR, the board is able to execute in place (XIP)

This also clarifies that SPL isn't only used for booting from SPI,
because it is also used for booting from MMC and NAND for those
devices supporting those boot options.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
3f09ebfbde arm: dts: k3-am65: Sync CPSW DT node from kernel
Sync CPSW DT node from kernel and move it out of -u-boot.dtsi file.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
aeeca07a80 arm: dts: k3-j721e: Sync CPSW DT node from kernel
Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
84228940c3 net: ti: am65-cpsw-nuss: Update driver to use kernel DT
Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver
to look for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
9eab6fd526 net: ti: am65-cpsw-nuss: Set ALE default thread enable
Force default thread to be used for RX as ALE is anyways set to Bypass
mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
cf9b9942bf net: ti: am65-cpsw-nuss: Remove dead code
MDIO node is not referenced further, therefore drop the dead code.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
ddcf5318af dma: ti: k3-udma: Switch to k3_ringacc_request_rings_pair
We only request ring pairs via K3 DMA driver, switch to use the new
k3_ringacc_request_rings_pair() to simplify the code.

As a good side effect, all boot stages now use exposed RING mode which
avoid maintaining proxy mode for 32 bit R5 core.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
7be5121719 dma: ti: k3-udma: Move RX descriptor ring entries to rflow struct
In K3 UDMA architecture, RX rings are associated with RX flows rather
than RX channels, therefore move the ring pointers to udma_rflow struct

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
af374c24d9 dma: ti: k3-udma: Introduce udma_chan_config struct
Encapsulate channel configuration in a separate struct so as to ease
resetting of these fields with memset() and also to increase readability
of the code.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
b3f95997ce soc: ti: k3-ringacc: Separate soc specific initialization
In preparation of adding more K3 SoCs, separate soc specific
initialization add a SoC specific initialization hook.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
5d25784998 soc: ti: k3-ringacc: Add an API to request pair of rings
Add new API k3_ringacc_request_rings_pair() to request pair of rings at
once, as in the most case Rings are used with DMA channels which required
to request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
one to receive completions (RX/TX CQ). This will allow to simplify Ringacc
API users.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
db08a1df43 soc: ti: k3-ringacc: Move state tracking variables under a struct
Move the free, occ, windex and rinfex under a struct.
We can use memset to zero them and it will allow a cleaner way to extend
the variables for duplex rings.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
99faf0df04 arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
5c92fffab2 dma: ti: k3-udma: Update driver to use static endpoint Data
Update driver to use static PSIL endpoint Data instead of DT. This will
allow DT bindings to be in sync with kernel's DT.

Note that this patch breaks networking and OSPI boot as driver changes
are not backward compatible with existing DT. Subsequent commit will
update the DT to make it compatible with updated driver.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-07-13 20:58:34 +05:30
Vignesh Raghavendra
53b04c6c09 dma: ti: Add static PSIL endpoint information
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.

Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-07-13 20:58:34 +05:30
Tom Rini
497c7598c4 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- Enable DM_SPI on siemens omap boards (Jagan)
- Dropped some non-dm supported omap3 boards (Jagan)
- Dropped non-dm code in omap3 spi driver (Jagan)
- Dropped non-dm code in kirkwood spi driver (Bhargav)
2020-07-11 17:40:00 -04:00
Tom Rini
610e1487c8 UniPhier SoC updates for v2020.10
- remove workaround for Cortex-A72
 
  - increase U-Boot proper size to 2MB
 
  - sync DT with Linux
 
  - add system bus controller driver
 
  - improve serial driver
 
  - add reset assertion to Denali NAND driver
 -----BEGIN PGP SIGNATURE-----
 
 iQJSBAABCgA8FiEEbmPs18K1szRHjPqEPYsBB53g2wYFAl8JxkseHHlhbWFkYS5t
 YXNhaGlyb0Bzb2Npb25leHQuY29tAAoJED2LAQed4NsGWJwP/AoA+MrBcm5HebBI
 /jHfDbI0pXe+G+FsNf2ksoCbaeNQLQQZZJSFyvArRS2DB6uqdylQEK4COblXM4TN
 X2VTB0AzLoUhKeRD6wh5FOeeNfyM9ejm7yHu986dQ7imBjz5uDNUPV/WmP2zxYk+
 yLH9I1n2bStCd+b7OFG1yUA9HPLe0H9ZesuotMvRw+OkDaF89R53uJQpmemeRp0U
 78taiMTZctQ5LJOQWqsEmBBtk/eMiz2uu10+PgI807hNic4NDUQFP1bPnJvo2WBc
 T4s5G3y5KVbZGf3mcXJGqTtDBAqTJltAAN83U6yi92SmW9mpUAJ4db0hvKb90q1W
 5Zl/DVwjWfBmIWS8yObDDmjncenmbnxzUS9D/Gsw9sKflK9uDsk9O+NiVppYfD8R
 rIFwFjMqzcf+wcnM23TsjmDvy7PmlArpEHrqSLk5g56wW1urjQSN38VJfPY01TwA
 bNAGbCOwMH9809p0VzMNOuu0EKxGhWoeqREjUNVgEXVrzF9G7MZxVuNSJSUeqwsA
 oMT512gGd9WjOg4M13Hj0TzcvWo6p3wYf1pBcfZbqDdR5KxPasdnhz0AiFA7QvwR
 +EoczvPWJFgebFe9m9NmMdTb9AjF5PKheAlWe3imTdOINlVm5Qiudlwnd8lXkfVi
 pUBxiqNhaq/UjF3bpw7/Cq+CCRKu
 =lxb5
 -----END PGP SIGNATURE-----

Merge tag 'uniphier-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier

UniPhier SoC updates for v2020.10

 - remove workaround for Cortex-A72

 - increase U-Boot proper size to 2MB

 - sync DT with Linux

 - add system bus controller driver

 - improve serial driver

 - add reset assertion to Denali NAND driver
2020-07-11 11:50:49 -04:00
Masahiro Yamada
5785950369 ARM: uniphier: remove NAND reset code
Now that commit 3e57f879ee ("mtd: nand: raw: denali: Assert reset
before deassert") added the reset assertion, this code in the board
file is unneeded.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:56:51 +09:00
Ley Foon Tan
94e8b328a7 mtd: nand: raw: denali: Wait for reset completion status
Fixed delay 200us is not working in certain platforms. Change to
poll for reset completion status to have more reliable reset process.

Controller will set the rst_comp bit in intr_status register after
controller has completed its reset and initialization process.

Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Radu Bacrau <radu.bacrau@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Ley Foon Tan
3e57f879ee mtd: nand: raw: denali: Assert reset before deassert
Always put the controller in reset, then take it out of reset.
This is to make sure controller always in reset state in both SPL and
proper Uboot.

This is preparation for the next patch to poll for reset completion
(rst_comp) bit after reset.

Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Radu Bacrau <radu.bacrau@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
b053515e91 serial: uniphier: enable FIFO
This UART controller is integrated with a FIFO. Enable it.

You can put the next character into the FIFO while the transmitter
is sending out the current character. This works slightly faster.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
26f7a7deab serial: uniphier: flush transmitter before changing hardware settings
Ensure the transmitter is empty when chaining the baudrate or any
hardware settings. If a character is remaining in the transmitter,
the console will be garbled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
70434ab9de serial: uniphier: use register macros instead of structure
After all, I am not a big fan of using a structure to represent the
hardware register map.

You do not need to know the entire register map.

Add only necessary register macros.

Use FIELD_PREP() instead of maintaining a pair of shift and mask.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
d7877c985b ARM: uniphier: remove sbc/ directory
Now that this directory contains only uniphier_sbc_boot_is_swapped(),
move it to boot-device.c and delete the sbc/ directory entirely.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
862274913f bus: uniphier-system-bus: move hardware init from board files
Move the bus initialization code to this driver from board files.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
e2bb0be2fc bus: uniphier-system-bus: add UniPhier System Bus driver
Since commit 1517126fda ("ARM: uniphier: select DM_ETH"), DM-based
drivers/net/smc911x.c is compiled, but it is never probed because the
parent node lacks the DM-based driver.

I need a skeleton driver to populate child devices (but the next commit
will move more hardware settings to the this driver).

I put this to drivers/bus/uniphier-system-bus.c because this is the
same path as the driver in Linux kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
d69d49d3ec ARM: uniphier: remove support for NOR Flash on support card
I actually do not see this used these days because eMMC or NAND is used
for non-volatile devices. Dump the burden to maintain this crappy code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
f95237bb02 ARM: uniphier: remove unused uniphier_sbc_init_admulti()
This was used by the old sLD3 SoC, the support of which was removed
by commit 00aa453ebf ("ARM: uniphier: remove sLD3 SoC support").

There is no more user of this function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
43db571b2d ARM: uniphier: fix build error when CONFIG_MICRO_SUPPORT_CARD=n
If CONFIG_MICRO_SUPPORT_CARD is unset, the build fails due to
function redefinition.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
0852033309 ARM: uniphier: sync with Linux 5.8-rc4
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
56d463bdba ARM: uniphier: consolidate SoC select menu
Currently, the supports for the following two ARMv7 SoC groups
are exclusive, because the boot ROM loads the SPL to a different
address:

 - LD4, sLD8                 (SPL is loaded at 0x00040000)
 - Pro4, Pro5, PXs2, LD6b    (SPL is loaded at 0x00100000)

This limitation exists only when CONFIG_SPL=y.

Instead of using crappy CONFIG options, checking SPL and SPL_TEXT_BASE
is cleaner.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
e3e9d5e8d7 ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN to 2MB
I increased the maximum U-Boot proper size from time to time, but
configs/uniphier_v7_defconfig hit the current limit 832KB.

Some historical info:

In the initial support, the max size was 512MB.

Commit 58d702274c ("ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN")
increased it to 576KB, and commit 3ce5b1a8d8 ("ARM: uniphier: move
SPL stack address") moved the SPL stack location to avoid the memory
map conflict. It was the solution to increase the size without changing
the NOR boot image map.

commit 1a4bd3a095 ("ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN
again") ended up with increasing the max size again, breaking the NOR
boot image map. The limit was set to 832KB, otherwise the SPL stack
would overwrite the U-Boot proper image:
 CONFIG_SPL_STACK - CONFIG_SYS_UBOOT_BASE + sizeof(struct image_header) = 0xd0000

To increase CONFIG_SYS_MONITOR_LEN even more, the SPL stack must be
moved somewhere. I put it back to the original location prior to
commit 3ce5b1a8d8.

With this change, there is no more practical size limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Masahiro Yamada
1f8e6a670c Revert "ARM: uniphier: add weird workaround code for LD20"
This reverts commit 45f41c134b.

This weird workaround was the best I came up with at that time
to boot U-Boot from TF-A.

I noticed U-Boot successfully boots on LD20 (i.e. CA72 CPU) by using
the latest TF-A.

Specifically, since the following TF-A commit, U-Boot runs at EL2
instead of EL1, and this issue went away as a side-effect.

|commit f998a052fd94ea082833109f25b94ed5bfa24e8b
|Author: Masahiro Yamada <yamada.masahiro@socionext.com>
|Date:   Thu Jul 25 10:57:38 2019 +0900
|
|    uniphier: run BL33 at EL2
|
|    All the SoCs in 64-bit UniPhier SoC family support EL2.
|
|    Just hard-code MODE_EL2 instead of using el_implemented() helper.
|
|    Change-Id: I7ab48002c5205bc8c013e1b46313b57d6c431db0
|    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

However, if I reverted that, this problem would come back, presumably
because some EL1 code in U-Boot triggers this issue.

Now that commit f8ddd8cbb5 ("arm64: issue ISB after updating system
registers") fixed this issue properly, this weird workaround is no
longer needed irrespective of the exception level at which U-Boot runs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11 21:30:21 +09:00
Tom Rini
4a9146c295 of-platdata: better phandle and compatible-string support
patman support for Python3 on Ubuntu 14.04
 new checkpatch check to avoid #ifdefs
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAl8InaQRHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIreazvAgAgqyvPY2o+BNHscrx9/6sEOHSAVty/D5t
 SdaphzRezlJOWy9MC/ZyqyevZjogN7fgGNQVgh/I4BklIc/N5Omn68/+JWylSFVP
 taJKiJD1IVSThTXGOMTxlDiTxY7NfVDUDjtFIpCDswBrnSJlX+2v/RsehUwVIrYn
 NJwiRXd33IdS1vh1mqqNgwbZNBo+zGWn5LApq71vLSVkiQlmcpMG9FmYYRcg/AhG
 3Xd2HB2ANcvb13fMMcwd3s4WPNYoiJvwjSHScNDUPEip7XeZNDiNeq4gC6d2Uw+J
 zC3/vOCP3eRtAnr6syJ5QcGN/eeKwLtnTE+fOuOm6s5Y98po4iMykA==
 =3fC5
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-10jul20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

of-platdata: better phandle and compatible-string support
patman support for Python3 on Ubuntu 14.04
new checkpatch check to avoid #ifdefs
2020-07-10 16:22:57 -04:00
Heinrich Schuchardt
f309247399 CI: show skipped Python tests
Call pytest3 with argument -ra to display the reason why Python tests are
skipped.

The -r flag displays a test summary info for each test. -ra eliminates
this info for passed tests.

Pros an cons were discussed in:
https://lists.denx.de/pipermail/u-boot/2020-June/417090.html

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-10 16:22:37 -04:00
Tom Rini
3113c84ba2 - add support for PCI and XHCI for RPi4 (64 bit only)
- optionally reset XHCI device on registration
 - enable USB_KEYBOARD for rpi_4_defconfig
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl8Ifk0SHG1icnVnZ2Vy
 QHN1c2UuY29tAAoJEC9tfk32wqh+160QAK85hENUpOft76dZ+SwKp1EF4K6yn7Uq
 7OuO3k9PlzYamWDrJuRlvUp2ZkQPU0umT7NA+DfIOCrcXpdU/nltlhZMlaSXIXIp
 NbsoSLZxGz1xKdKITZJupCMTj+rHP4/ZO96EQ9ajuNQ56TLmxSbbU6rpJtwm98Gx
 mXOUTSx3UOHRyRv7R1U/LGNfxHnXwK8tpP+sCppHGRkl2ypkKSM9mjPRmBfPLGgM
 s0TDm2XcPtiTK/YOR5FpuXsjlg+eUxhpSkH9Tvj49BkGPgIUeGYgWkc/1d6Aip1E
 liuQYvRtK/cZLhtaWPyW8JPentyv54rIbFQ7weZbsTMDGUfX4k5VJC+ucsWiG3aa
 XaWO83woOG+nYIv6hNodXT9i5TmfOJYHHC64nqMMGx0n5Ouz3oQ2UhXVLMFihyG0
 xgOprEVqMBvgxdOGVyEyFO3qtut2zPQTkFTZZoUNrEYcGO3rtrhAMI2KY4TVMfQe
 CyZ4DMMMAC3aSvL2VD5s3YkD//j8sXdt75qnSeS3AVbEKJgmcWP6A59FFDZ6cCmY
 Nturw8Cfn8axvQAkR9v7yhX2HeItO6n5YWhayoxa+Bo5mjjEZEMT5mrZhKAWposl
 XBZgb4Xr6fp1N2AZf7/b60jxwD0ogTIjxX4Ez2d43ehhHqPNZ5sGrC6kIrpu0U9U
 NKcCxgGjlQBA
 =2aS6
 -----END PGP SIGNATURE-----

Merge tag 'rpi-next-2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi

- add support for PCI and XHCI for RPi4 (64 bit only)
- optionally reset XHCI device on registration
- enable USB_KEYBOARD for rpi_4_defconfig
2020-07-10 14:31:22 -04:00
Tom Rini
618c306790 Merge branch '2020-08-10-arbitrary-virt-phys-mappings'
- Bring in Marek Szyprowski's series to allow for arbitrary
  virtual-physical address mappings.
2020-07-10 14:30:46 -04:00
Marek Szyprowski
c1b0bcc870 config: Enable support for the XHCI controller on RPI4 board
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
and USB commands. To get it working one has to call the following commands:
"pci enum; usb start;", thus such commands have been added to the default
"preboot" environment variable. One has to update their environment if it
is already configured to get this feature working out of the box.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-07-10 14:11:49 -04:00
Marek Szyprowski
814e1a4b8c rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 32bit)
Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge. Due to 32bit limit in the CPU virtual address space in ARM
32bit mode, this region is mapped at 0xff800000 CPU virtual address.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-07-10 14:10:43 -04:00
Seung-Woo Kim
221c5e42a6 mmc: bcm283x: fix int to pointer cast
On build with 32 bit, there is a warning for int-to-pointer-cast.
Fix the int to pointer cast by using uintptr_t.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-07-10 14:10:43 -04:00
Marek Szyprowski
d877f8fd0f arm: provide a function for boards init code to modify MMU virtual-physical map
Provide function for setting arbitrary virtual-physical MMU mapping
and cache settings for the given region.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-10 14:10:43 -04:00
Marek Szyprowski
f5a9fcc602 arm: update comments to the common style
Update the comments in include/asm/system.h to the common style.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-10 14:10:43 -04:00
Marek Szyprowski
69be8fd164 powerpc: move ADDR_MAP to Kconfig
Move ADDR_MAP related config options from include/configs/*.h to the
proper place in lib/Kconfig. This has been done using
./tools/moveconfig.py and manual inspection of the generated changes.
This is a preparation to use ADDR_MAP helper on ARM 32bit Raspberry Pi4
board for mapping the PCIe XHCI MMIO, which is above the 4GiB identity
mapping limit.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-10 14:10:43 -04:00
Nicolas Saenz Julienne
d6ecb71a1f config: Enable USB Keyboard support on RPi4
Supporting USB keyboards out of the box is both handy for development
and production. Notably if u-boot is used to boot into GRUB.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[mb: drop rpi_4_32b_defconfig hunk]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:50:36 +02:00
Nicolas Saenz Julienne
0b80371b35 usb: xhci: Add reset controller support
Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
[mb: squash fix to only build xhci_reset_hw() if CONFIG_DM_BUS]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Nicolas Saenz Julienne
6836d59094 configs: Enable support for reset controllers on RPi4
This is required in order to access the reset controller used to
initialize the board's xHCI chip.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Nicolas Saenz Julienne
f676eb217b reset: Add Raspberry Pi 4 firmware reset controller
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Nicolas Saenz Julienne
d774da08dc arm: rpi: Add function to trigger VL805's firmware load
On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
may either be loaded directly from an EEPROM or, if not present, by the
SoC's VideCore (the SoC's co-processor). Introduce the function that
informs VideCore that VL805 may need its firmware loaded.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00
Marek Szyprowski
440bca81f0 configs: Enable support for the XHCI controller on RPI4 board (ARM 64-bit)
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
and USB commands. To get it working one has to call the following commands:
"pci enum; usb start;", thus such commands have been added to the default
"preboot" environment variable. One has to update their environment if it
is already configured to get this feature working out of the box.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-10 11:49:28 +02:00