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Merge branch '2020-08-10-arbitrary-virt-phys-mappings'

Browse source 
- Bring in Marek Szyprowski's series to allow for arbitrary
  virtual-physical address mappings.
This commit is contained in:
Tom Rini 2020-07-10 14:30:46 -04:00
commit 618c306790
152 changed files with 321 additions and 90 deletions
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8
arch/arm/include/asm/mmu.h Normal file
View file

@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0+ */
#ifndef __ASM_ARM_MMU_H
#define __ASM_ARM_MMU_H
void init_addr_map(void);
#endif

36
arch/arm/include/asm/system.h
View file

@ -207,7 +207,7 @@ int __asm_invalidate_l3_icache(void);
void __asm_switch_ttbr(u64 new_ttbr);
/*
* Switch from EL3 to EL2 for ARMv8
* armv8_switch_to_el2() - switch from EL3 to EL2 for ARMv8
*
* @args: For loading 64-bit OS, fdt address.
* For loading 32-bit OS, zero.
@ -222,7 +222,7 @@ void __asm_switch_ttbr(u64 new_ttbr);
void __noreturn armv8_switch_to_el2(u64 args, u64 mach_nr, u64 fdt_addr,
u64 arg4, u64 entry_point, u64 es_flag);
/*
* Switch from EL2 to EL1 for ARMv8
* armv8_switch_to_el1() - switch from EL2 to EL1 for ARMv8
*
* @args: For loading 64-bit OS, fdt address.
* For loading 32-bit OS, zero.
@ -248,11 +248,12 @@ void flush_l3_cache(void);
void mmu_change_region_attr(phys_addr_t start, size_t size, u64 attrs);
/*
*Issue a secure monitor call in accordance with ARM "SMC Calling convention",
* smc_call() - issue a secure monitor call
*
* Issue a secure monitor call in accordance with ARM "SMC Calling convention",
* DEN0028A
*
* @args: input and output arguments
*
*/
void smc_call(struct pt_regs *args);
@ -521,10 +522,12 @@ enum {
#endif
/**
* mmu_page_table_flush() - register an update to page tables
*
* Register an update to the page tables, and flush the TLB
*
* \param start start address of update in page table
* \param stop stop address of update in page table
* @start: start address of update in page table
* @stop: stop address of update in page table
*/
void mmu_page_table_flush(unsigned long start, unsigned long stop);
@ -585,11 +588,26 @@ s32 psci_features(u32 function_id, u32 psci_fid);
void save_boot_params_ret(void);
/**
* mmu_set_region_dcache_behaviour_phys() - set virt/phys mapping
*
* Change the virt/phys mapping and cache settings for a region.
*
* @virt: virtual start address of memory region to change
* @phys: physical address for the memory region to set
* @size: size of memory region to change
* @option: dcache option to select
*/
void mmu_set_region_dcache_behaviour_phys(phys_addr_t virt, phys_addr_t phys,
size_t size, enum dcache_option option);
/**
* mmu_set_region_dcache_behaviour() - set cache settings
*
* Change the cache settings for a region.
*
* \param start start address of memory region to change
* \param size size of memory region to change
* \param option dcache option to select
* @start: start address of memory region to change
* @size: size of memory region to change
* @option: dcache option to select
*/
void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
enum dcache_option option);

24
arch/arm/lib/cache-cp15.c
View file

@ -25,7 +25,8 @@ __weak void arm_init_domains(void)
{
}
void set_section_dcache(int section, enum dcache_option option)
static void set_section_phys(int section, phys_addr_t phys,
enum dcache_option option)
{
#ifdef CONFIG_ARMV7_LPAE
u64 *page_table = (u64 *)gd->arch.tlb_addr;
@ -37,7 +38,7 @@ void set_section_dcache(int section, enum dcache_option option)
#endif
/* Add the page offset */
value |= ((u32)section << MMU_SECTION_SHIFT);
value |= phys;
/* Add caching bits */
value |= option;
@ -46,13 +47,18 @@ void set_section_dcache(int section, enum dcache_option option)
page_table[section] = value;
}
void set_section_dcache(int section, enum dcache_option option)
{
set_section_phys(section, (u32)section << MMU_SECTION_SHIFT, option);
}
__weak void mmu_page_table_flush(unsigned long start, unsigned long stop)
{
debug("%s: Warning: not implemented\n", __func__);
}
void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
enum dcache_option option)
void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys,
size_t size, enum dcache_option option)
{
#ifdef CONFIG_ARMV7_LPAE
u64 *page_table = (u64 *)gd->arch.tlb_addr;
@ -74,8 +80,8 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size,
option);
#endif
for (upto = start; upto < end; upto++)
set_section_dcache(upto, option);
for (upto = start; upto < end; upto++, phys += MMU_SECTION_SIZE)
set_section_phys(upto, phys, option);
/*
* Make sure range is cache line aligned
@ -90,6 +96,12 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
mmu_page_table_flush(startpt, stoppt);
}
void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
enum dcache_option option)
{
mmu_set_region_dcache_behaviour_phys(start, start, size, option);
}
__weak void dram_bank_mmu_setup(int bank)
{
bd_t *bd = gd->bd;

1
arch/arm/mach-bcm283x/Kconfig
View file

@ -36,6 +36,7 @@ config BCM2711_32B
select BCM2711
select ARMV7_LPAE
select CPU_V7A
select PHYS_64BIT
config BCM2711_64B
bool "Broadcom BCM2711 SoC 64-bit support"

8
arch/arm/mach-bcm283x/include/mach/base.h
View file

@ -8,4 +8,12 @@
extern unsigned long rpi_bcm283x_base;
#ifdef CONFIG_ARMV7_LPAE
#ifdef CONFIG_TARGET_RPI_4_32B
#include <addr_map.h>
#define phys_to_virt addrmap_phys_to_virt
#define virt_to_phys addrmap_virt_to_phys
#endif
#endif
#endif

21
arch/arm/mach-bcm283x/init.c
View file

@ -134,6 +134,27 @@ int mach_cpu_init(void)
}
#ifdef CONFIG_ARMV7_LPAE
#ifdef CONFIG_TARGET_RPI_4_32B
#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xff800000UL
#include <addr_map.h>
#include <asm/system.h>
void init_addr_map(void)
{
mmu_set_region_dcache_behaviour_phys(BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT,
BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE,
DCACHE_OFF);
/* identity mapping for 0..BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT */
addrmap_set_entry(0, 0, BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT, 0);
/* XHCI MMIO on PCIe at BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT */
addrmap_set_entry(BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT,
BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE, 1);
}
#endif
void enable_caches(void)
{
dcache_enable();

2
configs/Cyrus_P5020_defconfig
View file

@ -42,4 +42,6 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/Cyrus_P5040_defconfig
View file

@ -42,4 +42,6 @@ CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

1
configs/MPC8548CDS_36BIT_defconfig
View file

@ -46,3 +46,4 @@ CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550=y
CONFIG_ADDR_MAP=y

1
configs/MPC8572DS_36BIT_defconfig
View file

@ -51,4 +51,5 @@ CONFIG_USB=y
CONFIG_USB_EHCI_PCI=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

2
configs/MPC8641HPCN_36BIT_defconfig
View file

@ -42,4 +42,6 @@ CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_KEYBOARD=y
CONFIG_VIDEO=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=8
CONFIG_OF_LIBFDT=y

2
configs/MPC8641HPCN_defconfig
View file

@ -42,4 +42,6 @@ CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_KEYBOARD=y
CONFIG_VIDEO=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=8
CONFIG_OF_LIBFDT=y

1
configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
View file

@ -57,6 +57,7 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

1
configs/P1010RDB-PA_36BIT_NAND_defconfig
View file

@ -83,3 +83,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y

1
configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
View file

@ -56,6 +56,7 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

1
configs/P1010RDB-PA_36BIT_NOR_defconfig
View file

@ -65,3 +65,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y

1
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
View file

@ -77,3 +77,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y

1
configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
View file

@ -58,6 +58,7 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

1
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
View file

@ -79,3 +79,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y

1
configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
View file

@ -57,6 +57,7 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

1
configs/P1010RDB-PB_36BIT_NAND_defconfig
View file

@ -83,3 +83,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y

1
configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
View file

@ -56,6 +56,7 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

1
configs/P1010RDB-PB_36BIT_NOR_defconfig
View file

@ -65,3 +65,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y

1
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
View file

@ -77,3 +77,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y

1
configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
View file

@ -58,6 +58,7 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

1
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
View file

@ -79,3 +79,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y

1
configs/P1020MBG-PC_36BIT_SDCARD_defconfig
View file

@ -64,4 +64,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P1020MBG-PC_36BIT_defconfig
View file

@ -52,4 +52,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P1020RDB-PC_36BIT_NAND_defconfig
View file

@ -83,3 +83,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y

1
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
View file

@ -78,3 +78,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y

1
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
View file

@ -80,3 +80,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y

1
configs/P1020RDB-PC_36BIT_defconfig
View file

@ -67,3 +67,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y

1
configs/P1020UTM-PC_36BIT_SDCARD_defconfig
View file

@ -64,4 +64,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P1020UTM-PC_36BIT_defconfig
View file

@ -52,4 +52,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P1021RDB-PC_36BIT_NAND_defconfig
View file

@ -81,4 +81,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P1021RDB-PC_36BIT_SDCARD_defconfig
View file

@ -76,4 +76,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
View file

@ -78,4 +78,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P1021RDB-PC_36BIT_defconfig
View file

@ -64,4 +64,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P1024RDB_36BIT_defconfig
View file

@ -58,4 +58,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P1025RDB_36BIT_defconfig
View file

@ -60,4 +60,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_OF_LIBFDT=y

1
configs/P2020RDB-PC_36BIT_NAND_defconfig
View file

@ -88,3 +88,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y

1
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
View file

@ -83,3 +83,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y

1
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
View file

@ -85,3 +85,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y

1
configs/P2020RDB-PC_36BIT_defconfig
View file

@ -72,3 +72,4 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y

2
configs/P2041RDB_NAND_defconfig
View file

@ -65,3 +65,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P2041RDB_SDCARD_defconfig
View file

@ -64,3 +64,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P2041RDB_SECURE_BOOT_defconfig
View file

@ -54,6 +54,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/P2041RDB_SPIFLASH_defconfig
View file

@ -65,3 +65,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
View file

@ -47,4 +47,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/P2041RDB_defconfig
View file

@ -63,3 +63,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P3041DS_NAND_SECURE_BOOT_defconfig
View file

@ -53,6 +53,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/P3041DS_NAND_defconfig
View file

@ -62,3 +62,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P3041DS_SDCARD_defconfig
View file

@ -61,3 +61,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P3041DS_SECURE_BOOT_defconfig
View file

@ -51,6 +51,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/P3041DS_SPIFLASH_defconfig
View file

@ -62,3 +62,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P3041DS_SRIO_PCIE_BOOT_defconfig
View file

@ -47,4 +47,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/P3041DS_defconfig
View file

@ -60,3 +60,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P4080DS_SDCARD_defconfig
View file

@ -60,3 +60,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P4080DS_SECURE_BOOT_defconfig
View file

@ -50,6 +50,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/P4080DS_SPIFLASH_defconfig
View file

@ -61,3 +61,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P4080DS_SRIO_PCIE_BOOT_defconfig
View file

@ -45,4 +45,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/P4080DS_defconfig
View file

@ -59,3 +59,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P5020DS_NAND_SECURE_BOOT_defconfig
View file

@ -54,6 +54,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/P5020DS_NAND_defconfig
View file

@ -54,4 +54,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/P5020DS_SDCARD_defconfig
View file

@ -52,4 +52,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/P5020DS_SECURE_BOOT_defconfig
View file

@ -51,6 +51,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/P5020DS_SPIFLASH_defconfig
View file

@ -53,4 +53,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/P5020DS_SRIO_PCIE_BOOT_defconfig
View file

@ -47,4 +47,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/P5020DS_defconfig
View file

@ -51,4 +51,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/P5040DS_NAND_SECURE_BOOT_defconfig
View file

@ -54,6 +54,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/P5040DS_NAND_defconfig
View file

@ -63,3 +63,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P5040DS_SDCARD_defconfig
View file

@ -61,3 +61,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P5040DS_SECURE_BOOT_defconfig
View file

@ -51,6 +51,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/P5040DS_SPIFLASH_defconfig
View file

@ -62,3 +62,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/P5040DS_defconfig
View file

@ -60,3 +60,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/T1023RDB_NAND_defconfig
View file

@ -74,4 +74,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1023RDB_SDCARD_defconfig
View file

@ -71,4 +71,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1023RDB_SECURE_BOOT_defconfig
View file

@ -58,6 +58,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/T1023RDB_SPIFLASH_defconfig
View file

@ -74,4 +74,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1023RDB_defconfig
View file

@ -58,4 +58,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1024RDB_NAND_defconfig
View file

@ -87,3 +87,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/T1024RDB_SDCARD_defconfig
View file

@ -84,3 +84,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/T1024RDB_SECURE_BOOT_defconfig
View file

@ -63,6 +63,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/T1024RDB_SPIFLASH_defconfig
View file

@ -87,3 +87,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/T1024RDB_defconfig
View file

@ -72,3 +72,5 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/T1040D4RDB_NAND_defconfig
View file

@ -72,4 +72,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1040D4RDB_SDCARD_defconfig
View file

@ -69,4 +69,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1040D4RDB_SECURE_BOOT_defconfig
View file

@ -55,6 +55,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/T1040D4RDB_SPIFLASH_defconfig
View file

@ -72,4 +72,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1040D4RDB_defconfig
View file

@ -56,4 +56,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1040RDB_NAND_defconfig
View file

@ -73,4 +73,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1040RDB_SDCARD_defconfig
View file

@ -70,4 +70,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1040RDB_SECURE_BOOT_defconfig
View file

@ -56,6 +56,8 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/T1040RDB_SPIFLASH_defconfig
View file

@ -73,4 +73,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1040RDB_defconfig
View file

@ -57,4 +57,6 @@ CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_OF_LIBFDT=y

2
configs/T1042D4RDB_NAND_defconfig
View file

@ -84,3 +84,5 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_VIDEO=y
CONFIG_CFB_CONSOLE_ANSI=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/T1042D4RDB_SDCARD_defconfig
View file

@ -81,3 +81,5 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_VIDEO=y
CONFIG_CFB_CONSOLE_ANSI=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/T1042D4RDB_SECURE_BOOT_defconfig
View file

@ -58,6 +58,8 @@ CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_VIDEO=y
CONFIG_CFB_CONSOLE_ANSI=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y

2
configs/T1042D4RDB_SPIFLASH_defconfig
View file

@ -84,3 +84,5 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_VIDEO=y
CONFIG_CFB_CONSOLE_ANSI=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

2
configs/T1042D4RDB_defconfig
View file

@ -69,3 +69,5 @@ CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_VIDEO=y
CONFIG_CFB_CONSOLE_ANSI=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64

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