This commit prevents from re-configuring pins if those were configured
before relocation.
Some pins - like UART or DDR must be setup before relocation
(as they have 'u-boot,dm-pre-reloc' property set in DTS). Without this
change, those pins are re-configured after relocation (pre_reloc_only = 0,
so we do not "continue").
Such behavior may be a problem for DDR PAD configuration, as they might
be already leveled/tuned with original setup).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Enable 'fpga' command in u-boot. User will be able to use the FPGA
command to program the FPGA on Stratix10 SoC.
Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
Add driver for the JZ47xx MSC controller.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add driver for the efuse block in the JZ47xx SOC.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The VCore III SoCs such as the Luton but also the Ocelot can remap an SPI
flash directly in memory. However, for writing in the flash the
communication has to be done by software.
Each of the signal used for the SPI are exposed in a single register. In
order to be able to use the soft-spi driver, the management of this pin
is done through this simple gpio driver.
Even if the main purpose of this driver is to be used by soft-spi, it can
still be used as a normal gpio driver but with limitation: for example
the first pin can't be used as output.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This driver supports the pin and gpio controller found in the Ocelot and
Luton SoCs.
The driver was inspired from the pinctrl driver in Linux, but was
simplified and was modified to allow supporting an other SoCs (Luton).
For Ocelot and Luton the controller is the same, only the pins to program
differ.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
[changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
On some platforms, as the Ocelot ones, when wanting to control the CS
through software, it is not possible to do it through the GPIO
controller. Indeed, this signal is managed through a dedicated range of
registers inside the SoC..
By declaring the external_cs_manage function as weak, it is possible to
manage the CS at platform level and then using the appropriate registers.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds SiFive UART driver. The driver is 100% DM driver
and it determines input clock using clk framework.
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
RISC-V privileged architecture v1.10 defines a real-time counter,
exposed as a memory-mapped machine-mode register - mtime. mtime must
run at constant frequency, and the platform must provide a mechanism
for determining the timebase of mtime. The mtime register has a
64-bit precision on all RV32, RV64, and RV128 systems.
Different platform may have different implementation of the mtime
block hence an API riscv_get_time() is required by this driver for
platform codes to hide such implementation details. For example,
on some platforms mtime is provided by the CLINT module, while on
some other platforms a simple 'rdtime' can be used to get the timer
counter.
With this timer driver the U-Boot timer functionalities like delay
works correctly now.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
This adds a driver for RISC-V CPU. Note the driver will bind
a RISC-V timer driver if "timebase-frequency" property is
present in the device tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
+ Update the function syscon_node_to_regmap() to force bound on
syscon uclass and directly use the list of device from DM.
+ Remove the static list syscon_list.
This patch avoid issue (crash) when syscon_node_to_regmap() is called
before and after reallocation (list content is invalid).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
In some cases, UART is configured by early boot stage.
To be sure of the initial state of UART and to avoid
spurious chars on console, reset the serial block before
configuring it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If OP-TEE core is compiled with support of REE FS and RPMB
at the same time (CFG_RPMB_FS ?= y; CFG_RPMB_FS ?= y), and persistent
storage API is used with TEE_STORAGE_PRIVATE storage id, it will
lead to TA panic.
E/TC:? 0 TA panicked with code 0xffff0009
.....
E/TC:? 0 Call stack:
E/TC:? 0 0x000000004002f2f8 TEE_OpenPersistentObject at
lib/libutee/tee_api_objects.c:422
In this particular case TEE_ERROR_STORAGE_NOT_AVAILABLE is more suitable
than TEE_ERROR_NOT_IMPLEMENTED, as it provides to a TA a possibility
to handle this error code [1].
>From GPD TEE Internal Core specification [2]:
TEE_ERROR_STORAGE_NOT_AVAILABLE - if the persistent object is stored in a
storage area which is currently inaccessible. It may be associated with
the device but unplugged, busy, or inaccessible for some other reason.
[1]: 94db01ef44/lib/libutee/tee_api_objects.c (L419)
[2]: https://globalplatform.org/wp-content/uploads/2018/06/GPD_TEE_Internal_Core_API_Specification_v1.1.2.50_PublicReview.pdf
Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
When the device is in peripheral mode there is no
struct usb_bus_priv allocated pointer, as the uclass driver
("usb_dev_generic") doesn't call per_device_auto_alloc_size.
This results in writing to the internal SDRAM at
priv->desc_before_addr = true;
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
For USB3.0, the max packetsize for GET_DESCRIPTOR should be
sent as exponent value for 2. This means for 512, max packet
size should be filled with 9(2^9=512). Also, fill the USB
version field with 3.0 if speed is negotiated to Superspeed.
This fixes the issue of DFU gadget download failure with
superspeed. Without this patch, the max packet size is
overflowed to zero as the bMaxPacketsize is of u8 and hence
host is not able to detect this device.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable DM for USB peripheral in the musb-new driver.
Also make sure that the driver can be used in the SPL.
This implies that:
* the driver must work with and without the OF_CONTROL option. That
in turn, implies that the platform data can be passed in a struct
ti_musb_platdata or be read from the dtb
* usb.o is linked in the SPL if host support is enabled
Another change is that the driver does not fail to bind (and stop the boot
process) if one of the child driver does not bind. Reporting the error is
enough. This kind of error would appear if the port is configured in the
DTS but the driver is not activated in the config.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The set_phy_power() callback is part of struct omap_musb_board_data. This
structure is part of the platform data passed to the musb-new driver. This
does not really fit with the Driver Model, so allow not to use struct
omap_musb_board_data to turn the phy on or off.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some drivers might need to access common USB functions such as
usb_get_maximum_speed() or usb_get_dr_mode().
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The keystone platforms can use the generic DC3 driver. Removing the
keystone-spcecific xchi driver and add the configuration options to enable
the generic DWC3 driver on all K2 platforms.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
There don't appear to be any boards enabling CONFIG_USB_DA8XX,
and there is a newer version of the MUSB driver, so let's remove
the legacy version of it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This patch removes CONFIG_USB_DAVINCI. It's a legacy option
that isn't defined anywhere, and there is a newer MUSB driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
When CONFIG_SPL_DM_USB was added, it was added defaulted on without
protection to ensure it didn't get set for non-DM SPL builds.
This leads to unexpected and confusing failures when building a DM based
U-Boot but with a non-DM SPL, as the defconfig is unlikely to have
CONFIG_SPL_DM_USB actively disabled.
Tweak the Kconfig to not enable this setting unless CONFIG_SPL_DM is set.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
The BITMAP related operations can now be moved to ./include/linux/bitmap.h
file to mimic the Linux kernel directory tree.
This change also allows to remove the lin_gadget_compat.h header file
(which is a legacy code only for composite U-boot layer).
It was also possible to remove #includes from several USB gadget drivers.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
Currently it's not possible to get filesize of downloaded images and
it's impossible to automate some tasks in scripts. So this patch adds
`filesize` environment variable with size (as hex number in bytes) of
the last successfully downloaded file via `sdp` command.
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
At present the 'beep' sound generates a waveform for only one channel even
if two are being used. This means that the beep is twice the frequency it
should be. Correct this by making it a parameter.
The fix in a previous commit was correct for sandbox but not for other
boards.
Fixes: 03f11e87a8 ("sound: Correct data output in sound_create_square_wave()")
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these parameters are hard-coded in the sdl interface code.
Allow them to be specified by the driver instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update snow's device tree and config to use driver model for sound. Also
update the others as best we can.
Spring does not appear to have audio support in the kernel. The smdk5250
and smdk5420 boards use a wolfson codec which I cannot test with. So the
only boards that is tested and known to work are snow, pit and pi.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current ID enums start from 1 but there does not seem to be any reason
that they cannot start with 0. Adjust the code to avoid the +1 in
codec_init().
Signed-off-by: Simon Glass <sjg@chromium.org>
The current dev_read...() functions use s32 and u32 which are convenient
for device tree but not so useful for normal code, which often wants to
use normal integers for values.
Add a helper which supports returning an unsigned int. Also add signed
versions of the unsigned readers.
Signed-off-by: Simon Glass <sjg@chromium.org>
The sound driver pulls together the audio codec and i2s drivers in order
to actually make sounds. It supports setup() and play() methods. The
sound_find_codec_i2s() function allows locating the linked codec and i2s
devices. They can be referred to from uclass-private data.
Add a uclass and a test for sound.
Signed-off-by: Simon Glass <sjg@chromium.org>
The i2s bus is commonly used with audio codecs. It provides a way to
stream digital data sychronously in both directions. U-Boot only supports
audio output, so this uclass is very simple, with a single tx_data()
method.
Add a uclass and a test for i2s.
Signed-off-by: Simon Glass <sjg@chromium.org>
An audio codec provides a way to convert digital data to sound and vice
versa. Add a simple uclass which just supports setting the parameters for
the codec.
Signed-off-by: Simon Glass <sjg@chromium.org>
This structure contains information that is likely needed by any i2s
driver so it seems useful to attach it to the (forthcoming) i2c uclass.
For now, just rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
The U-Boot sound system provides basic support for beeping. At present it
does not use driver model, but it needs to be converted. Add an option to
enable driver model for sound. For now it is not connected to anything.
Future work will add drivers which use this option. It will then be
removed once everything is converted.
Signed-off-by: Simon Glass <sjg@chromium.org>
For snow the codec is at address 0x11 on the i2c bus, in 7-bit format.
The device tree and code are in 8-bit format (i.e. shifted left one bit).
Fix both. Fix pit in a similar way.
Signed-off-by: Simon Glass <sjg@chromium.org>
These are only used in two functions so can be made local.
Also change the first argument of max98095_do_init() to suit.
Signed-off-by: Simon Glass <sjg@chromium.org>
With driver model we want to do a minimal probe when the device is probed
and then set up the codec interface later when a sound is actully played.
Split this setup code out into its own function to help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
With driver model we want to do a minimal probe when the device is probed
and then set up the codec interface later when a sound is actully played.
Split this setup code out into its own function to help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
With driver model we cannot pass in the global struct, but instead want
to pass in the driver-private data. Split some of the code out of
wm8994_init() to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the driver-private data is global. To allow this code to be
used with driver model, change it to pass the data down to each function.
Use the name 'priv' consistently throughout.
Also rename max98095_update_bits() to max98095_bic_or() which is more
descriptive and shorter, thus breaking fewer lines with the parameter
addition.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the driver-private data is global. To allow this code to be
used with driver model, change it to pass the data down to each function.
Use the name 'priv' consistently throughout.
Also rename wm8994_update_bits() to wm8994_bic_or() which is more
descriptive and shorter, thus breaking fewer lines with the parameter
addition.
Signed-off-by: Simon Glass <sjg@chromium.org>
This struct is only used by the Samsung I2C driver and should move into
that driver. For now, rename it so it is clear that is driver-private
info.
Signed-off-by: Simon Glass <sjg@chromium.org>
Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but
CONFIG_SPL_PCI_SUPPORT disabled, results in following linker
error:
lib/built-in.o: In function `fdtdec_get_pci_bar32':
lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32'
fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32'
This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c
while SPL build does not descend into drivers/pci directory in
drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled.
Fix this by applying appropriate #define guards in lib/fdtdec.c.
It looks like ns16550.c has the same problem, so fixed that too.
To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI
(enables use of CONFIG_IS_ENABLED() macro).
Suggested-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The function part_init() will only be built when we have both
CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE set. Protect the call to
this function with both of these tests now.
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Vanessa Maegima <vanessa.maegima@nxp.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit f32a8007ef ("dm: i2c: Make i2c_get_chip_for_busnum() fail if the
chip is not detected") introduced a regression for the NVIDIA Jetson TX2.
For some reason the xfer callback of the tegra i2c driver doesn't support
probing the I2C devices with a 0-length message.
Fixing the regression by providing a dummy implementation of probe_chip()
that does nothing.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Add support for lx2160a SoC
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Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq
Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC
[trini: Add a bunch of missing MAINTAINERS entries]
Signed-off-by: Tom Rini <trini@konsulko.com>
- init DRAM for RK322x in SPL
- add FAN53555 PMIC/regulator driver
- update MicroCrystal RV3029 driver to Kconfig and sync from Linux
- add bootcount uclass and first DM-driver for bootcount
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Merge tag 'for-master-20181210' of git://git.denx.de/u-boot-rockchip
Improvements:
- init DRAM for RK322x in SPL
- add FAN53555 PMIC/regulator driver
- update MicroCrystal RV3029 driver to Kconfig and sync from Linux
- add bootcount uclass and first DM-driver for bootcount
This adds a driver for the FAN53555 family of regulators and wraps it
in a PMIC implementation.
While these devices support a 'normal' and 'suspend' mode (controlled
via an external pin) to switch between two programmable voltages, this
incarnation of the driver assumes that the device is always operating
in 'normal' mode.
Only setting/reading the programmed voltage is supported at this time
and the following device functionality remains unsupported:
- switching the selected voltage (via a GPIO)
- disabling the voltage output via software-control
This matches the functionality of the Linux driver.
Tested on a RK3399-Q7 (with 'option 5' devices): setting voltages from
the U-Boot shell and verifying output voltages on the board.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
This implements a driver using a RTC-based backing store for the DM
bootcount implementation. The node configuring this feature will be
compatible with 'u-boot,bootcount-rtc' and the underlying RTC device
shall be reference through the property 'rtc'. An offset into the RTC
device's register space can be provided through the 'offset' property.
Tested on a RK3399-Q7 on a Flamingo carrier board using the SRAM area
of the carrier board's RV3029 RTC.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The original bootcount methods do not provide an interface to DM and
rely on a static configuration for I2C devices (e.g. bus, chip-addr,
etc. are configured through defines statically). On a modern system
that exposes multiple devices in a DTS-configurable way, this is less
than optimal and a interface to DM-based devices will be desirable.
This adds a simple driver that is DM-aware and configurable via DTS.
If ambiguous (i.e. multiple bootcount-devices are present) the
/chosen/u-boot,bootcount-device property can be used to select one
bootcount device.
Initially, this provides support for the following DM devices:
* RTC devices
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Patch for rk322x TPL is not merged, and only SPL is available now,
enable the sdram driver in SPL first. We should update back to TPL
after TPL is enabled for rk322x.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
To reset the DM after a new dtb is loaded, we need to call dm_uninit()
and then dm_init(). This fails however because gd->dm_root is not nullified
by dm_uninit().
Fixing it by setting gd->dm_root in dm_uninit().
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
It is currently not possible to include the support to remove devices in
the SPL. This is however needed by platforms that re-select their dtb after
DM is initialized; they need to remove all the previously bound devices
before triggering a scan of the new DT.
Add a Kconfig option to be able to include the support for device removal
in the SPL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Seeries-changes:3
- update commit message
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Those driver are not DM drivers per se (not using the PMIC/regulator
framework) and are using the legacy I2C API. Make them compatible with
the DM_I2C API.
This impacts the following drivers:
- palmas (used by am57xx/dra7xx evms)
- tps65218 (used by am43xx evms)
- tps65217 and tps65910 (used by am335x evms and am335x boneblack vboot)
- twl4030 (used by omap3_logicpd)
- tps65217 (used by brppt1)
- twl6030
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This allows the driver to be used without OF_CONTROL.
AM335x support DM_SPL but does not use SPL_OF_CONTROL. Enabling DM_I2C in
SPL thus requires that the omap I2C can be passed platdata.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Move away from SoC specific headers to handle different register layout.
Instead use driver data to get appropriate register layouts like in the
kernel. While at it, perform some mostly cosmetic alignment/cleanup in
the functions being updated.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
If OF_CONTROL is not enabled and DM_SEQ_ALIAS is enabled, we must
assign an alias (requested sequence number) to devices that belongs to a
class with the DM_UC_FLAG_SEQ_ALIAS flag. Otherwise
uclass_find_device_by_seq() cannot be used to get/probe a device. In
particular i2c_get_chip_for_busnum() cannot be used.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
i2c_get_chip_for_busnum() really should check the presence of the chip on
the bus. Most of the users of this function assume that this is done.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for
rolling CRC16 into the hash infrastructure. Given that CRC8, CRC32
and CRC32-C already have their prototypes in a single header file, it
seems a good idea to also include CRC16-CCITT in the same.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
release armada-18.09.2").
The complete log of changes is best obtained from the mv-ddr-marvell.git
repository but some relevant highlights are:
ddr3: add missing txsdll parameter
ddr3: fix tfaw timimg parameter
ddr3: fix trrd timimg parameter
merge ddr3 topology header file with mv_ddr_topology one
mv_ddr: a38x: fix zero memory size scrubbing issue
The upstream code is incorporated omitting the portions not relevant to
Armada-38x and DDR3. After that a semi-automated step is used to drop
unused features with unifdef
find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
-UCONFIG_APN806 -UCONFIG_MC_STATIC \
-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
-UA70X0
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
- bad usage of clrsetbits_le32
- bad pin definition for AXG Family
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Merge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogic
Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
- bad pin definition for AXG Family
Some boards feature a capacitance on LDO3's output that is too large,
causing inrush currents which as a result, shut down the AXP209. This
has been reported before, without knowing the actual cause.
A fix appeared to be done with
commit 0e6e34ac8d ("sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators").
The description there is a bit misleading, the kernel does not hang
during AXP209 initialization, the PMIC shuts down, causing voltages to
drop and thus the whole system freezes.
While the AXP209 does have the ability to ramp up the voltage slowly, to
reduce these inrush currents, the voltage rate control (VRC) however is
not applicable when switching on the LDO3 output. Only when going from
an enabled lower voltage setting, to a higher voltage setting is the VRC
in effect.
To work around this problem, we set LDO3 to the lowest possible setting
of 0.7 V if it was not yet enabled, and then let the VRC (if enabled) do
its thing. It should be noted, that for some undocumented reason, there
is a short delay needed between setting the LDO3 voltage register and
enabling the power. One would expect that this delay ought to be just
after enabling the output power at 0.7 V, but this did not work.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
The AXP209 LDO3 regulator supports voltage rate control, or can set a
slew rate.
This allows for the power to gradually rise up to the desired voltage,
instead of spiking up as fast as possible. Reason to have this can be
to reduce the inrush currents for example.
There are 3 slopes to choose from, the default, 'none' is a voltage rise
of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.
In ideal world (where vendors follow the recommended design guidelines)
this setting should not be enabled by default. Unless of course AXP209
crashes instead of reporting overcurrent condition as it normally should
do in this case.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
The AXP209 has a few 'magisc-ish' values that are better served with
clear defines.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Use a define for the chip version mask on the axp209.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is
needed to move AM57xx to DM_USB.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
