Commit graph

74928 commits

Author SHA1 Message Date
Masahisa Kojima
fdff03e5b3 efi_loader: add ExitBootServices() measurement
TCG PC Client PFP spec requires to measure
"Exit Boot Services Invocation" if ExitBootServices() is invoked.
Depending upon the return code from the ExitBootServices() call,
"Exit Boot Services Returned with Success" or "Exit Boot Services
Returned with Failure" is also measured.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>

Swap two ifs in efi_exit_boot_services().
efi_tcg2_notify_exit_boot_services must have EFIAPI signature.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14 20:54:41 +02:00
Masahisa Kojima
8fc4e0b427 efi_loader: add boot variable measurement
TCG PC Client PFP spec requires to measure "Boot####"
and "BootOrder" variables, EV_SEPARATOR event prior
to the Ready to Boot invocation.
Since u-boot does not implement Ready to Boot event,
these measurements are performed when efi_start_image() is called.

TCG spec also requires to measure "Calling EFI Application from
Boot Option" for each boot attempt, and "Returning from EFI
Application from Boot Option" if a boot device returns control
back to the Boot Manager.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2021-08-14 20:54:41 +02:00
Masahisa Kojima
cfbcf054a3 efi_loader: add secure boot variable measurement
TCG PC Client PFP spec requires to measure the secure
boot policy before validating the UEFI image.
This commit adds the secure boot variable measurement
of "SecureBoot", "PK", "KEK", "db", "dbx", "dbt", and "dbr".

Note that this implementation assumes that secure boot
variables are pre-configured and not be set/updated in runtime.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2021-08-14 20:54:41 +02:00
Heinrich Schuchardt
17a50bd689 efi_loader: add Linux magic to RISC-V crt0
Add the Linux magic to the EFI file header to allow running our test
programs with GRUB's linux command.

MajorImageVersion = 1 indicates a kernel that can consume the
EFI_LOAD_FILE2_PROTOCOL. This allows to dump the GRUB provided intird with
our initrddump.efi tool.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14 20:54:41 +02:00
Heinrich Schuchardt
148ce20520 efi_loader: Uri() device path node
iPXE used Uri() device path nodes. So we should support them in the
device path to text protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14 20:54:41 +02:00
Patrick Delaunay
551a959a8c doc: stm32mp1: add page for device tree bindings
With device tree binding migration to yaml it is difficult to synchronize
the binding from Linux kernel to U-Boot.

Instead of maintaining the same dt bindings, this patch adds in the U-Boot
documentation the path to the device tree bindings in Linux kernel for
STMicroelectronics devices, when they are used without modification.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>

Add links for referenced text files.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14 20:54:41 +02:00
Simon Glass
6a055c0f91 doc: Add a note about why devicetree is used
This question comes up every now and then with people coming from Linux.
Add some notes about it so we can point to it in the mailing list.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14 20:54:41 +02:00
Simon Glass
5edf62c300 doc: Update devicedocs including how to add tweaks
This file is about 10 years old and the updates have not covered
everything that has changed, particularly in the last few years. Update
the information and add mention of the u-boot.dtsi files.

Signed-off-by: Simon Glass <sjg@chromium.org>

Fix typos.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14 20:54:41 +02:00
Simon Glass
3e9fddfc4f doc: Move devicetree control doc to rST
Move this to rST format, largely unchanged to start with. Add an index
for this topic, as well as an empty intro.

Note this patch does not include updates! Is it just a conversion to the
new format. See the next patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchart <xypron.glpk@gmx.de>
2021-08-14 20:54:41 +02:00
Heinrich Schuchardt
00e80da9f5 doc: fix Latex margins
Adjust the Latex formatting to match Linux v5.13.1:

* add Latex margins
* reformat the code in doc/conf.py to match Linux

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14 20:54:41 +02:00
Heinrich Schuchardt
b2a1d6b2c4 doc: require Sphinx 2.4.4
Require Sphinx 2.44 to build the documentation.
Remove all code related to earlier versions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14 20:54:41 +02:00
Heinrich Schuchardt
5f6efc35c1 doc: add pkg-config to the build dependencies
tools/Makefile uses pkg-config.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-14 20:54:40 +02:00
Tom Rini
85ccbf666e Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- Enable SeaBIOS support for Crown Bay
- Update SeaBIOS build instructions in the x86 doc
- Enable CONFIG_SPI_FLASH_SMART_HWCAPS for Crown Bay
2021-08-13 08:37:47 -04:00
Bin Meng
cedd754484 x86: crownbay: Enable CONFIG_SPI_FLASH_SMART_HWCAPS
Now that the spi-nor fix has been made in u-boot/master via:

  commit 87e7219f9c ("mtd: spi-nor: Respect flash's hwcaps in spi_nor_adjust_hwcaps()")

enable CONFIG_SPI_FLASH_SMART_HWCAPS on Intel Crown Bay again.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-13 08:53:49 +08:00
Bin Meng
85c052cc48 doc: x86: Update SeaBIOS build instructions
Update SeaBIOS build instructions using exact command that involves
"make olddefconfig", and mention SeaBIOS release 1.14.0 has been
used for testing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-13 08:53:49 +08:00
Bin Meng
a7cb24f774 x86: crownbay: Enable SeaBIOS support
Enable SeaBIOS support for any kernel that requires legacy BIOS
services.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-13 08:53:49 +08:00
Tom Rini
0704305528 Merge tag 'u-boot-rockchip-20210812' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add Rockchip SFC driver support;
- DTS sync from kernel;
- emmc hs400 support for rk3399;
- Fix for spinore bootdevice and MMC boot order;
2021-08-12 09:33:39 -04:00
Jon Lin
60df49d22d rockchip: px30: Support configure SFC
Make px30 SFC clock configurable

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:11 +08:00
Chris Morgan
d70c0cab8f rockchip: px30: add support for SFC for Odroid Go Advance
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an
XT25F128B SPI NOR flash chip. This adds support for both. Note that
while both the controller and chip support quad mode, only two lines
are connected to the chip. Changing the pinctrl to bus2 and setting tx
and rx lines to 2 for this reason.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:11 +08:00
Chris Morgan
674a948309 mtd: spi-nor-ids: Add XTX XT25F128B
Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
this chip uses a continuation code which I cannot seem to parse, so
there are possibly going to be collisions with chips that use the same
manufacturer/ID.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:11 +08:00
Chris Morgan
08b097c32f rockchip: px30: add the serial flash controller
Add the serial flash controller to the devicetree for the PX30.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:11 +08:00
Chris Morgan
6633b4d837 rockchip: px30: Add support for using SFC
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:11 +08:00
Chris Morgan
3fb08a2138 spi: rockchip_sfc: add support for Rockchip SFC
This patch adds support for the Rockchip serial flash controller
found on the PX30 SoC. It should work for versions 3-5 of the SFC
IP, however I am only able to test it on v3.

This is adapted from the WIP SPI-MEM driver for the SFC on mainline
Linux. Note that the main difference between this and earlier versions
of the driver is that this one does not support DMA. In testing
the performance difference (performing a dual mode read on a 128Mb
chip) is negligible. DMA, if used, must also be disabled in SPL
mode when using A-TF anyway.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:11 +08:00
Johan Gunnarsson
475bb949ed rockchip: Fix u-boot-rockchip.bin build
Currently there are a few arm32 rockchip board configs that don't
generate u-boot-rockchip.bin when running make because CONFIG_BINMAN
is not enabled. This patch changes CONFIG_ARCH_ROCKCHIP to also select
CONFIG_BINMAN if CONFIG_SPL and !CONFIG_ARM64.

Example builds that don't generate u-boot-rockchip.bin without this
patch:

export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make kylin-rk3036_defconfig
make

export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make rock_defconfig
make

export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make tinker-rk3288_defconfig
make

Signed-off-by: Johan Gunnarsson <johan.gunnarsson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:07 +08:00
Peter Robinson
100583473c arm: dts: sync the Rockhip 3368 SoCs from Linux
Sync the rk3368 DTs and associated bits from 5.14-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:33:13 +08:00
Peter Robinson
27e1b5ee9b arm: dts: sync the Rockhip 3328 SoCs from Linux
Sync the rk3328 DTs and associated bits from 5.14-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:33:13 +08:00
Peter Robinson
822556a934 arm: dts: sync the Rockhip 3399 SoCs from Linux
Sync the rk3399 DTs and associated bits from 5.14-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
(Remove the conflict content for vmarc-som)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:33:13 +08:00
Tom Rini
a25277122d Merge https://source.denx.de/u-boot/custodians/u-boot-cfi-flash
- Some CFI flash related fixups (Kconfig & header) (Bin)
- Enable CFI flash support on the QEMU RISC-V virt machine. (Bin)
2021-08-11 08:31:56 -04:00
Tom Rini
4dc1a5c248 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Convert GoFlex Home Ethernet and SATA to Driver Model (Tony)
- mvebu: Automatically detect CONFIG_SYS_TCLK (Pavel)
- mvebu: sata_mv: Fix HDD identication during cold start (Tony)
- a37xx: pci: Fix handling PIO config error responses (Pavel)
- Other minor misc changes and board maintainer updates
2021-08-11 08:31:25 -04:00
Tom Rini
aba3fa1d3f - odroid-n2: fix fdtfile suffix for n2-plus
- sei610 & meson64_android cleanups to prepare android 11 boot support
 - use Android BCB mechanism for reboot reason instead of HW reboot flag
 - Switch meson64_android boot flow to use abootimg for A/B, AVB and DTBO support
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmESPjcACgkQd9zb2sjI
 SdFabg/+K/5kH01N6etPpPgNH3DTns3Z7Uv16rawGaFJVj4V2O/Ak2vmhvjJA4df
 KvLJL3AVolMOfD4xTABRDyLKt3maCgIYkamdBWBV/xKCTKL7fvvqj8V1U5iUsGKm
 Wl2KbbDj+dGNF+IYO9V4T1D/JaRjAUk4YeztFEDaNdP3P1N+01v2FyfkadBL5un3
 dqwHb3DMNS2SyjnE3glTAs3g/+3nmrHhAHiVVZQlJHsijuup6f93e8huKQ4v1oFX
 xsNzeI9j6jGBvVI6hRsHNLOZzhj8/ZcSntdlL+b4FbY++KzrKidMgVECc486cc8t
 IEq/iJHggYhwRtw3EAYblmMVFiQeo07hgSbbSP8mIJWARtqh439tLUyKxW3y/5UT
 UlGLHcsSSwv/5NhY8ugGAYeaGGXNpMMc5ISbssnn5FB6VHSox4nRZai5U9jKoyc2
 iBNNdyLiLi/Fz9YMWj8SAibajT8bchWu1qW2n85nFb3xWQpXcbjzlglnLY6bX3TQ
 1d5ehInNK8deptHNh2eGBsPKOUJ/gDTvEey+6J517hbJ59My96v+dvmbtG7kH9Z8
 157KQzjvHH4X9MDW8wYb381TV8kcNi3b16QPP2RKxuK1Zrve0RLPhOAz/YeSkTDN
 mavHlaY7JvUXjAct0K5VXHvA9U6DBrvc3eb7KoXL4b4+SHr/4UQ=
 =RZ8+
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20210810' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- odroid-n2: fix fdtfile suffix for n2-plus
- sei610 & meson64_android cleanups to prepare android 11 boot support
- use Android BCB mechanism for reboot reason instead of HW reboot flag
- Switch meson64_android boot flow to use abootimg for A/B, AVB and DTBO support
2021-08-11 08:31:13 -04:00
Xiaobo Tian
09cf012467 arm64: rk3399: r4s: Remove undesirable MAC address fetching methods for ethernet
Remove the recommended MAC address from the network card.
NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which stores the MAC address.

Signed-off-by: Xiaobo Tian <peterwillcn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 18:10:39 +08:00
Xiaobo Tian
897f30e84a arm64: rk3399: r4s: Inheritance uses the sdmmc definition in dtsi
The host-index-min property is invalid,
so it inherits from the sdmmc definition in dtsi.

Signed-off-by: Xiaobo Tian <peterwillcn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 18:10:39 +08:00
Xiaobo Tian
2ae7dacfaf arm64: rk3399: r4s: correct the LEDS label name
Correct the LEDS label name and remove the board type prefix,
which is actually unnecessary here, removes the redefined system status LED pin.

Signed-off-by: Xiaobo Tian <peterwillcn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 18:10:39 +08:00
Yifeng Zhao
4473a1c4d6 rockchip: config: evb-rk3399: add hs400 and SDMA support
This enable hs400 and SDMA support for emmc on evb-rk3399.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 18:02:07 +08:00
Yifeng Zhao
a63a57e59d mmc: rockchip_sdhci: Add support for RK3568
This patch adds support for the RK3568 platform to this driver.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 18:02:07 +08:00
Yifeng Zhao
ac804143cf mmc: rockchip_sdhci: add phy and clock config for rk3399
Add clock, phy and other configuration, it is convenient to support
new controller. Here a short summary of the changes:
- Add mmc_of_parse to parse dts config.
- Remove OF_PLATDATA related code.
- Reorder header inclusion.
- Add phy ops.
- add ops set_ios_post to modify the parameters of phy when the
  clock changes.
- Add execute tuning api for hs200 tuning.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 18:02:07 +08:00
Johan Jonker
d2a74ec91b ARM: dts: rockchip: update rk3188-radxarock.dts
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently
had some updates.
For a future rk3066 support in U-boot this file must also update.
Move U-boot specific things in a rk3188-radxarock-u-boot.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 17:54:37 +08:00
Johan Jonker
7d4b5a850e ARM: dts: rockchip: update rk3188.dtsi
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently
had some updates.
For a future rk3066 support in U-boot this file must also update.
Move U-boot specific things in a rk3188-u-boot.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 17:54:37 +08:00
Johan Jonker
76dccdca2e rockchip: rk3188-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3188
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 17:54:37 +08:00
Johan Jonker
2ee023d293 ARM: dts: rockchip: update rk3xxx.dtsi
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. This file has recently had some updates.
For a future rk3066 support in U-boot this file must also update.
Move U-boot specific things in a rk3xxx-u-boot.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 17:54:37 +08:00
Johan Jonker
571f679d1a rockchip: rk3188-cru-common: sync clock dt-binding header from Linux
In order to update the DT for rk3066 and rk3188
sync the clock dt-binding header.
This is the state as of v5.12 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 17:54:37 +08:00
Artem Lapkin
e8a663cc60 rk3399: boot_devices fix spinor node name
Problem: board_spl_was_booted_from return wrong boot_devices[3] value
/spi@ff1d0000 and same-as-spl dont work properly for SPINOR flash
because arch/arm/mach-rockchip/spl-boot-order.c spl_node_to_boot_device
need parse SPINOR flash node as UCLASS_SPI_FLASH

spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ...
/spi@ff1d0000 > board_boot_order: could not map node @618 to a boot-device
/sdhci@fe330000 > /mmc@fe320000

Solution: just change it to /spi@ff1d0000/flash@0

spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ...
/spi@ff1d0000/flash@0 > /sdhci@fe330000 > /mmc@fe320000

Signed-off-by: Artem Lapkin <art@khadas.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 17:54:20 +08:00
Alex Bee
b212ad24a6 rockchip: Fix MMC boot order
Basically all, i.e. rk3036.dtsi, rk3128.dtsi, rk3xxx.dtsi, rk322x.dtsi,
rk3288.dtsi, rk3308-u-boot.dtsi, rk3328-u-boot.dtsi, rk3399-u-boot.dtsi
and px30-u-boot.dtsi Rockchip SoC devicetrees which have mmc indexes
are defining eMMC as mmc0 and sdmmc as mmc1.
This means that the rule to try to boot from the SD card first is ignored,
which as per comment is what we want and is important for distros, which
rely on that.

Fix this by setting the correct mmc index, i.e. first from mmc1 (SD card),
second from mmc0 (eMMC).

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-11 17:44:01 +08:00
Bin Meng
d248627f9d riscv: qemu: Enable MTD NOR flash support
Enable support to the 2 NOR flashes on the QEMU RISC-V virt machine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11 10:36:10 +02:00
Bin Meng
74773a4f85 flash.h: Remove CONFIG_SYS_FLASH_CFI from flash_info_t
Those embers wrapped with CONFIG_SYS_FLASH_CFI in struct flash_info_t
are unconditionally used in the cfi_flash.c driver.

Drop the #ifdefs in the definition of flash_info_t.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11 10:36:10 +02:00
Bin Meng
8fff9e335d mtd: kconfig: Fix CFI_FLASH dependency
The DM version CFI flash driver is in driver/mtd/cfi_flash.c, which
only gets built when FLASH_CFI_DRIVER is on. If CFI_FLASH is on but
FLASH_CFI_DRIVER is not, nothing is enabled at all.

Fix this dependency by selecting FLASH_CFI_DRIVER when CFI_FLASH is
enabled.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11 10:36:10 +02:00
Tony Dinh
e21c74f24b arm: kirkwood: Goflex Home: Update board maintainer
Change maintainer to me. Suriyan no longer has this board and wishes
to see someone maintaining it actively.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11 08:42:26 +02:00
Tony Dinh
9176f4fa98 arm: kirkwood: Dockstar: Update board maintainer
Change maintainer to me. Eric no longer has this board and wishes
to see someone maintaining it actively.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11 08:42:26 +02:00
Pali Rohár
7e1c0d0dca arm: mvebu: Hang if ddr3_init() fails
If ddr3_init() fails then DDR was not initialized and we cannot load and
execute U-Boot. We cannot continue, we cannot do anything in this case, so
hang.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11 08:42:26 +02:00
Pali Rohár
4cd61c43fd arm: a37xx: pci: Fix handling PIO config error responses
Returning fabricated CRS value (0xFFFF0001) by PCIe Root Complex to OS is
allowed only for 4-byte PCI_VENDOR_ID config read request and only when
CRSSVE bit in Root Port PCIe device is enabled. In all other error PCIe
Root Complex must return all-ones.

So implement this logic in pci-aardvark.c driver properly.

aardvark HW does not have Root Port PCIe device and U-Boot does not
implement emulation of this device. So expect that CRSSVE bit is set as
U-Boot can already handle CRS value for PCI_VENDOR_ID config read request.

More callers of pci_bus_read_config() function in U-Boot do not check for
return value, but check readback value. Therefore always fill readback
value in pcie_advk_read_config() function. On error fill all-ones of
correct size as it is required for PCIe Root Complex.

And also correctly propagates error from failed config write request to
return value of pcie_advk_write_config() function. Most U-Boot callers
ignores this return value, but it is a good idea to return correct value
from function.

These issues about return value of failed config read requests, including
special handling of CRS were reported by Lorenzo and Bjorn for Linux kernel
driver pci-aardvark together with quotes from PCIe r4.0 spec, see details:
https://lore.kernel.org/linux-pci/20210624213345.3617-1-pali@kernel.org/t/#u

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11 08:42:26 +02:00