Commit graph

9147 commits

Author SHA1 Message Date
Tom Rini
76c61f29d6 Merge tag 'fsl-qoriq-2023-7-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
Enable DM Serial for ls1043ardb and ls1046ardb/afrwy
Fixed secure boot on LS-CH2 platforms
2023-07-09 21:54:40 -04:00
Michal Simek
99a0532a2d sysreset: Change Kconfig GPIO dependency
DM_GPIO depends on GPIO to be enabled but select will cause that DM_GPIO is
selected without GPIO which ends up in compilation error:
undefined reference to `dm_gpio_set_value'
undefined reference to `dm_gpio_get_value'
undefined reference to `dm_gpio_free'
undefined reference to `gpio_request_by_name'

Signed-off-by: Michal Simek <michal.simek@amd.com>
[trini: Fix configs which had relied on these select's]
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-07 16:47:15 -04:00
Conor Dooley
5566cf2a6d riscv: dts: drop microchip from dts filenames
The original names picked for the DT doesn't match Linux's naming scheme
and it was renamed there a while ago. Rename it in U-Boot to allow
easily syncing dts between the two projects.

Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-06 17:28:08 +08:00
Camelia Groza
44231a24d4 configs: ls1046afrwy: enable DM_SERIAL
As the serial devices are configured in the device tree, enable
DM_SERIAL in the ls1046afrwy defconfigs.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-07-06 13:04:55 +08:00
Camelia Groza
818cbd8ebb configs: ls1046ardb: enable DM_SERIAL
As the serial devices are configured in the device tree, enable
DM_SERIAL in the ls1046ardb defconfigs.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-07-06 13:04:55 +08:00
Camelia Groza
3240f090fd configs: ls1043ardb: enable DM_SERIAL
As the serial devices are configured in the device tree, enable
DM_SERIAL in the ls1043ardb defconfigs.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-07-06 13:04:55 +08:00
Tom Rini
e80f4079b3 Prepare v2023.07-rc6
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Merge tag 'v2023.07-rc6' into next

Prepare v2023.07-rc6
2023-07-05 11:28:55 -04:00
Jonas Karlman
e37650846f rockchip: Restore support for boot scripts in legacy image format
Use of CONFIG_SPL_FIT_SIGNATURE=y cause CONFIG_LEGACY_IMAGE_FORMAT=n as
default, this prevent boot scripts in legacy image format from working
and was an unintended change in the listed fixes commits:

  Wrong image format for "source" command

Add CONFIG_LEGACY_IMAGE_FORMAT=y to defconfig for affected boards to
restore support for boot scripts in legacy image format.

Fixes: 3bf8e40807 ("board: rockchip: add Radxa ROCK5B Rk3588 board")
Fixes: cf777572ca ("rockchip: rockpro64: Use SDMA to boost eMMC performance")
Fixes: 6e2b8344d6 ("rockchip: rock-pi-4: Use SDMA to boost eMMC performance")
Fixes: 1bf49d5a4a ("rockchip: rk3566-radxa-cm3-io: Update defconfig")
Fixes: 703c170b40 ("rockchip: rk3568-evb: Update defconfig")
Fixes: 68000f750a ("rockchip: rk3568-rock-3a: Update defconfig")
Fixes: 6fb02589a6 ("rockchip: rk3588-evb: Update defconfig")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-07-03 10:20:13 -04:00
Ken Sloat
dbdf4a06ec board: freescale: imx93_evk: Fix MMC environment offset boot conflict.
Currently, the imx93_evk is configured with CONFIG_ENV_IS_IN_MMC and the
chosen environment offset in the config is 0x400000. Unless the user
programs the associated fuses, this offset is the default secondary boot
image offset used by the i.MX 93 ROM bootloader. With certain
combinations of environmental variables, the CRC and beginning of the
environment can potentially falsely appear as a valid boot image
container header. If the expected "sw_version" offset within this
mistaken boot image container is greater than the primary's, the ROM
bootloader can skip booting of the primary image altogether and attempt
to boot with the content of the environment data. This will then hang
the system.

To fix this, move the environment from 0x400000 to 0x700000 reserving up
to 3 MB at 0x400000 for any actual secondary user image container.

Signed-off-by: Ken Sloat <ken.s@variscite.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-06-29 09:55:45 -04:00
Ferass El Hafidi
48132951c9 boards: amlogic: add KII Pro defconfig
Add configurations for the Videostrong KII Pro set-top box.
This defconfig is cloned from the WeTek Play2's.

Signed-off-by: Ferass El Hafidi <vitali64pmemail@protonmail.com>
Link: https://lore.kernel.org/r/20230507124109.31778-3-vitali64pmemail@protonmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28 10:05:34 +02:00
Igor Prusov
1f0d2e870d board: amlogic: add support for AD401 board
The AD401 board is the Amlogic A1 SoC reference board

Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230505125639.3605-6-ivprusov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28 10:05:34 +02:00
Tom Rini
9c08294424 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-26 11:43:56 -04:00
Eduard Strehlau
4347dec6b2 smegw01: Fix duplicate bootcmd
Two conflicting bootcmds were included in the environment.
Streamline to defining the bootcmd only in the env file.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-06-26 11:30:22 -04:00
Marek Vasut
ae3e3fa570 ARM: at91: Switch sama5d2_icp_mmc to simple malloc in SPL
To avoid SRAM overflow in the SPL build, use simple malloc implementation.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-06-24 13:46:57 -04:00
Vignesh Raghavendra
1b086da5cd configs: am64x_evm_*_defconfig: Enable High Secure device support
Enable CONFIG_TI_SECURE_DEVICE to support booting High Secure(HS)
variants of AM64x SoC.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-20 16:08:13 -04:00
Masahisa Kojima
7f8062b7e5 configs: synquacer: increase SYS_MALLOC_F_LEN
DM_FLAG_PRE_RELOC flag is added into some drivers
by recent commits such as
1bd790bc4b ("firmware: psci: enable DM_FLAG_PRE_RELOC").
Current SYS_MALLOC_F_LEN of SynQuacer Developerbox platform
is too small, Developerbox will not boot due to lack of
heap memory.

This commit increases the size of heap memory.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-20 16:08:13 -04:00
Rui Miguel Silva
3e41ebaa46 corstone1000: add nvmxip, fwu-mdata and gpt options
Enable the newest features: nvmxip, fwu-metadata and
gpt. Commands to print the partition info, gpt info
and fwu metadata will be available.

Adjust also env boot script the address of the
bootbank with the new gpt layout, and also remove
the not needed kernel address bank0 and bank1
and retrieve function that would test the bank flag
before and now we are getting the info from the fwu
metadata.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19 14:34:16 -04:00
Rui Miguel Silva
17c744c3ea corstone1000: set kernel_addr based on boot_idx
We need to distinguish between boot banks and from which
partition to load the kernel+initramfs to memory.

For that, fetch the boot index, fetch the correspondent
partition, calculate the correct kernel address and
then set the env variable kernel_addr with that value.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19 14:34:16 -04:00
Patrick Delaunay
2df7fc0824 configs: stm32mp1: reduce DDR_CACHEABLE_SIZE to supported 256MB DDR
Reduces the CONFIG_DDR_CACHEABLE_SIZE, the size of DDR mapped cacheable
before relocation, to support DDR with only 256MB because the OP-TEE
reserved memory is located at end of the DDR.

By default the new size of 128MB cacheable memory is enough
in dram_bank_mmu_setup() for early_enable_caches() in arch_cpu_init()
and is correct for DDR size = 256MB.

After relocation the real size of DDR, excluding the no-map reserved
memory, is used after the U-Boot device tree parsing.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:16:31 +02:00
Tom Rini
2d158d3c38 ARM: stm32: Fix OF_LIST on DHCOR
The ITS file used to build the images here lists three dtb files as
being used. Today, these are built by the logic that will over-build dtb
files based on SOC/etc symbols being set. To future proof this platform
and be generally correct, we list all 3 of the device trees used here in
OF_LIST.

Cc: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16 11:12:06 +02:00
Patrick Delaunay
d3126a3293 config: stm32mp15: remove CONFIG_FASTBOOT_CMD_OEM_FORMAT
Remove the support of the fastboot "oem format" command for STM32MP15x
boards and removed the associated env variable "partitions".
This command is not required; with fastboot tool, the GPT partition can
be handle with "flash" command in "gpt" target (=CONFIG_FASTBOOT_GPT_NAME),
for example: fastboot flash gpt gpt.bin

This patch avoids to define the GPT partitioning in U-Boot environment,
which is incompatible with planned modifications, for example to
support TF-A firmware update.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:05:15 +02:00
Patrick Delaunay
30a93729bb config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV
The CONFIG_FASTBOOT_USB_DEV is used to select USB OTG controller other
than 0 but it is not the case for STM32MP15 boards; it can be removed
to simplify the STM32MP15 defconfig files.

On STM32MP15x boards, we have only one USB device with instance 0,
so the device is hardcoded arch/arm/mach-stm32mp/cpu.c with
the command "fastboot 0" and this define is not used in config files
(include/configs/stm32mp15_st_common.h).

Fixes: 4633fd51c5 ("stm32mp1: activate FASTBOOT on eMMC")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:05:15 +02:00
Patrick Delaunay
90f992e6a5 arm: dts: stm32: Add partitions in flash0 and nand node for stm32mp15xx-dhcom/dhcor
Add partitions subnode in flash0 for stm32mp157xx-dhcom/dhcor boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:01:16 +02:00
Patrice Chotard
df197e2aa0 configs: stm32mp1: disable CMD_MTDPARTS
Disable CMD_MTDPARTS as it's no more needed and it is strongly
encouraged to avoid using this command anymore.
(see comments in ./cmd/Kconfig:2422).

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:01:16 +02:00
Patrick Delaunay
8a8efacf5f board: stm32mp1: use fdt_copy_fixed_partitions
Copy the fixed partition nodes from U-Boot device tree to Linux kernel
device tree to dynamically configure the MTD partitions.

fdt_copy_fixed_partitions is only based on device tree
and replace the function fdt_fixup_mtdparts based on mtdparts variable;
the variable mtdid and mtdparts are not more required.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:01:16 +02:00
Patrice Chotard
6cf8888541 configs: stm32mp: Disable SYS_MTDPARTS_RUNTIME for stm32mp15 and stm32mp13
As we don't use anymore MTDPARTS_xx Kconfig variables
(MTDPARTS_NAND0_BOOT, MTDPARTS_NOR0_BOOT...),
disable SYS_MTDPARTS_RUNTIME.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:01:16 +02:00
Patrice Chotard
e91d3c6176 arm: dts: stm32: Add partitions in flash0 and nand node for stm32mp15xx-ev1
Add partitions subnode in flash0 and nand nodes for all stm32mp157xx-ev1
boards. Update only the file stm32mp157c-ev1-*u-boot.dtsi, included by
other files  stm32mp15*-ev1-*-u-boot.dtsi.

For SCMI variant of device tree used with stm32mp15_defconfig
add partitions needed by TF-A firmware update:
- metadata to save the TF-A information: 2 copy
- fip-a / fip-b: two FIP slots, used for system A/B (seamless) update
- the previous "fsbl" partition with 2 copy of TFA is replaced
  by 2 partitions (only one copy in each MTD partition) to simplify
  the update: no need to managed this copy on update, need to update the
  two partition (skip bad block for NAND)
The offset for ENV partition are also updated in stm32mp15_defconfig

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:01:16 +02:00
Camelia Groza
b824212dc2 configs: ls1046afrwy: enable DM_MDIO and DM_CMD
With DM_ETH configured by default, complete the Ethernet enablement for
LS1046AFRWY by activating DM_MDIO.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-15 17:58:53 +08:00
Peter Robinson
70ca9f62f3 rockchip: Pinephone Pro: Add DDR RAM type config
Add the RAM_ROCKCHIP_LPDDR4 to fix the Pinephone Pro booting.
When the configs were updated in 26f92be07e it somehow broke
the PPP boot process so let's fix it.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
CC: Jagan Teki <jagan@edgeble.ai>
CC: Kever Yang <kever.yang@rock-chips.com>
2023-06-14 15:48:45 -04:00
Tom Rini
260d4962e0 Merge tag v2023.07-rc4 into next
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-12 14:55:33 -04:00
Marek Vasut
32d2461e04 ARM: renesas: Enable DM_ETH_PHY and SMSC PHY driver
The board comes with SMSC LAN8710A PHY, enable matching driver.
Enable DM_ETH_PHY in the process to start using DM drivers more.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
2023-06-10 13:34:06 +02:00
Jassi Brar
6b403ca4dc fwu: DeveloperBox: add support for FWU
Add code to support FWU_MULTI_BANK_UPDATE.
The platform does not have gpt-partition storage for
Banks and MetaData, rather it used SPI-NOR backed
mtd regions for the purpose.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00
Jassi Brar
87f397e58e config: developerbox: move to new flash layout and boot flow
Towards enabling FWU and supporting new firmware layout in NOR flash,
make u-boot PIC and adjust uboot env offset in flash.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00
Valentine Barshak
ed2f65f010 ARM: renesas: Add R8A77980 V3HSK board and CPLD code
Add board code for the R8A77980 V3HSK board.
Add CPLD sysreset driver to the R-Car V3H SK board.
Extracted from a larger patch by Valentine Barshak.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync configs and board code with V3H Condor, squash CPLD driver in]
2023-06-08 22:26:52 +02:00
Valentine Barshak
5f4e26964c ARM: renesas: Add R8A77970 V3MSK board and CPLD code
Add board code for the R8A77970 V3MSK board.
Add CPLD sysreset driver to the R-Car V3M SK board.
Extracted from a larger patch by Valentine Barshak.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync configs and board code with V3M Eagle, squash CPLD driver in]
2023-06-08 22:26:52 +02:00
Andre Przywara
b0816e3bd3 sunxi: defconfig: Add Lctech Pi F1C200s board
The Lctech Pi F1C200s (also previously known under the Cherry Pi brand)
is a small development board with the Allwinner F1C200s SoC. This is the
same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM.

Add a defconfig for this board, enabling the most basic features. This
uses the new 64MB memory map, which avoids the very tight memory map we
use for the 32MB F1C100s board(s).
The devicetree file is already in the tree, courtesy of the previous
Linux repo sync.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-06-07 22:44:40 +01:00
Yegor Yefremov
e0feee58ac arm: baltos: switch to CONFIG_DM_I2C
Also use the TPS65910 driver directly.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2023-06-01 12:40:16 -04:00
Udit Kumar
0eade94f80 configs: j7200: correct mmc offset
This patch corrects the MMC raw mode sector offset.

Current allocated size for tiboot3 is 1MB and 2MB for tispl.

Without this correct offset eMMC boot will fail.

Fixes: f8c1e893c8 (configs: j7200_evm_a72: Add Initial suppot)
Fixes: 02dff65efe (configs: j7200_evm_r5: Add initial support)
Fixes: 360c7f46f3 (configs: Add configs for J7200 High Security EVM)

Way to test with eMMC boot from boot0/1 partition
Boot with SD card, copy images to eMMC boot0 or boot1 partition

=> mmc dev 0 (1 or 2)
=> fatload mmc 1 ${loadaddr} tiboot3.bin
=> mmc write ${loadaddr} 0x0 0x800
=> fatload mmc 1 ${loadaddr} tispl.bin
=> mmc write ${loadaddr} 0x800 0x1000
=> fatload mmc 1 ${loadaddr} u-boot.img
=> mmc write ${loadaddr} 0x1800 0x2000
=> mmc partconf 0 1 (1 or 2) 1
=> mmc bootbus 0 2 0 0

Cc: Bhavya Kapoor <b-kapoor@ti.com>
Cc: Diwakar Dhyani <d-dhyani@ti.com>
Cc: KEERTHY <j-keerthy@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
2023-06-01 12:32:04 -04:00
Vignesh Raghavendra
703da6d707 configs: am62ax_evm_a53_defconfig: Enable YMODEM support at A53 SPL
This is required for UART boot flow where u-boot.img needs to be
downloaded via YMODEM.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-06-01 12:32:03 -04:00
Tom Rini
41e289bb1f arm: Remove ti816x_evm board and ti816x SoC support
This platform is currently unmaintained and untested, so remove it.
Further, as it is the only TI816X SoC example, remove related files as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-31 10:11:46 -04:00
Manorit Chawdhry
6cfdf8270e Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region
In non-combined boot flow for K3, all the firewalls are locked by default
until sysfw comes up. Rom configures some of the firewall for its usage
along with the SRAM for R5 but the PSRAM region is still locked.

The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the
firewall exception before sysfw came up. The exception started happening
after adding multi dtb support that accesses the scratchpad for reading
EEPROM contents.

The commit changes R5 MCU scratchpad for j721e to an SRAM region.

Old Map:
┌─────────────────────────────────────┐ 0x41c00000
│                 SPL                 │
├─────────────────────────────────────┤ 0x41c40000 (approx)
│                STACK                │
├─────────────────────────────────────┤ 0x41c85b20
│             Global data             │
│  sizeof(struct global_data) = 0xd8  │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc
│                HEAP                 │
│  CONFIG_SYS_MALLOC_F_LEN = 0x70000  │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│               SPL BSS               │ (0x41cf5bfc)
│  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
			                (0x41cffbfc)

New Map:
┌─────────────────────────────────────┐ 0x41c00000
│                 SPL                 │
├─────────────────────────────────────┤ 0x41c40000 (approx)
│                EMPTY                │
├─────────────────────────────────────┤ 0x41c81920
│                STACK                │
│ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │
├─────────────────────────────────────┤ 0x41c85920
│             Global data             │
│  sizeof(struct global_data) = 0xd8  │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0
│                HEAP                 │
│  CONFIG_SYS_MALLOC_F_LEN = 0x70000  │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│               SPL BSS               │ (0x41cf59f0)
│  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
├─────────────────────────────────────┤ 0x41cff9fc
│         NEW MCU SCRATCHPAD          │
│  SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
			                (0x41cffbfc)

Fixes: ab977c8b91 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT")

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
[n-francis@ti.com: SRAM allocation addressing diagram]
Signed-off-by: Neha Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-30 15:13:43 -04:00
Manorit Chawdhry
8b07082607 configs: j721e: Merge the HS and non-HS defconfigs
K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-30 15:13:43 -04:00
Tom Rini
c90e18932b configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-29 10:43:26 -04:00
Tom Rini
6dcee70692 u-boot-imx-20230525
-------------------
 
 - i.MX93 series
 - Fixes
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
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Merge tag 'u-boot-imx-20230525' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20230525
-------------------

- i.MX93 series
- Fixes

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
2023-05-25 14:27:39 -04:00
Peng Fan
ab2f54d211 imx9: imx93_evk: enable sysreset
Enable sysreset for i.MX93 EVK.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:41 +02:00
Peng Fan
54e9cee225 imx9: imx93_evk: Update spl stack & bss base address
As the ddr timing info will be saved at the last 16KB of
the OCRAM, spl stack & bss base should be updated to avoid
conflict.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:41 +02:00
Peng Fan
d59b9c38c2 imx9: imx93_evk: add low drive mode support on 11x11 EVK
Add a static u-boot config for i.MX93 low drive mode support. When
low drive mode is enabled, VDD_SOC is set to 0.75V. Bus clocks,
A55 core clock (900Mhz), DDR clock (1866MTS), and some peripherals
clocks (USDHC/FLEXSPI/PDM/DISP_PIX/CAM_PIX) must decrease to meet
max frequencies in low drive mode.

Also set standby voltage for buck1

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:41 +02:00
Peng Fan
33866e9409 imx9: imx93_evk: enable CONFIG_WDT
Without this config, there is boot error: Error binding ulp_wdt driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:40 +02:00
Peng Fan
cdb11eab1e imx9: imx93_evk: select IMX_TMU
Select thermal config to print current temperature

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:40 +02:00
Peng Fan
07d225c525 imx9: imx93_evk: enable CPU_IMX
select CONFIG_CPU_IMX to display cpu info

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:40 +02:00