Commit graph

200 commits

Author SHA1 Message Date
Wolfgang Denk
2f15278c2e Coding stylke cleanup; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-05-05 18:23:11 +02:00
Stefan Roese
bd38b7ecfd Merge with git://www.denx.de/git/u-boot.git 2007-04-29 16:40:31 +02:00
Matthias Fuchs
37ed6cdd41 ppc4xx: setup 440EPx/GRx ZMII/RGMII bridge depending on PFC register content.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-04-24 14:22:41 +02:00
Wolfgang Denk
43f6226db0 Merge with /home/wd/git/u-boot/custodian/u-boot-74xx-7xx 2007-04-18 17:00:09 +02:00
Stefan Roese
90e6f41cf0 ppc4xx: Add output for bootrom location to 405EZ ports
Now 405EZ ports also show upon bootup from which boot device
they are configured to boot:

U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05)

CPU:   AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz)
       Bootstrap Option E - Boot ROM Location EBC (32 bits)
       16 kB I-Cache 16 kB D-Cache
Board: Acadia - AMCC PPC405EZ Evaluation Board

Signed-off-by: Stefan Roese <sr@denx.de>
2007-04-18 12:05:59 +02:00
Jeffrey Mann
2ad3aba01d ppc4xx: Fix i2c divisor calcularion for PPC4xx
This patch fixes changes the i2c_init(...) function to use the function
get_OPB_freq() rather than calculating the OPB speed by
sysInfo.freqPLB/sysInfo.pllOpbDiv. The get_OPB_freq() function is
specific per processor. The prior method was not and so was calculating
the wrong speed for some PPC4xx processors.

Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-04-12 14:15:59 +02:00
Stefan Roese
cabee756a6 ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
Additional RAM information is now printed upon powerup, like
DDR2 frequency and CAS latency.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-31 13:15:06 +02:00
Stefan Roese
94f54703c3 ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
Fix a bug in the auto calibration routine. This driver now runs
more reliable with the tested modules. It's also tested with
167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-31 08:46:08 +02:00
Stefan Roese
e50b791b3f Merge with /home/stefan/git/u-boot/acadia 2007-03-24 15:59:23 +01:00
Stefan Roese
0d974d5297 [PATCH] Add 4xx GPIO functions
This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24 15:57:09 +01:00
Stefan Roese
3cb86f3e40 [PATCH] Clean up 40EZ/Acadia support
This patch cleans up all the open issue of the preliminary
Acadia support.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24 15:45:34 +01:00
Stefan Roese
fc1e45ce6e Merge with /home/stefan/git/u-boot/acadia 2007-03-21 14:38:25 +01:00
Stefan Roese
e01bd218b0 [PATCH] Add AMCC PPC405EZ support
This patch adds support for the new AMCC 405EZ PPC. It is in
preparation for the AMCC Acadia board support.

Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-21 13:38:59 +01:00
Matthias Fuchs
ced5b90290 [PATCH] 4xx: allow CONFIG_I2C_CMD_TREE without CONFIG_I2C_MULTI_BUS
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-03-08 22:17:04 +01:00
Wolfgang Denk
efa013df33 Merge with /home/git/u-boot 2007-03-08 11:41:19 +01:00
Wolfgang Denk
35ded29fd9 Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx 2007-03-08 11:38:58 +01:00
Wolfgang Denk
d8be57669b Merge with /home/git/u-boot 2007-03-08 11:34:24 +01:00
Stefan Roese
cd84528f20 Merge with /home/stefan/git/u-boot/yucca-ddr2 2007-03-08 10:32:45 +01:00
Stefan Roese
00cdb4ce5e [PATCH] Update AMCC Luan 440SP eval board support
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.

This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08 10:13:16 +01:00
Stefan Roese
df29449747 ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SP
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08 10:06:09 +01:00
Wolfgang Denk
46270c2851 Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx 2007-03-07 16:50:34 +01:00
Stefan Roese
e2ebe69681 [PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's
This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.

This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.

As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-07 16:39:36 +01:00
Wolfgang Denk
ad5bb451ad Restructure POST directory to support of other CPUs, boards, etc. 2007-03-06 18:08:43 +01:00
Wolfgang Denk
647d3c3eed Some code cleanup. 2007-03-04 01:36:05 +01:00
Stefan Roese
c8556d0e0b Merge with /home/stefan/git/u-boot/denx-merge-sr 2007-03-01 21:16:02 +01:00
Stefan Roese
ba58e4c9a9 [PATCH] Update AMCC Katmai 440SPe eval board support
This patch updates the recently added Katmai board support. The biggest
change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
driver.

Please note, that still some problems are left with some memory
configurations. See the driver for more details.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-01 21:11:36 +01:00
Wolfgang Denk
743571145b Minor code cleanup. 2007-02-27 14:26:04 +01:00
Stefan Roese
4745acaa1a [PATCH] Add support for the AMCC Katmai (440SPe) eval board
Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-20 10:57:08 +01:00
Stefan Roese
4037ed3b63 [PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support
This patch adds support for the DDR2 controller used on the
440SP and 440SPe. It is tested on the Katmai (440SPe) eval
board and works fine with the following DIMM modules:

- Corsair CM2X512-5400C4 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)

This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-20 10:43:34 +01:00
Stefan Roese
36d830c983 [PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 files
Since the existing 4xx SPD SDRAM initialization routines for the
405 SDRAM controller and the 440 DDR controller don't have much in
common this patch splits both drivers into different files.

This is in preparation for the 440 DDR2 controller support (440SP/e).

Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-20 10:35:42 +01:00
Stefan Roese
79b2d0bb2e [PATCH] PPC4xx: Add support for multiple I2C busses
This patch adds support for multiple I2C busses on the PPC4xx
platforms. Define CONFIG_I2C_MULTI_BUS in the board config file
to make use of this feature.

It also merges the 405 and 440 i2c header files into one common
file 4xx_i2c.h.

Also the 4xx i2c reset procedure is reworked since I experienced
some problems with the first access on the 440SPe Katmai board.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-20 10:27:08 +01:00
Stefan Roese
7372ca6822 [PATCH] Correctly display PCI arbiter en-/disabled on some 4xx boards
Previously the strapping DCR/SDR was read to determine if the internal PCI
arbiter is enabled or not. This strapping bit can be overridden, so now
the current status is read from the correct DCR/SDR register.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-02 12:44:22 +01:00
Stefan Roese
2902fadade [PATCH] Update 440EPx/440GRx cpu detection
Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-31 16:56:10 +01:00
Wolfgang Denk
15e5025a73 Merge with /home/hs/SC3/u-boot-dev 2007-01-19 12:06:32 +01:00
Heiko Schocher
cb4820725e [PATCH] Fix: Compilerwarnings for SC3 board.
The EBC Configuration Register is now by CFG_EBC_CFG definable
             Added JFFS2 support for the SC3 board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2007-01-18 11:28:51 +01:00
Stefan Roese
5fb692cae5 [PATCH] Add support for AMCC Taishan PPC440GX eval board
Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-18 10:25:34 +01:00
Wolfgang Denk
f11033e739 Merge with /home/hs/SC3/u-boot
Some code cleanup.
2007-01-15 13:41:04 +01:00
Stefan Roese
5a5c56986a [PATCH] Fix 440SPe rev B detection from previous patch
Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-15 09:46:29 +01:00
Stefan Roese
95981778cf [PATCH] Update 440SP(e) cpu revisions
Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-13 08:01:03 +01:00
Heiko Schocher
ca43ba18e9 Added support for the SOLIDCARD III board from Eurodesign
Signed-off-by: Heiko Schocher <hs@denx.de>
2007-01-11 15:44:44 +01:00
Stefan Roese
f07ae7a9da [PATCH] 44x: Fix problem with DDR controller setup (refresh rate)
This patch fixes a problem with an incorrect setup for the refresh
timer of the 44x DDR controller in the file cpu/ppc4xx/sdram.c

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-06 15:58:09 +01:00
Stefan Roese
0238898382 [PATCH] Add DDR2 optimization code for Sequoia (440EPx) board
This code will optimize the DDR2 controller setup on a board specific
basis.

Note: This code doesn't work right now on the NAND booting image for the
Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-05 10:38:05 +01:00
Wolfgang Denk
bc5556d62b Merge with /home/hs/TQ/u-boot-dev 2006-12-24 01:30:04 +01:00
Heiko Schocher
fa23044564 Added support for the TQM8272 board from TQ
Signed-off-by: Heiko Schocher <hs@denx.de>
2006-12-21 17:17:02 +01:00
Stefan Roese
e732faec95 [PATCH] PPC4xx: 440SP Rev. C detection added
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-28 16:09:24 +01:00
Wolfgang Denk
d2c83f5493 Merge with /home/sr/git/u-boot/denx-alpr-merge-test 2006-11-27 23:11:18 +01:00
Stefan Roese
f6e495f54c [PATCH] 4xx_enet.c: Correct the setting of zmiifer register
Patch below corrects the setting of the zmiifer register, it was
overwritting the register rather than ORing the settings.

Signed-off-by: Neil Wilson <NWilson@airspan.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 17:43:25 +01:00
Stefan Roese
1729b92cde [PATCH] 4xx: Fix problem with board specific reset code (now for real)
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 14:52:04 +01:00
Stefan Roese
1f94d162e2 [PATCH] 4xx: Fix problem with board specific reset code
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 14:48:41 +01:00
Stefan Roese
ec0c2ec725 [PATCH] Remove testing 4xx enet PHY setup
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 14:46:06 +01:00