Commit graph

57 commits

Author SHA1 Message Date
Masahiro Yamada
b75d8dc564 treewide: convert bd_t to struct bd_info by coccinelle
The Linux coding style guide (Documentation/process/coding-style.rst)
clearly says:

  It's a **mistake** to use typedef for structures and pointers.

Besides, using typedef for structures is annoying when you try to make
headers self-contained.

Let's say you have the following function declaration in a header:

  void foo(bd_t *bd);

This is not self-contained since bd_t is not defined.

To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h>

  #include <asm/u-boot.h>
  void foo(bd_t *bd);

Then, the include direcective pulls in more bloat needlessly.

If you use 'struct bd_info' instead, it is enough to put a forward
declaration as follows:

  struct bd_info;
  void foo(struct bd_info *bd);

Right, typedef'ing bd_t is a mistake.

I used coccinelle to generate this commit.

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  typedef bd_t;
  @@
  -bd_t
  +struct bd_info
  </smpl>

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-17 09:30:13 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Biwen Li
9ebde8849a dm: arm: ls1021a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1021A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04 16:20:25 +05:30
Simon Glass
d96c26040e common: Move clock functions into a new file
These three clock functions don't use driver model and should be migrated.
In the meantime, create a new file to hold them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:27:29 -05:00
Simon Glass
807765b067 common: Move device-tree setup functions to fdt_support.h
These functions relate to setting up the device tree for booting the OS.
The fdt_support.h header file supports similar functions, so move these
there.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:27:27 -05:00
Simon Glass
5255932f01 common: Move some board functions out of common.h
A number of board function belong in init.h with the others. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:21 -05:00
Yangbo Lu
d9114e2b73 arm: ls1021a: drop redundant board_mmc_init()
The board_mmc_init() defined in board files is actually
doing same thing with the cpu_mmc_init() defined in
arch/arm/cpu/armv7/ls102xa/cpu.c. So drop it.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 16:55:56 +08:00
Bin Meng
f588b4d205 arm: ls1021atwr: Convert to use driver model TSEC driver
Now that we have added driver model support to the TSEC driver,
convert ls1021atwr board to use it.

This depends on previous DM series for ls1021atwr:
http://patchwork.ozlabs.org/patch/561855/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

[Vladimir] Made the following changes:
- Added 'status = "disabled";' for all Ethernet ports in ls1021a.dtsi
- Fixed the confusion between the SGMII/TBI PCS for enet0 and enet1 -
  a mistake ported over from Linux. Each SGMII PCS lies on the private
  MDIO bus of the interface (and the RGMII enet2 has no SGMII PCS).
- Added CONFIG_DM_ETH to all ls1021atwr_* defconfigs
- Completely removed non-DM_ETH support from ls1021atwr
- Changed "compatible" string from "fsl,tsec-mdio" to "fsl,etsec2-mdio"
  and from "fsl,tsec" to "fsl,etsec2" to match Linux
2019-07-25 13:13:31 -05:00
Alison Wang
158097052a armv7: ls102xa: Add workaround for DDR erratum A-008850
Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-03-15 11:52:01 +05:30
Alison Wang
f668c52033 arm: ls1021a: Add timer_init() in board_init_f for SPL
I2C is used to access DDR SPD in the DDR initialization for SPL. In
i2c_write process, get_timer() will be called. In board_init_f for SPL,
timer_init() is not called before. The system counter is not enabled and
the counter frequency is not set to 12.5MHz in SPL. The parameters for
do_div() are zero too.

It could not be found until CONFIG_USE_PRIVATE_LIBGCC is enabled in
default. When CONFIG_USE_PRIVATE_LIBGCC is enabled, U-Boot will use its
own set of libgcc functions. As the parameters for do_div() are zero,
__div0 will be called. Then the processor will stay in an endless loop
after calling hang().

This patch will add timer_init() in board_init_f for SPL and fix a
series of issues it caused.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-06 14:37:19 -08:00
Peng Ma
686203737e armv7: fsl: remove sata support
Remove the old implementation in order to enable DM for sata

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:03 -07:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
68ae7772af arm: ls1021atwr: Rework local commands to not be included in SPL
Move some of the code for the "lane_bank" and "cpld" code local
commands so that they are not built for SPL as they can only be
used in full U-Boot.  This means we can mark a few functions as
static as well now.

Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Tested-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:24 -08:00
Hou Zhiqiang
e4b5143eb6 fsl-lsch2: csu: remove multiple calling function
Function enable_layerscape_ns_access() is alreayd called soc-wide.
Remove duplicated calling from individual boards.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[YS: Add commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
Alison Wang
5d267ec679 arm: ls1021atwr: Enable RGMII TX/RX clock internal delay for AR8033
Since commit ce412b7, RGMII TX clock internal delay is not enabled
for AR8033 unconditionally. On LS1021ATWR board, the third port
eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to
be enabled.

This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX
clock internal delay for AR8033 on the third port.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24 08:59:43 -07:00
Shengzhou Liu
93a6d3284c armv7:ls1021a: Enable workaround for DDR erratum A-009942
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:08:15 -07:00
Hou Zhiqiang
b392a6d4b0 fsl-layerscape: Add workaround for PCIe erratum A010315
As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:13 -07:00
Hou Zhiqiang
341238fd13 arm: fsl-layerscape: move forward the non-secure access permission setup
Move forward the basic non-secure access enable operation, so the
subsequent individual device access permission can override it.
And collect the dispersed callers in board level, and then move
them to SoC level.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:06:56 -07:00
Sumit Garg
e7e720c2ce arm: ls1021atwr: Add SD secure boot target
Add SD secure boot target for ls1021atwr.
Implement board specific spl_board_init() to setup CAAM stream ID and
corresponding stream ID in SMMU. Change the u-boot size defined by a
macro for copying the main U-Boot by SPL to also include the u-boot
Secure Boot header size as header is appended to u-boot image. So header
will also be copied from SD to DDR.

Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:49 -07:00
Alison Wang
a08b1921b4 armv7: ls102xa: Move smmu and stream id initialization into the common soc code
The initialization for smmu and stream id is moved into the common soc
code.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24 08:51:15 -08:00
Qianyu Gong
2459afb1a7 qe: move drivers/qe/qe.h to include/fsl_qe.h
As the QE firmware struct is shared with Fman, move the header file
out of drivers/qe/.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-02-24 08:51:13 -08:00
Tom Rini
82d72a1b99 Merge branch 'master' of git://git.denx.de/u-boot-net 2016-01-28 18:42:10 -05:00
Bin Meng
9ccb309651 arm: ls1021atwr: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET
The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-28 12:22:44 -06:00
Aneesh Bansal
d041288586 secure_boot: enable chain of trust for ARM platforms
Chain of Trust is enabled for ARM platforms (LS1021 and LS1043).
In board_late_init(), fsl_setenv_chain_of_trust() is called which
will perform the following:
- If boot mode is non-secure, return (No Change)
- If boot mode is secure, set the following environmet variables:
   bootdelay = 0 (To disable Boot Prompt)
   bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-27 08:12:49 -08:00
Yao Yuan
7ba0261810 arm: ls1021a: merge SoC specific code in a separate file
Create a soc.c file to put the code for soc special settings.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:29 -08:00
tang yuantian
0210a36988 arm: ls1021atwr: optimize the deep sleep latency
It will take more than 1s when wake up from deep sleep. Most of the
time is spent on outputing information. This patch reduced the deep
sleep latency by:
1. avoid outputing system informaton
2. remove flush cache after DDR restore
3. skip reloading second stage uboot binary when SD boot

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-30 09:19:48 -07:00
tang yuantian
4632ad773e arm: ls1021a: Add sata support on qds and twr board
Freescale ARM-based Layerscape LS102xA contain a SATA controller
which comply with the serial ATA 3.0 specification and the
AHCI 1.3 specification.
This patch adds SATA feature on ls1021aqds and ls1021atwr boards.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29 10:34:02 -07:00
Mingkai Hu
435acd83b2 armv7/ls1021a: move ns_access to common file
Config Security Level Register is different between different SoCs,
so put the CSL register definition into the arch specific directory.

Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29 10:33:58 -07:00
Alison Wang
947cee1127 arm: ls1021a: Add QSPI or IFC support in SD boot
As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in
SD boot now. For the customer's demand, QSPI needs to be supported in SD
boot too.

This patch adds QSPI or IFC support in SD boot according to the
corresponding defconfig. For detail, ls1021atwr_sdcard_ifc_defconfig is
used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is
used to support QSPI in SD boot.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26 09:09:57 -07:00
Zhuoyu Zhang
03c22449c5 arm/ls102xa:add hwconfig setting to support disable unused devices
DEVDISRn registers provides a mechanism for gating clocks of IP blocks
that are not used. Here we implement hwconfig option to allow users
to disable unused peripherals on the board.

For ex. If eSDHC/qDMA/eDMA are unused and with disabled status in dts,
User can enable CONFIG_FSL_DEVICE_DISABLE and set "devdis:esdhc,qdma,edma"
in hwconfig, thus ESDHC controller & eDMA/qDMA will be clock gated to
save more power.

Signed-off-by: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-09-01 21:49:20 -05:00
Claudiu Manoil
ebe4c1e646 ls102xa: etsec: Use proper settings for BE BDs
Replace the DMACTRL[LE] hack with recommended settings
for ETSECDMAMCR to get the same end effect - obtaining
big-endian buffer descriptors and frame data for eTSEC.
The reset / default value for ETSECDMAMCR is preserved,
excepting the BD and FR bits which are cleared to enable
the BE mode in accordance with the H/W specifications.

Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA"
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Tested-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-09-01 21:39:03 -05:00
Alison Wang
8f0c7cbb0d armv7/ls1021a: allow OCRAM access permission as R/W in SPL
On LS1021A Rev2.0, OCRAM's security level needs to be changed to
non-secure access for SD boot. This patch will allow OCRAM
access permission as R/W in SPL.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:37 -07:00
chenhui zhao
933db81c04 armv7/ls1021atwr: program the regulator for deep sleep
Program the external regulator to switch off voltage in deep sleep.

Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:36 -07:00
Tang Yuantian
99e1bd4241 armv7/ls1021atwr: added deep sleep support in uboot
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:36 -07:00
Alison Wang
88c857df8c arm/ls102xa: Add little-endian mode support for audio IPs
As SCFG_ENDIANCR register is added to choose little-endian or big-endian
for audio IPs on Rev2.0 silion, little-endian mode is selected.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:38 -07:00
York Sun
a88cc3bd90 arm/ls1021a: Remove ccsr_ddr from immap_ls102xa.h
ccsr_ddr structure is already defined in fsl_immap.h. Remove
this duplicated define. Move fixed timing into ls1021atwr.h.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alison Wang <alison.wang@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
2015-05-20 10:34:09 -07:00
Minghuan Lian
d42bd3453a pci/layerscape: remove unnecessary pcie_layerscape.h
The patch uses the common function name ft_pci_setup to replace
ft_pcie_setup, then removes unnecessary pcie_layerscape.h because
all the functions have been declared in common.h.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21 10:19:19 -07:00
Yao Yuan
09227dd9df ls1021atwr: add hwconfig setting to do pin mux
Freescale LS1021ATWR share some pins. Hwconfig option is used to
allows users to choose the pin functions.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
[York Sun: revised commit message]
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21 10:19:19 -07:00
Alison Wang
036f3f3379 arm/ls102xa:Add support of conditional workaround implementation as per SoC ver
For LS102xA, some workarounds are only used in VER1.0, so silicon
version detection are added for QDS and TWR boards.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-21 10:19:19 -07:00
Alison Wang
8133574ea4 arm: ls1021x: Add support for initializing CAAM's stream id
There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id
for using the same SMMU3 on LS1021A.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-02-24 13:11:05 -08:00
Alison Wang
7df50fd323 arm: ls102xa: Update snoop settings for CCI-400
CAAM is connected to CCI-400 S0 slave interface. Disable snooping for
S0 will cause CAAM self test failure. This patch is to enable snooping
for S0 slave interface. These CCI-400 operations are moved to
board_early_init_f() to be initialized earlier. For S4 slave interface,
issuing of snoop requests and DVM message requests are enabled.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-01-23 22:29:14 -06:00
Simon Glass
22d69fd7a8 imx: ls102xa: Remove reference to gdata
The global_data pointer (gd) has already been set before board_init_f()
is called. We should not assign it again. We should also not use gdata since
it is going away.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-20 10:15:46 -05:00
Xiubo Li
660673af4f ARM: ls102xa: Setting device's stream id for SMMUs.
LS1 has 4 SMMUs for address translation of the masters. All the
SMMUs' stream IDs are 8-bit. The address translation depends on the
stream ID of the incoming transaction.
Each master has unique stream ID assigned to it and is configurable
through SCFG registers. The stream ID for the masters is identical
and share the same register field of STREAM ID registers.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:42:22 -08:00
Xiubo Li
e87f3b308c ARM: ls102xa: allow all the peripheral access permission as R/W.
The Central Security Unit (CSU) allows secure world software to
change the default access control policies of peripherals/bus
slaves, determining which bus masters may access them. This
allows peripherals to be separated into distinct security domains.
Combined with SMMU configuration of the system masters privileges,
these features provide protection against indirect unauthorized
access to data.

For now we configure all the peripheral access permissions as R/W.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:42:12 -08:00
Alison Wang
d612f0ab34 arm: ls102xa: Add QSPI boot support for LS1021AQDS/TWR board
This patch adds QSPI boot support for LS1021AQDS/TWR board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then the booting will start from QSPI memory space.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:40:14 -08:00
Alison Wang
8415bb68c8 arm: ls102xa: Add SD boot support for LS1021ATWR board
This patch adds SD boot support for LS1021ATWR board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Chen Lu <chen.lu@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:39:32 -08:00
Minghuan Lian
da419027af arm: ls102xa: Update PCIe dts node status
The patch changes PCIe dts node status to 'disabled' if the
corresponding controller is disabled according to serdes protocol.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:35:56 -08:00
Tom Rini
85bafb6da4 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2014-11-26 11:23:26 -05:00