Commit graph

72231 commits

Author SHA1 Message Date
Tom Rini
65a591f639 arm: Remove picosam9g45 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Erik van Luijk <evanluijk@interact.nl>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:01:09 -04:00
Tom Rini
80c642f16d arm: Remove wb50n board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:01:09 -04:00
Tom Rini
3cb80c73a8 arm: Remove wb45n board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:01:09 -04:00
Tom Rini
d59bc09d82 arm: Remove bcm958712k board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:01:09 -04:00
Tom Rini
9ac8368071 arm: Remove s32v234evb board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Eddy Petrișor <eddy.petrisor@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:01:00 -04:00
Tom Rini
56124508ce arm: Remove secomx6quq7 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:00:45 -04:00
Tom Rini
c6c26a05b8 arm: Remove vexpress_ca15_tc2 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:00:12 -04:00
Tom Rini
4652bef1b6 arm: Remove apf27 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:35 -04:00
Tom Rini
be3dec48b0 arm: Remove ts4600 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:35 -04:00
Tom Rini
0fa6bafa89 arm: Remove sc_sps_1 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:34 -04:00
Tom Rini
b40186fc7e arm: Remove SANSA_FUZE_PLUS board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:34 -04:00
Tom Rini
539fba2c10 arm: Remove xfi3 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:30 -04:00
Tom Rini
a80e03683b drivers: ata: Remove mvsata_ide driver
The mvsata_ide driver was due for DM conversion by v2019.07.  As that
has long passed, remove the driver and disable it in the boards which
had enabled it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:30 -04:00
Tom Rini
34af2da9ad ppc: Remove MPC8349ITX board
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:58:22 -04:00
Tom Rini
c861d21cba arm: Remove ot1200 board
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  In order to
convert to using the DWC SATA driver under DM further migrations are
required.

Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2021-04-10 07:57:42 -04:00
Tom Rini
d8d3b77fc2 arm: Remove dms-ba16 board
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:57:29 -04:00
Tom Rini
90932da70c ata: DWC_AHSATA depends on BLK
The dwc ahsata driver is written such that CONFIG_BLK must be enabled,
add this as a dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:53:50 -04:00
Tom Rini
f9836dabd8 am57xx_hs_evm_usb: Enable AHCI and BLK
Enable the AHCI and BLK features to complete migration of various
drivers.

Cc: Andrew F. Davis <afd@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:53:50 -04:00
Tom Rini
a61b538af8 ls1012aqds_tfa_SECURE_BOOT: Remove unused CONFIG_SCSI_AHCI
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:53:50 -04:00
Tom Rini
3f2e3c7845 Add rt-thread art-pi board support based on STM32H750 SoC
Add Engicam i.Core STM32MP1 SoM
 Add FIP header support for STM32programmer
 Update uart number when no serial device found for STM32MP1
 Remove board_check_usb_power function when ADC flag is not set
 Update SPL size limitation for STM32MP1
 Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmBwTr0cHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/plSwD/9SAhxTYqAblFZqZmJj
 Lu+F5fwuXXd8S5LwqNeIKULv+UhJngClkE4HdjSl6T0yR10v6YkPNRDVj4+1gzBd
 wZizmCsnqqDW0QGsTO5AVo+oTwhX4RHkvxEF7BjOqtVuoMZGiozE53+29QORHTnZ
 +j8CYAeORf9wvGAi5y+Wr8ICqP6HwPJPNlta4S8iYC867BM38R9evBqynlaZaWPE
 8FhaXwbAj9ZR9ifCiO+7ObgfXGDT63ejCecjE+539m3FWlBrn+/AWLsg4zF037Dw
 DcV324pnVFP4AIOVsuc9hF7luAYctoXQcNHt1QbD3gmWqPQAgpH8Llfq5cMyudza
 /m/112Y7fuLxO3F14DzZSj5l3ims0XG56Yg7zBwN6exDPr3iWA4UwTSH9lRJDnBq
 aJyvLfAFAvz+X15oePjrQrVp7c+6MigeY2nmhVCWV53Yrl+/TnnekQXlHJ3TsHED
 bPW5/LarLge18uACTZvLzYruIvDSU3INPP1W0vUu7YMDwuEp21K1GSspN7yA0yDK
 nrWXxmYJGVWanAEvW//zuuqUhxtNjAb/qIQl0UgjFN9cDT5vJZ7oY3nWOwP+0V2a
 o+qrRxBTWSVliOShYpfjyHRsASRna2QLLUNQaBeoUqZBKNnFvuw4LZzmqNvV+Idj
 +XWRCiSDJnf1zRrMwFLvZZ+UTQ==
 =4VxR
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20210409' of https://source.denx.de/u-boot/custodians/u-boot-stm

Add rt-thread art-pi board support based on STM32H750 SoC
Add Engicam i.Core STM32MP1 SoM
Add FIP header support for STM32programmer
Update uart number when no serial device found for STM32MP1
Remove board_check_usb_power function when ADC flag is not set
Update SPL size limitation for STM32MP1
Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
2021-04-09 13:10:59 -04:00
Tom Rini
92c4eb7ae3 Merge branch 'v2021.07-rc1' of https://github.com/lftan/u-boot 2021-04-09 13:10:38 -04:00
Tom Rini
a1e95e3805 u-boot-imx-20210409
-------------------
 
 - Secure Boot :
 	- HAB for MX8M / MX7ULP
 	- CAAM fixes
 - Fixes for imxrt1020
 - Fixes for USDHC driver
 - Fixes for Toradex (Colibri / Apalis)
 - Switch to DM for several boards
 	- mx23 olinuxo
 	- usbarmory
 	- marsboard / riotboard
 	- Gateworks GW Ventana
 - NXP upstream patches (LPDDR / CAAM / HAB)
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCYHA8Xg8cc2JhYmljQGRl
 bnguZGUACgkQ9PVl5Jpo76aVbQCfb0Z+N836ZSAodyLa0t6FSHgKqfYAnRdrWQAv
 MNlGOmmpfHENtE75eSnd
 =g48D
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20210409' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20210409
-------------------

- Secure Boot :
	- HAB for MX8M / MX7ULP
	- CAAM fixes
- Fixes for imxrt1020
- Fixes for USDHC driver
- Fixes for Toradex (Colibri / Apalis)
- Switch to DM for several boards
	- mx23 olinuxo
	- usbarmory
	- marsboard / riotboard
	- Gateworks GW Ventana
- NXP upstream patches (LPDDR / CAAM / HAB)

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
2021-04-09 10:08:52 -04:00
Marek Vasut
2c2d7d6a72 arm: stm32mp1: Set soc_type, soc_pkg, soc_rev env variables
Split up get_soc_name(), clean the decoding up a bit, and set up
environment variables which contain the SoC type, package, revision.
This is useful on SoMs, where multiple SoC options are populated.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-09 14:45:25 +02:00
Alexandru Gagniuc
a08d1a916b configs: stm32mp1: Fix misleading SPL size limitations
A now removed comment promises to "limit SYSRAM usage to first 128 KB".
This would imply that only SYSRAM from 0x2ffc0000 - 0x2ffe0000 would be
used. This is not what happens at all.

First, SPL_MAX_SIZE is referenced from SPL_TEXT_BASE, which on all
existing configs is set to 0x2ffc2500, not SYSRAM_BASE (0x2ffc0000).
Some of it is in the first 128 KiB and some of it is in the second
128 KiB chunk of SYSRAM.

Second, SPL_MAX_SIZE, does not restrict the BSS size. While a valiant
attempt is made via SPL_BSS_MAX_SIZE, the value of 0x00100000 is much
larger than SYSRAM, and doesn't account for the non-BSS sections.

Because we're putting the .text and .bss in the same boat, the correct
way to limit them together is via SPL_MAX_FOOTPRINT. With the current
SPL_TEXT_BASE, we couldn't limit even a very basic SPL to the first
128 KiB, and there is no technical reason to do so. Because of this,
simply allow the SPL to use all SYSRAM.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-09 11:59:13 +02:00
Alexandru Gagniuc
bbe10c70a2 configs: stm32mp1: Remove misleading CONFIG_SPL_BSS_START_ADDR
CONFIG_SPL_BSS_START_ADDR is only used on a few mach- linker scripts.
stm32mp1 uses the generic script under arch/arm/cpu/u-boot-spl.lds,
which does not make use of this definition.

The SPL BSS starts in SRAM, right after .text, .rodata, .data, and
.u_boot_list. A very short version of the STM32MP1 memory map is:
  * SYSRAM: 2ffc0000 - 30000000     <- all of SPL is here
  * DRAM:   c0000000+

0xC0200000 is a DRAM address, and has nothing to do with SPL. It is
just very misleading to have it next to CONFIG_SPL_BSS_MAX_SIZE, or to
have it at all.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-09 11:59:13 +02:00
Alexandru Gagniuc
99e1191845 configs: stm32mp1: stm32mp1: Increase SPL malloc() size
Since commit 03f1f78a9b ("spl: fit: Prefer a malloc()'d buffer for
loading images"), FIT images must be malloc()'d before being loaded.
The old size of 1 MiB is suitable for FIT images with u-boot and an
FDT, but something containing a linux kernel is almost sure to fail.

It's safe to extend malloc all the way to 0xc2000000, but no further.
Linux likes to be loaded at 0xc2000000, so we use that as our cutoff
point. This gives us 29 MiB of malloc() space, which suited for more
complex FIT images including several DTBs, kernel, and OP-TEE images.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-09 11:59:13 +02:00
Patrick Delaunay
2214d5e54c stm32mp1: remove the board_check_usb_power function when ADC is not activated
Simplify the code of the function board_check_usb_power
based in CONFIG_ADC and adc_measurement; the function is removed by the
linker when the CONFIG_ADC is not activated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-09 11:53:00 +02:00
Patrick Delaunay
cbea7b3e7e stm32mp: replace printf by log macro in setup_boot_mode
Replace the remaining printf in setup_boot_mode() by log macro
to handle filtering for log features.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
Patrick Delaunay
5fc6e8694a stm32mp: update uart number in trace of serial device not found
Align the uart number in the trace of setup_boot_mode() with the name of
the uart/usart device (start at 1) and not with the instance value
(start at 0), i.e. the serial device sequence number and the index in
serial_addr[].

Fixes: f49eb16c17 ("stm32mp: stm32prog: replace alias by serial
device sequence number")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
Patrick Delaunay
4fb7b3e108 stm32mp: stm32prog: add FIP header support
Add support of TF-A FIP header in command stm32prog for all the boot
partition and not only the STM32IMAGE.

This patch is a preliminary patch to support FIP as second boot stage
after TF-A BL2 when CONFIG_TFABOOT is activated for trusted boot chain.

The FIP is archive binary loaded by TF-A BL2, which contains the secure OS
= OP-TEE and the non secure firmware and device tree = U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
Jagan Teki
0441b48570 board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OF
7" OF is a capacitive touch 7" Open Frame panel solutions with
- 7" AUO B101AW03 LVDS panel
- EDT, FT5526 Touch

MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.

MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0
7" Open Frame Solution board.

Linux dts commit details:

commit <1d278204cbaa> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 7" OF")

Add support for it.

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09 11:53:00 +02:00
Jagan Teki
fd4dc09a4c board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 board
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.

Genaral features:
- Ethernet 10/100
- USB Type A
- Audio Out
- microSD
- LVDS panel connector
- Wifi/BT (option)
- UMTS LTE with sim connector (option)

MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.

Linux dts commit details:

commit <f838dae7afd0> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 board")

Add support for it.

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09 11:53:00 +02:00
Jagan Teki
c72ba3df16 ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 Micro SoM
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S

MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete platform solutions.

Linux dts commit details:

commit <0be81dfaeaf8> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
SoM")

Add support for it.

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09 11:53:00 +02:00
Jagan Teki
b594ec89fb board: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.

Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

i.Core STM32MP1 needs to mount on top of this Carrier board for
creating complete i.Core STM32MP1 C.TOUCH 2.0 board.

Linux dts commit details:

commit <6ca2898df59f> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
C.TOUCH 2.0")

Add support for it.

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09 11:53:00 +02:00
Jagan Teki
30edf40fa8 board: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out

i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

i.Core STM32MP1 needs to mount on top of this Evaluation board for
creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.

Linux dts commit details:

commit <adc0496104b6> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
EDIMM2.2 Starter Kit")

Add support for it.

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09 11:53:00 +02:00
Jagan Teki
14dcdc6065 ARM: stm32: Imply SPL_SPI_LOAD
SPI Load isn't mandatory for STM32 builds.

Let's imply instead of select it to get rid of build
issues for non-SPI defconfigs.

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09 11:53:00 +02:00
Jagan Teki
7c2102feb8 ARM: dts: stm32: Add Engicam i.Core STM32MP1 1X4Gb DDR3
Engicam i.Core STM32MP1 SODIMM SoM has mounted 1x4Gb DDR3
which has 32bits width 528000Khz frequency.

Add DDR configuration via dtsi.

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09 11:53:00 +02:00
Jagan Teki
9f83b55d50 ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

General features:
- STM32MP157A
- Up to 1GB DDR3L
- 4GB eMMC
- 10/100 Ethernet
- USB 2.0 Host/OTG
- I2S
- MIPI DSI to LVDS
- rest of STM32MP157A features

i.Core STM32MP1 needs to mount on top of Engicam baseboards
for creating complete platform solutions.

Linux commit details:

commit <30f9a9da4ee1> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
SoM")

Add support for it.

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-04-09 11:53:00 +02:00
dillon min
38ac6a1bb3 board: Add rt-thread art-pi board support
All these files are add for support rt-thread art-pi board
- add board/st/stm32h750-art-pi, defconfig, header support for u-boot

for more information about art-pi, please goto:
https://art-pi.gitee.io/website/

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
dillon min
1f0305e0d0 ram: stm32: fix strsep failed on read only memory
strsep will change data from original memory address,
in case the memory is in non-sdram/sram place, will
run into a bug(hang at SDRAM: )

just add a temporary array to store bank_name[] to fix this
bug.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
dillon min
f132c4967e ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
This patchset has following changes:

- introduce stm32h750.dtsi to support stm32h750 value line
- add pin groups for usart3/uart4/spi1/sdmmc2
- add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile)
- add stm32h750i-art-pi.dts to support art-pi board
- add stm32h750i-art-pi-u-boot.dtsi to support art-pi board (u-boot)

art-pi board component:
- 8MiB qspi flash
- 16MiB spi flash
- 32MiB sdram
- ap6212 wifi&bt&fm

the detail board information can be found at:
https://art-pi.gitee.io/website/

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
dillon min
bddaaededd ARM: dts: stm32: fix i2c node typo in stm32h743, update dmamux1 register
Replace upper case by lower case in i2c nodes name.
update dmamux1 register range.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
dillon min
4035022473 ARM: dts: stm32: add new instances for stm32h743 MCU
Some instances are missing in current support of stm32h743 MCU. This commit
adds usart3/uart4 and sdmmc2 support.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
dillon min
e690ff4669 ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
This patch is intend to add support stm32h750 value line,
just add stm32h7-pinctrl.dtsi for extending, with following changes:

- rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi
- move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi
- update stm32h743i-{disco, eval}.dts to include stm32h7-pinctrl.dtsi

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
dillon min
ffca1967ed ARM: dts: stm32: split sdram pin & timing parameter into specific board dts
As different boards has their own sdram hw connection, mount different
sdram modules, so move sdram timing parameter and pin configuration
to their board device tree.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-09 11:53:00 +02:00
Max Krummenacher
2fc93e5baf imx: bootaux fix elf loading
This reverts the arch/arm/mach-imx/imx_bootaux.c changes of commit
805b3cac1e. The loader function name was changed so that it does
not clash with the generically available function in lib/elf.c.

imx-bootaux loads an elf file linked for an auxilary core. Thus the
loader function requires address translation from the auxilary core's
address space to where those are mapped into U-Boot's address space.

So the elf loader is specific and must not be replaced with a generic
loader which doesn't provide the address translation functionality.

Fixes commit 805b3cac1e ("lib: elf: Move the generic elf
loading/validating functions to lib")

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2021-04-08 23:59:50 +02:00
Fabio Estevam
c174c0623b pico-imx6ul: Pass the PMIC I2C address in pmic_get()
Pass "pfuze3000@8" in pmic_get() so that the PMIC node can
be found in the devicetree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-08 23:59:50 +02:00
Haibo Chen
8974ff1a60 mmc: fsl_esdhc_imx: add extra delay for IO voltage switch if necessary
Some board like imx8mm-evkb, IO voltage switch from 3.3v to 1.8v need
around 18ms, common code only delay 10ms, so need to delay extra 8ms.
Otherwise voltage switch will timeout when wait for data0 line.

This IO voltage switch time depends on board design, depend on the
PMIC and capacitance. imx8mm-evkb board use PCA9450(PMIC) and 10uF
capacitance.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08 23:59:50 +02:00
Haibo Chen
1e595a81d9 mmc: fsl_esdhc_imx: remove redundant cmd11 related code.
Common code already handle the voltage switch sequence based on spec,
so remove the redundant voltage switch code.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08 23:59:50 +02:00
Heinrich Schuchardt
ba7e5dbf38 imx6: icorem6: chmod 644 enigcam.bmp
Bitmap files should not be executable.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2021-04-08 23:59:50 +02:00