Commit graph

21175 commits

Author SHA1 Message Date
Tom Rini
6454028abb am335x_evm: Update SPI_BOOT support, add MTDPARTS info
- Style cleanup (# define -> #define)
- Due to ROM issues, redudant loading isn't feasible, so drop.
- Given extra space, increase max size of U-Boot to 512KiB
- Correct env size to match usage (we had not re-defined ENV_SIZE).
- Given extra space, keep env size as 128KiB, add redundant environment.

Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-30 09:21:41 -04:00
Tom Rini
989bd7a8cb am335x_evm: Drop useless CONFIG_ENV_IS_NOWHERE
We always set a CONFIG_ENV_IS_...somewhere... so drop the initial define
of NOWHERE.

Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-30 09:21:41 -04:00
Tom Rini
97559b5203 board/ti/am335x/README: Document NAND programming
The AM335x GP EVM ships with NAND.  Document programming of the chip
including the redundant locations that the ROM will check.

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-30 09:21:37 -04:00
Nishanth Menon
ea70690d66 omap3_beagle: support booting from zImage and device tree as last option
If no other bootoption works, try loading up device tree and zImage.

This is selected as the last option to allow backward compatibility as
well as support the recent trend in moving kernel boot to using zImage
and device tree.

NOTE: if uImage is present in bootpart, it will try this first and
will assume this is to be booted with bootm (so may be concatenated
image or plain vanilla ATAG MACHINE_ID based image)

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-07-26 16:39:12 -04:00
Nishanth Menon
2ade496fd8 omap3_beagle: support findfdt and loadfdt for devicetree support
For folks not using concatenated device tree with uImage, having
an handy function to find and load device tree is very handy.

So introduce findfdt and loadfdt and run findfdt by default to make
it easier on user scripts.

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-07-26 16:39:12 -04:00
Nishanth Menon
102ce9ea7a omap3_beagle: enable CMD_FS_GENERIC and simplify load of image/ramdisk
CMD_FS_GENERIC allows us to simplify where we load up our image from
either from ext2/fat etc. So, lets use that instead of cumbersome
options we currently use. Sticking with existing conventions,
defaults will be:
ramdisk=ramdisk.gz
bootpart=0:2 (second partition)
bootdir=/boot (/boot in second partition)

This matches with the default behavior, these can be overriden by
env files as needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-07-26 16:39:11 -04:00
Nishanth Menon
af4d896fed beagleboard: remove RevB support for BeagleBoard Xm
As reported in http://marc.info/?l=u-boot&m=137358037827735&w=2

There is no need for the "xMB" variant, as the gpio pins used for
identification where never changed from the xMA when the newer silcon
was used for the xMB, So rename XM A revision as AB revision
and report accordingly

Reported-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2013-07-26 16:39:11 -04:00
Nishanth Menon
a33e3c79f3 omap3_beagle: replace uImage.beagle with generic uImage
e682930867
(BeagleBoard: config: use uImage.beagle for tftp)

Introduced uImage.beagle which does not happen to be default output
file of Linux kernel build make uImage (output is uImage).

So, replace uImage.beagle with uImage

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-07-26 16:39:11 -04:00
Nishanth Menon
664979a2a9 omap3_beagle: remove JFFS2 support.
We do not use JFFS2 by default and it conflicts with
CONFIG_CMD_FS_GENERIC (ls command is the same). Since most of our
BOOTCMD can be simplified by using the FS_GENERIC, dropping JFFS2

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Joel Fernandes <joelf@ti.com>
2013-07-26 16:39:11 -04:00
Mugunthan V N
c9be62caba ARM: DRA7xx: Enable CPSW Ethernet support
Enabling CPSW Ethernet support in DRA7xx EVM.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Mugunthan V N
dec7f74835 ARM: DRA7xx: Add CPSW and MDIO pinmux support
Adding CPSW Slave 0 and MDIO pinmux support for DRA7xx EVM

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Mugunthan V N
b1e26e3bfb ARM: DRA7xx: Add CPSW support to DRA7xx EVM
Adding support for CPSW Ethernet support found in DRA7xx EVM

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Mugunthan V N
f986d97208 ARM: DRA7xx: Enable GMAC clock control
Enabling CPSW module by enabling GMAC clock control

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Lokesh Vutla
65e9d56fb9 ARM: DRA7xx: Lock DPLL_GMAC
Locking DPLL_GMAC

[mugunthanvnm@ti.com:Configure only if CPSW is selected]

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Mugunthan V N
454ac63525 drivers: net: cpsw: Enable statistics for all port
Enable hardware statistics for all ports, enabling only to host port is useless

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Mugunthan V N
2bf36ac638 drivers: net: cpsw: remove hard coding bd ram for cpsw
BD ram address may vary in various SOC, so removing the hardcoding and
passing the same information through platform data

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Tom Rini
5d4dbf1c3a am335x_evm: Add basic README
Add a README for the family of boards the am335x_evm covers, and include
instructions on preparing and using falcon mode, for various media.

Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2013-07-26 16:39:11 -04:00
Tom Rini
a7d39afbb0 am335x_evm: Correct CONFIG_CMD_SPL_WRITE_SIZE
We use CONFIG_CMD_SPL_WRITE_SIZE when reading/writing the args portion
of falcon mode to NAND.  Previously it was half the size of the
eraseblock which is too small, increase to eraseblock size.

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-26 16:39:10 -04:00
Tom Rini
3afd8e0828 am335x_evm: Update eMMC falcon mode locations
The previous location used for the "args" portion of falcon mode was too
small to allow for a device tree to be saved there, so move the location
slightly and increase the size.  In addition, our previous kernel
location was part of the area we set aside for U-Boot itself, so move it
up a bit higher.

Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-26 16:39:10 -04:00
Tom Rini
d78959937f am335x_evm: Correct DFU ALT settings for falcon mode
Now that we have falcon mode enabled, the partiton numbers for NAND have
changed, and we need to list entries for updating these parts of the
system.  While adding falcon mode entires for eMMC (raw), we round up
the limit on U-Boot for ease of math later.

Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-26 16:39:10 -04:00
Tom Rini
d118d76601 README.falcon: Note how we determine if we can boot the OS or not
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-26 16:39:10 -04:00
Andreas Bießmann
c4ec281822 omap3/sys_info: fix printout of OMAP36XX L3 freqency
The OMAP36xx/OMAP37xx family uses L3 frequency of 200MHz instead of 165MHz
used by OMAP34xx/OMAP35xx.

Also fix checkpatch warning about alignment.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-07-26 16:39:10 -04:00
Tom Rini
e4c444b34b spl_mmc.c: Detect missing kernel image in RAW MMC
Currently, we assume that if we can read from MMC correctly, we have
found a valid image.  This is not the case as an empty area will read
just fine.  Add a check for a valid IH_MAGIC.

Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
2013-07-26 16:39:10 -04:00
Christian Riesch
3864cb2133 da850evm: Use clrbits function with correct endianess
The current code uses clrbits_be32 which is incorrect since we are on
a little endian machine here. This patch fixes this issue and also removes
some unnecessary code: Reading the current GPIO bank state is not required
if we are using the SET and CLEAR GPIO registers for setting/clearing
bits.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Cc: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
2013-07-26 16:39:10 -04:00
Stefan Roese
bf0e86606d arm: omap3: spl: Fix problem with 8bit NAND devices
Currently in OMAP3 SPL, the GPMC for NAND is configured for 16bit
access. This patch adds support for 8bit NAND devices as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
2013-07-26 16:39:10 -04:00
Albert ARIBAUD
8b485ba12b Merge branch 'u-boot/master' into u-boot-arm/master 2013-07-25 17:57:46 +02:00
Tom Rini
aaf5e82560 Merge branch 'master' of git://git.denx.de/u-boot-nds32 2013-07-25 08:51:51 -04:00
Tom Rini
0b17998e50 qemu-malta: Update for SPDX license identifiers
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25 08:51:48 -04:00
Tom Rini
230187ce26 Merge branch 'master' of git://git.denx.de/u-boot-mips
Conflict over SPDX changes means that one change was effectively dropped
as it was fixing typos in a removed hunk of text.

Conflicts:
	arch/mips/cpu/mips64/start.S

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25 08:51:48 -04:00
Tom Rini
8dde4ca90e drivers/i2c: Update fti2c010.[ch], i2c_core.c to use SPDX identifiers
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25 08:51:42 -04:00
Dinh Nguyen
12607adcd5 socfpga: Move board/socfpga_cyclone5 to board/socfpga
Because the SOCFPGA platform will include support for Cyclone V and
Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
be more generic.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Tom Rini <trini@ti.com>

v2:
- Add Reviewed-by: Pavel Machek
- Cc: Tom Rini
2013-07-25 10:54:52 +02:00
ken kuo
c54fd3efa4 nds32: Enable FPU if the version of CPU supported
Some version of Andes core support FPU coprocessor,
if this is the case, and toolchain support FPU instruction set,
we should enable it at low level initialization time.

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-25 16:54:19 +08:00
Tom Rini
99ca91b6d7 nds32: Update <asm/io.h> and <asm/setup.h> with SPDX license identifiers
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-25 16:54:18 +08:00
ken kuo
951344b778 nds32: Convert Makefiles to use COBJS-y style
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-25 16:54:18 +08:00
Rob Herring
76116f29ee highbank: enable keyed autoboot stop
Restrict autoboot interruption to "s" or "d" keys. This will prevent some
unwanted stopping and also allow disabling the reset on command timeout.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:16:37 +02:00
Rob Herring
953950234d ARM: highbank: compile misc_init_r only if CONFIG_MISC_INIT_R
Compile misc_init_r only if CONFIG_MISC_INIT_R is enabled.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:16:21 +02:00
Rob Herring
76c3999db4 ARM: highbank: setup peripherals based on power domain status
Accessing powered down peripherals will hang the bus, so check power
domain status before initializing SATA and fixup the FDT to disable
unused peripherals.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:16:07 +02:00
Rob Herring
e1df283c26 ARM: highbank: enable reset on command timeout
Enable resetting on command timeout. The timeout is set with environment
setting bootretry.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:57 +02:00
Rob Herring
0f7cf3803f ARM: highbank: avoid bss write in timer_init
The timer_init function is called before relocation and writes to bss data
were corrupting relocation data. Fix this by removing the call to
reset_timer_masked. The initial timer count should be 0 or near 0 anyway,
so initializing the variables are not needed.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:44 +02:00
Rob Herring
714d1f5da5 ARM: highbank: set timer prescaler to 256
The 150MHz clock rate gives u-boot time functions problems and there's no
benefit to a fast clock, so lower the rate.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:33 +02:00
Rob Herring
ec0e413f93 ARM: highbank: fix get_tbclk value to timer rate
get_tbclk should return the timer's frequency, not CONFIG_SYS_HZ.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:25 +02:00
Rob Herring
185a5bb0f5 ARM: highbank: update config options
Various changes to highbank config:

Enable EFI partitions
Enable ext4 and FAT filesystems
Enable bootz command and raw initrd
Increase cmd and print buffer size to 1K
Change serial baudrate to 115200
Enable hush shell

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:15:02 +02:00
Rob Herring
393ee7f342 net: calxedaxgmac: enable rx cut-thru
There is no reason to wait for the entire frame to start DMA on receive,
so enable rx cut-thru for better performance.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:14:44 +02:00
Rob Herring
0f5141e9c5 ARM: move interrupt_init to before relocation
interrupt_init also sets up the abort stack, but is not setup before
relocation. So any aborts during relocation will hang and not print out
any useful information. Fix this by moving the interrupt_init to after
the stack setup in board_init_f.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:14:28 +02:00
Gabor Juhos
db2c86d7d7 MIPS: mips32/cache.S: use v1 register for indirect function calls
Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:07 -04:00
Gabor Juhos
ee8b1e2959 MIPS: mips32/cache.S: store cache line size in t8 register
Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:07 -04:00
Gabor Juhos
c325916563 MIPS: mips32/cache.S: save return address in t9 register
Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:06 -04:00
Gabor Juhos
d707e5b713 MIPS: xburst/start.S: rework relocation info check
Make it similar to the code in mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:06 -04:00
Gabor Juhos
e5c868a208 MIPS: xburst/start.S: use t8 register for dynamic relocation
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:06 -04:00
Gabor Juhos
f01d693535 MIPS: xburst/start.S: save gd in s0 register
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:06 -04:00