Commit graph

464 commits

Author SHA1 Message Date
Bin Meng
594d089c8a x86: irq: Change LINK_V2N and LINK_N2V to inline functions
LINK_V2N and LINK_N2V are currently defines, so they cannot handle
complex logics. Change to inline functions for future extension.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
bc728b1bc0 x86: irq: Remove chipset specific irq router drivers
At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.

Now we remove these specific drivers and make all x86 boards use
the common one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Simon Glass
329da4850c Define board_quiesce_devices() in a shared location
This undocumented function relies on arch-specific code to declare a nop
weak version. Add the weak function in common code instead to avoid having
to duplicate the same function in each arch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-03 15:27:21 +02:00
Bryan O'Donoghue
30fe8b05b3 x86: Define PLATFORM__SET_BIT for generic_set_bit()
x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().

This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2018-05-15 21:44:05 -04:00
Tom Rini
4549e789c1 SPDX: Convert all of our multiple license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have multiple licenses (in
these cases, dual license) declared in the SPDX-License-Identifier tag.
In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A
or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B"
as per the Linux Kernel style document.  Note that parenthesis are
allowed so when they were used before we continue to use them.

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 10:24:31 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Bin Meng
45519924a0 x86: Rename e820entry to e820_entry
This changes 'struct e820entry' to 'struct e820_entry' to conform
with the coding style.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16 16:54:51 +08:00
Bin Meng
87af71c2ea x86: Use 'unsigned int' in install_e820_map() functions
This fixes the following checkpatch warning:

  warning: Prefer 'unsigned int' to bare use of 'unsigned'

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16 16:54:51 +08:00
Lukasz Majewski
014d7b13ae x86: Update the io.h file to use {out|in}_{be|le}X macros
The commit 3f70a6f577 ("x86: Add clr/setbits functions")
introduced the {read|write}_ macros to manipulate data.

Those macros are not used by any code in the u-boot project (despite the
io.h itself). Other architectures use io.h with {in|out}_* macros.

This commit brings some unification across u-boot supported architectures.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-16 16:54:51 +08:00
Ivan Gorinov
53cabe3d8e x86: Add 64-bit memory-mapped I/O functions
Add readq() and writeq() definitions for x86.

Please note: in 32-bit code readq/writeq will generate two 32-bit
memory access instructions instead of one atomic 64-bit operation.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-16 16:54:51 +08:00
Ivan Gorinov
5d73292cf8 x86: zImage: Pass working device tree data to the kernel
On x86 platforms, U-Boot does not pass Device Tree data to the kernel.
This prevents the kernel from using FDT loaded by U-Boot.

Read the working FDT address from the "fdtaddr" environment variable
and add a copy of the FDT data to the kernel setup_data list.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add #include <linux/libfdt.h> to zimage.c to fix build error]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30 16:06:58 +08:00
Bin Meng
45410da714 x86: acpi: Use an API to get the ACPI RSDP table address
At present the acpi_rsdp_addr variable is directly referenced in
setup_zimage(). This changes to use an API for better encapsulation
and extension.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-01-30 22:34:37 +08:00
Andy Shevchenko
3469bf4274 x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters
New field acpi_rsdp_addr, which has been introduced in boot protocol
v2.14 [1], in boot parameters tells kernel the exact address of RDSP
ACPI table. Knowing it increases robustness of the kernel by avoiding
in some cases traversal through a part of physical memory.
It will slightly reduce boot time by the same reason.

[1] See Linux kernel commit

  2f74cbf ("x86/boot: Add the ACPI RSDP address to struct setup_header::acpi_rdsp_addr")
  @ https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?id=2f74cbf

for the details.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: updated the kernel commit git URL and fixed one style issue]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Andy Shevchenko
3ffb33d636 x86: tangier: Make _CRS for BTH0 Serialized to avoid warning
ASL compiler warns:

  ASL     board/intel/edison/dsdt.asl
  board/intel/edison/dsdt.asl.tmp    238:             Method (_CRS, 0, NotSerialized)
  Remark   2120 -      Control Method should be made Serialized ^  (due to creation of named objects within)

Do as suggested by ASL compiler.

Fixes: 5d8c4ebd95 ("x86: tangier: Add Bluetooth to ACPI table")
Reported-by: Ferry Toth <fntoth@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Andy Shevchenko
5d8c4ebd95 x86: tangier: Add Bluetooth to ACPI table
As defined on reference board followed by Intel Edison a Bluetooth
device is attached to HSU0, i.e. PCI 0000:04.1.

Describe it in ACPI accordingly.

Note, we use BCM2E95 ID here as one most suitable for such device based
on the description in commit message of commit 89ab37b489d1
	("Bluetooth: hci_bcm: Add support for BCM2E95 and BCM2E96")
in the Linux kernel source tree.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-08 16:52:25 +08:00
Andy Shevchenko
d08953e045 x86: tangier: Use actual GPIO hardware numbers
The recent commit 03c4749dd6c7
  ("gpio / ACPI: Drop unnecessary ACPI GPIO to Linux GPIO translation")
in the Linux kernel reveals the issue we have in ACPI tables here,
i.e. we must use hardware numbers for GPIO resources and,
taking into consideration that GPIO and pin control are *different* IPs
on Intel Tangier, we need to supply numbers properly.

Besides that, it improves user experience since the official documentation
for Intel Edison board is referring to GPIO hardware numbering scheme.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-08 16:52:25 +08:00
Andy Shevchenko
1602d215b5 x86: tangier: Use official ACPI HID for FLIS IP
FLIS IP since now gets its own ACPI ID.
Drop PRP0001 workaround in favour of official ACPI HID.

Corresponding kernel commit dabd4bc6de2b

	pinctrl: intel: merrifield: Introduce ACPI device table

in the pin control subsystem tree [1] targeting v4.16.

[1]: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/commit/?h=for-next&id=dabd4bc6de2b

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-12-21 09:18:05 +08:00
Bin Meng
411898dc87 x86: acpi: Put sleepstates.asl to the common place
The supported sleep states are generic on Intel processors. Move the
ASL definition to the common place.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-27 15:13:47 +08:00
Bin Meng
f6859558ca x86: baytrail: fsp: Use a function to update the Azalia config pointer
At present we directly pass the Azalia config pointer to the FSP UPD.
This updates to use a function to do the stuff, like Braswell does.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-10-19 11:37:51 +08:00
Bin Meng
abddcd52ab x86: fsp: Consolidate Azalia header file
So far there are two copies of Azalia struct defines with one in
baytrail and the other one in braswell. This consolidates these
two into one, put it in the common place, and remove the prefix
pch_ to these structs to make their names more generic.

This also corrects reset_wait_timer from us to ms.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-10-19 11:37:51 +08:00
Andy Shevchenko
39665beed6 x86: tangier: Enable ACPI support for Intel Tangier
Intel Tangier SoC is a part of Intel Merrifield platform which doesn't
utilize ACPI by default. Here is an attempt to unleash ACPI flexibility
power on Intel Merrifield based platforms.

The change brings minimum support of the devices that found on
Intel Merrifield based end user device.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-10-07 15:07:59 +08:00
Paul Burton
6f01316f36 x86: Use asm-generic/io.h
Convert the x86 architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for x86 this is primarily a matter of moving code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-02 21:52:22 -04:00
Simon Glass
2ff50f5fa4 dm: x86: Allow TSC timer to be used before DM is ready
With bootstage we need access to the timer before driver model is set up.
To handle this, put the required state in global_data and provide a new
function to set up the device, separate from the driver's probe() method.

This will be used by the 'early' timer also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-09-16 14:57:44 +08:00
Bin Meng
fffad9264a x86: braswell: Add FSP configuration
Add FSP related configuration for Braswell.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16 14:57:44 +08:00
Bin Meng
de9ac9a1b9 x86: Add Intel Braswell SoC support
This adds initial Intel Braswell SoC support. It uses Intel FSP
to initialize the chipset.

Similar to its predecessor BayTrail, there are some work to do to
enable the legacy UART integrated in the Braswell SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16 14:57:44 +08:00
Bin Meng
b3fd2126dc x86: fsp: Update fsp command to show spec 1.1 header
FSP spec 1.1 adds 3 new APIs and their offsets are in the header.
Update the 'fsp hdr' command to show these new entries.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16 14:57:44 +08:00
Bin Meng
4ff333b7dd x86: fsp: Add FSP_GRAPHICS_INFO_HOB
This adds a new HOB type for graphics information introduced in FSP
spec 1.1. When graphics capability is included in FSP and enabled,
FSP produces an FSP_GRAPHICS_INFO_HOB as described in the EFI PI
specification which provides information about the graphics mode and
framebuffer.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16 14:57:44 +08:00
Bin Meng
bb737ced7f x86: fsp: Update struct common_buf for FSP spec 1.1
FSP spec 1.1 adds one more member to the struct common_buf to
determine the memory size that can be reserved by FSP below "top
of low usable memory" for bootloader usage. This new member uses
the reserved space so that it is still compatible with previous
FSP spec 1.0.

A new HOB (FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID) is also
published when common_buf.tolum_size is valid and non zero.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16 14:57:44 +08:00
Masahiro Yamada
b27af39935 dma: import linux/dma-direction.h to consolidate enum dma_data_direction
Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete
duplicated definitions of enum dma_data_direction.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-09-12 18:02:23 -04:00
Bin Meng
091e51d20f x86: Remove dead ISA related codes
Neither new design uses ISA bus, nor does any U-Boot codes use these
codes. Remove them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-08 16:46:32 +08:00
Bin Meng
5d89b37f71 x86: kconfig: Select ARCH_EARLY_INIT_R in the platform Kconfig
This is architecture-dependent early initialization hence should
be put in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Andy Shevchenko
c3df28f6e2 x86: Make table address selectable
Some firmwares might have another window for generated tables.

So, introduce two configuration options to select start address and
maximum length for the generated tables.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01 20:17:02 +08:00
Andy Shevchenko
ace7762b28 x86: acpi: Export acpi_fill_mcfg() with __weak attribute
Some platforms might require different approach when filling memory
mappings configuration table.

Allow them to override the common method.

At the same time export acpi_create_mcfg_mmconfig().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Andy Shevchenko
2dcbef6f6c x86: acpi: Name fields in FADT in accordance with specification
ACPI specification defines FADT fields marked as reserved in U-Boot.

Name these fields in accordance with ACPI specification.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Felipe Balbi
e71de54a49 x86: Add Intel Tangier support
Add Intel Tangier SoC support.

Intel Tangier SoC is a core part of Intel Merrifield platform. For
example, Intel Edison board is based on such platform.

The patch is based on work done by the following people (in alphabetical
order):
	Aiden Park <aiden.park@intel.com>
	Dukjoon Jeon <dukjoon.jeon@intel.com>
	eric.park <eric.park@intel.com>
	Fabien Chereau <fabien.chereau@intel.com>
	Scott D Phillips <scott.d.phillips@intel.com>
	Sebastien Colleur <sebastienx.colleur@intel.com>
	Steve Sakoman <steve.sakoman@intel.com>
	Vincent Tinelli <vincent.tinelli@intel.com>

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-30 10:30:25 +08:00
Andy Shevchenko
b7026b0c98 x86: Add dma-mapping.h to architectural code
Some cross-platform drivers rely on this header present.
Make it so for x86.

It's just a copy'n'paste of arch/arm/include/asm/dma-mapping.h.

Suggested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-30 10:30:25 +08:00
Simon Glass
3ff240c92f x86: Don't include asm/u-boot.h in common
With a small fixup to u-boot-x86.h, this is not actually needed anywhere,
so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:35 -04:00
Simon Glass
6862b50f6e x86: Make u-boot-x86.h a private header
Rather than including this arch-specific header file in common.h, include
it from within x86's u-boot.h header.

Also drop the comment about something to be fixed. It is not clear what
needs fixing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:32 -04:00
Bin Meng
f8f291b096 x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer
At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
for these options and change the property from a boolean type to
an integer type, and change their names to explicitly indicate what
the property is really for.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
5e74e5a682 x86: baytrail: Use macros instead of magic numbers for FSP settings
Introduce various meaningful macros for FSP settings and switch over
to use them instead of magic numbers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
6702488cfa x86: baytrail: Remove "serial-debug-port-*" settings
"serial-debug-port-address" and "serial-debug-port-type" settings
are actually reserved in the FSP UPD data structure. Remove them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
5ae5aa9310 x86: acpi: Fix Windows S3 resume failure
U-Boot sets up the real mode interrupt handler stubs starting from
address 0x1000. In most cases, the first 640K (0x00000 - 0x9ffff)
system memory is reported as system RAM in E820 table to the OS.
(see install_e820_map() implementation for each platform). So OS
can use these memories whatever it wants.

If U-Boot is in an S3 resume path, care must be taken not to corrupt
these memorie otherwise OS data gets lost. Testing shows that, on
Microsoft Windows 10 on Intel Baytrail its wake up vector happens to
be installed at the same address 0x1000. While on Linux its wake up
vector does not overlap this memory range, but after resume kernel
checks low memory range per config option CONFIG_X86_RESERVE_LOW
which is 64K by default to see whether a memory corruption occurs
during the suspend/resume (it's harmless, but warnings are shown
in the kernel dmesg logs).

We cannot simply mark the these memory as reserved in E820 table
because such configuration makes GRUB complain: unable to allocate
real mode page. Hence we choose to back up these memories to the
place where we reserved on our stack for our S3 resume work.
Before jumping to OS wake up vector, we need restore the original
content there.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
0f4e25887d x86: acpi: Refactor acpi_resume()
To do something more in acpi_resume() like turning on ACPI mode,
we need locate ACPI FADT table pointer first. But currently this
is done in acpi_find_wakeup_vector().

This changes acpi_resume() signature to accept ACPI FADT pointer
as the parameter. A new API acpi_find_fadt() is introduced, and
acpi_find_wakeup_vector() is updated to use FADT pointer as the
parameter as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
995727850f x86: acpi: Make enter_acpi_mode() public
enter_acpi_mode() is useful on other boot path like S3 resume, so
make it public.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
ba65808e7d x86: fsp: Save stack address to CMOS for next S3 boot
At the end of pre-relocation phase, save the new stack address
to CMOS and use it as the stack on next S3 boot for fsp_init()
continuation function.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
9f1fad1e36 x86: Add an early CMOS access library
This adds a library that provides CMOS (inside RTC SRAM) access
at a very early stage when driver model is not available yet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
3a34cae011 x86: acpi: Resume OS if resume vector is found
In an S3 resume path, U-Boot does everything like a cold boot except
in the last_stage_init() it jumps to the OS resume vector.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
e76bf38f18 x86: acpi: Add one API to find OS wakeup vector
This adds one API acpi_find_wakeup_vector() to locate OS wakeup
vector from the ACPI FACS table, to be used in the S3 boot path.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
2b2d666f9c x86: acpi: Add wake up assembly stub
This adds a wake up stub before jumping to OS wake up vector.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
e652e1304a x86: baytrail: Conditionally report S3 in the ACPI table
When U-Boot is built without ACPI S3 support, it should not report
S3 in the ACPI table otherwise when kernel does STR it won't work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00