x86: kconfig: Select ARCH_EARLY_INIT_R in the platform Kconfig

This is architecture-dependent early initialization hence should
be put in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

arch/x86/cpu/broadwell/Kconfig

@@ -6,6 +6,7 @@
 config INTEL_BROADWELL
 	bool
 	select CACHE_MRC_BIN
+	select ARCH_EARLY_INIT_R
 	imply HAVE_INTEL_ME
 
 if INTEL_BROADWELL

arch/x86/cpu/broadwell/refcode.c

@@ -56,7 +56,17 @@ struct rmodule_header {
 	uint32_t padding[4];
 } __packed;
 
-int cpu_run_reference_code(void)
+/**
+ * cpu_run_reference_code() - Run the platform reference code
+ *
+ * Some platforms require a binary blob to be executed once SDRAM is
+ * available. This is used to set up various platform features, such as the
+ * platform controller hub (PCH). This function should be implemented by the
+ * CPU-specific code.
+ *
+ * @return 0 on success, -ve on failure
+ */
+static int cpu_run_reference_code(void)
 {
 	struct pei_data _pei_data __aligned(8);
 	struct pei_data *pei_data = &_pei_data;
@@ -111,3 +121,8 @@ int cpu_run_reference_code(void)
 
 	return 0;
 }
+
+int arch_early_init_r(void)
+{
+	return cpu_run_reference_code();
+}

arch/x86/cpu/qemu/Kconfig

@@ -6,6 +6,7 @@
 
 config QEMU
 	bool
+	select ARCH_EARLY_INIT_R
 
 if QEMU
 

arch/x86/cpu/quark/Kconfig

@@ -7,6 +7,7 @@
 config INTEL_QUARK
 	bool
 	select HAVE_RMU
+	select ARCH_EARLY_INIT_R
 	select ARCH_MISC_INIT
 
 if INTEL_QUARK

arch/x86/cpu/queensbay/Kconfig

@@ -8,6 +8,7 @@ config INTEL_QUEENSBAY
 	bool
 	select HAVE_FSP
 	select HAVE_CMC
+	select ARCH_EARLY_INIT_R
 
 if INTEL_QUEENSBAY
 

arch/x86/include/asm/cpu.h

@@ -288,16 +288,4 @@ u32 cpu_get_family_model(void);
  */
 u32 cpu_get_stepping(void);
 
-/**
- * cpu_run_reference_code() - Run the platform reference code
- *
- * Some platforms require a binary blob to be executed once SDRAM is
- * available. This is used to set up various platform features, such as the
- * platform controller hub (PCH). This function should be implemented by the
- * CPU-specific code.
- *
- * @return 0 on success, -ve on failure
- */
-int cpu_run_reference_code(void);
-
 #endif

board/advantech/som-db5800-som-6867/som-db5800-som-6867.c

@@ -17,8 +17,3 @@ int board_early_init_f(void)
 
 	return 0;
 }
-
-int arch_early_init_r(void)
-{
-	return 0;
-}

board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c

@@ -28,11 +28,6 @@ int board_early_init_f(void)
 	return 0;
 }
 
-int arch_early_init_r(void)
-{
-	return 0;
-}
-
 int board_late_init(void)
 {
 	struct udevice *dev;

board/coreboot/coreboot/Makefile

@@ -12,4 +12,4 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y	+= coreboot_start.o coreboot.o
+obj-y	+= coreboot_start.o

board/coreboot/coreboot/coreboot.c

@@ -1,14 +0,0 @@
-/*
- * Copyright (C) 2013 Google, Inc
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <cros_ec.h>
-#include <asm/gpio.h>
-
-int arch_early_init_r(void)
-{
-	return 0;
-}

board/efi/efi-x86/efi.c

@@ -5,9 +5,3 @@
  */
 
 #include <common.h>
-#include <asm/gpio.h>
-
-int arch_early_init_r(void)
-{
-	return 0;
-}

board/google/chromebook_link/link.c

@@ -5,14 +5,3 @@
  */
 
 #include <common.h>
-#include <cros_ec.h>
-#include <dm.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-#include <asm/arch/pch.h>
-
-int arch_early_init_r(void)
-{
-	return 0;
-}

board/google/chromebook_samus/samus.c

@@ -5,9 +5,3 @@
  */
 
 #include <common.h>
-#include <asm/cpu.h>
-
-int arch_early_init_r(void)
-{
-	return cpu_run_reference_code();
-}

board/google/chromebox_panther/panther.c

@@ -5,9 +5,3 @@
  */
 
 #include <common.h>
-#include <asm/arch/pch.h>
-
-int arch_early_init_r(void)
-{
-	return 0;
-}

board/intel/minnowmax/minnowmax.c

@@ -12,11 +12,6 @@
 
 #define GPIO_BANKE_NAME		"gpioe"
 
-int arch_early_init_r(void)
-{
-	return 0;
-}
-
 int misc_init_r(void)
 {
 	struct udevice *dev;

common/Kconfig

@@ -871,7 +871,6 @@ menu "Start-up hooks"
 
 config ARCH_EARLY_INIT_R
 	bool "Call arch-specific init soon after relocation"
-	default y if X86
 	help
 	  With this option U-Boot will call arch_early_init_r() soon after
 	  relocation. Driver model is running by this point, and the cache

configs/bayleybay_defconfig

@@ -15,7 +15,6 @@ CONFIG_FIT=y
 CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_CPU=y
 # CONFIG_CMD_IMLS is not set

configs/cougarcanyon2_defconfig

@@ -5,7 +5,6 @@ CONFIG_TARGET_COUGARCANYON2=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

configs/dfi-bt700-q7x-151_defconfig

@@ -15,7 +15,6 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_CPU=y
 # CONFIG_CMD_IMLS is not set

configs/edison_defconfig

@@ -3,7 +3,6 @@ CONFIG_VENDOR_INTEL=y
 CONFIG_DEFAULT_DEVICE_TREE="edison"
 CONFIG_TARGET_EDISON=y
 CONFIG_SMP=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_CPU=y
 # CONFIG_CMD_IMLS is not set

configs/efi-x86_defconfig

@@ -7,7 +7,6 @@ CONFIG_FIT=y
 CONFIG_ENV_IS_NOWHERE=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BOOTM is not set
 # CONFIG_CMD_IMLS is not set

configs/theadorable-x86-dfi-bt700_defconfig

@@ -15,7 +15,6 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_CPU=y
 # CONFIG_CMD_IMLS is not set