Commit graph

228 commits

Author SHA1 Message Date
Simon Glass
2189d5f1e8 Move strtomhz() to vsprintf.h
At present this function sits in its own file but it does not really
justify it. There are similar string functions in vsprintf.h, so move it
there. Also add the missing function comment.

Use the vsprintf.h include file explicitly where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:09 -05:00
Alexey Brodkin
0da32633ab arc: emsdp/iotdk: Switch to DM_MMC
Somehow EMSDP & IoT DK boards were skipped on ARC boads conversion
to DM MMC. So doing it now.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-11-01 16:45:40 +03:00
Eugeniy Paltsev
2a7232371a NET: DW: fix regression for ARC boards
The commit
642b80d256 ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.

Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2019-10-07 13:23:49 -04:00
Alexey Brodkin
fbf8c50163 arc: libgcc: Import __udivdi3 & __udivmoddi4 to allow 64-bit division
As reported by Kever here [1] we were unable to compile 64-bit division
code due to missing definition of __udivdi3().

Import its implementation and __udivmoddi4() as its direct dependency
from today's libgcc [2].

[1] https://patchwork.ozlabs.org/patch/1146845/
[2] 5d8723600b

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
2019-09-03 19:05:34 +03:00
Trevor Woerner
1001502545 CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.

Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18 08:15:35 -04:00
Trevor Woerner
a0aba8a2eb CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
parameters; only for the ARC architecture. This patch turns these two
parameters into Kconfig items everywhere else they are found.

All of the include/configs/* and defconfig changes in this patch are
for arm machines only. The Kconfig changes for arc, nds32, riscv,
and xtensa have been included since these symbols are found in code
under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
include/configs/* or defconfigs for these architectures exist which
include these symbols.

These results have been confirmed with tools/moveconfig.py.

Acked-by: Alexey Brodkin <abrodkin@snopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Re-migrate for a few more boards]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18 08:15:34 -04:00
Eugeniy Paltsev
cc2f7b6c7d ARC: [plat-axs10x]: migrate to DM_MMC
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-18 09:12:38 +03:00
Eugeniy Paltsev
54858311df ARC: [plat-hsdk]: migrate to DM_MMC
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-18 09:12:38 +03:00
Neil Armstrong
ffd4c7c2ec dts: switch spi-flash to jedec, spi-nor compatible
There is no reason not to use the Linux "jedec,spi-nor" binding in U-Boot
dts files. This compatible has been added in sf_probe, let use it.

This patch switches to jedec,spi-nor when spi-flash is used in the DTS
and DTSI files, and removed spi-flash when jedec,spi-nor is already
present.

The x86 dts are switched in a separate commit since it depends on a change
in fdtdec.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-12 10:54:27 +05:30
Alexey Brodkin
fae3798ac9 ARC: cache: define CONFIG_SYS_CACHELINE_SIZE as ARCH_DMA_MINALIGN
Even though we don't use CONFIG_SYS_CACHELINE_SIZE in ARC-specific code
it is used a lot in different drivers for alignment purposes.

So we define it and make much more drivers at least compilable for ARC.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-01-25 08:41:09 +03:00
Alexey Brodkin
7181a6d1cf ARC: Fix iteration in arc_xx_version()
"i" gets incremented before we're entering loop body
and effectively we iterate from 1 to 8 instead of 0 to 7.

This way we:
 a) Skip the first line of struct hs_versions
 b) Go over it and access memory beyond the structure

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-01-25 08:40:53 +03:00
Philipp Tomsich
2acc24fc28 Kconfig: Migrate BOUNCE_BUFFER
The bounce buffer is used by a few drivers (most of the MMC drivers)
to overcome limitations in their respective DMA implementation.

This moves the configuration to Kconfig and makes it user-selectable
(even though it will be a required feature to make those drivers
work): the expected usage is for drivers depending on this to 'select'
it unconditionally from their respective Kconfig (see follow-up
patches).

This commit includes a full migration using moveconfig.py to ensure
that each commit compiles.  To ensure bisectability we update
dependencies of various drivers to now select BOUNCE_BUFFER when needed.

[trini: Squash all patches to ensure bisectability]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion]
Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion]
Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
2019-01-19 09:49:26 -05:00
Alexey Brodkin
85e529fdfc ARC: Improve identification of ARC cores
1. Try to guess a ARC core template that was used
   i.e. not just name a core family but something more
   menaingful like "ARC HS38", "ARC EM11D" etc.

   We do it checking availability of the key differentiation
   features like:
    - Caches (we actually only check for L1 I$ fpr simplicity)
    - XY-memory
    - DSP extensions etc.

2. Identify ARC subsystems

3. Print core clock frequency

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-03 14:26:18 +03:00
Alexey Brodkin
adc9b09a23 emdk->emsdp: Rename board
Real marketing name of the board was recently updated so
to accommodate that change renaming the board and all
related to it.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-11-01 23:04:05 +03:00
Alexey Brodkin
6e63314f43 ARC: Don't use COMMON section for global not-initialized variables
By default GCC puts global non-initialized variables in COMMON section.
And we used to ignore existence of COMMON section in our linker
scripts though smart LD silently appended it right after .bss.

And the problem here is variables from COMMON section even though
require zeroing in run-time were not zeroed as they were placed
right after __bss_end symbol.

It was a pure luck we never faced serious problem due to this,
but now it is fixed.

Now as for some other architectures we'll just force GCC to put
those global variables in normal .bss section.

This solution is much nicer than adding COMMON section to each and
every linker script.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-15 13:35:17 +03:00
Alexey Brodkin
ba9f56f3d4 ARC: make generic print_cpuinfo() weak
This allows board to override print_cpuinfo() because
they might know better which ARChitect template was used.
This way we may not only derive base architecture type and
version but more meaningful things like "ARC EM7D" instead of
simple "ARC EM", "ARC HS36" instead of "ARC HS".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12 15:14:40 +03:00
Alexey Brodkin
5396e8b1dd arc: Add support for IoT development kit
The DesignWare ARC IoT Development Kit is a versatile platform
that includes the necessary hardware and software to accelerate
software development and debugging of sensor fusion,
voice recognition and face detection designs.

More information is avaialble here [1] and here [2].

The board is based on real silicon with
ARC EM9D-based Data Fusion IP Subsystem.

It sports a rich set of I/O including
 * DW USB OTG
 * DW MobileStorage (used for micro SD-card)
 * GPIO
 * multiple serial interface including DW APB UART
 * ADC, PWM and eFlash, SRAM and SPI Flash memory
 * Real-Time Clock (RTC)
 * Bluetooth module with worldwide regulatory compliance
   (FCC, IC, CE, ETSI, TELEC)
 * On-board 9-axis sensor (gyro, accelerometer and compass)

Extensible with Arduino, Pmod, mikroBUS connectors and a 2x18
extension header.

One of the most interesting features for developers is built-in
Digilent USB JTAG probe so only micro-USB cable is needed!

[1] https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit
[2] https://www.synopsys.com/dw/doc.php/ds/cc/iot_dev_kit.pdf

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:57:00 +03:00
Alexey Brodkin
7fe46b969d ARC: Implement print_cpuinfo()
Once we enable DISPLAY_CPUINFO for ARC we'll see
ARC core family and version printed on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Alexey Brodkin
c3dcd508b6 ARC: Add model property to boards .dts
1. This way we sync with Linux kernel where we have model
   set for all ARC boards for quite some time, see [1]

2. Once we enable DISPLAY_BOARDINFO for ARC this info will
   be printed on boot givin some extra data-point about the board

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=618a9cd06dd471ac232f5b27325b24d26eba5571

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Alexey Brodkin
56ddae7d91 ARC: Don't pre-define CROSS_COMPILE
Even though arc-linux- prefix is used in ARC prebuilt tools and
in Buildroot there're other options like Linux distro cross-tools
etc where prefix is different so let's not rely on this default.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Masahiro Yamada
3747bdbb2b arch: types.h: factor out fixed width typedefs to int-ll64.h
All architectures have the same definition for s8/16/32/64
and u8/16/32/64.

Factor out the duplicated code into <asm-generic/int-ll64.h>.

BTW, Linux unified the kernel space definition into int-ll64.h
a few years ago as you see in Linux commit 0c79a8e29b5f
("asm/types.h: Remove include/asm-generic/int-l64.h").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10 20:48:16 -04:00
Eugeniy Paltsev
13e57722fe ARC: HSDK: Fix timer frequency value
CPU (and hence cpu timers) on HSDK board runs at 500MHz after
preloader so fix wrong CPU frequency value in hsdk.dts

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2018-09-05 18:11:45 +03:00
Alexey Brodkin
8f590063ba ARC: Enable unaligned access in hardware if compiler uses it
Even if ARC core might handle unaligned access to data this
hardware feature by default is disabled.

But GCC starting from 8.1.0 unconditionally uses it for ARC HS cores.
Which leads to quite strange and fatal run-time failures like the one
below if HW is not configured properly:
| hsdk# sf probe
| Misaligned data access exception @ 0xbff794d4
| ECR:    0x000d0000
| RET:    0xbff794d4
| BLINK:  0xbff79644
| STAT32: 0x00000800
| GP: 0x1003e000   r25: 0xbfd58f08
| BTA: 0xbff794a4  SP: 0xbfd58cd4  FP: 0xbfd58ef0
| LPS: 0xbff90240 LPE: 0xbff90244 LPC: 0x00000000
| r00: 0x00000000 r01: 0x00000003 r02: 0x000026bf
| r03: 0x00000000 r04: 0x00000100 r05: 0x00000000
| r06: 0x00000001 r07: 0x00000000 r08: 0x1dcd6500
| r09: 0x00000000 r10: 0x00200000 r11: 0x00000000
| r12: 0x1b3d4440 r13: 0xbff9eca4 r14: 0xbfd59d68
| r15: 0xbfd60cd0 r16: 0x00000000 r17: 0x00000000
| r18: 0xbff9ed14 r19: 0xbfd59c78 r20: 0xbfd58d40
| r21: 0xbfd58d44 r22: 0x00000000 r23: 0x00000000
| r24: 0xbfd59ba8
| Resetting CPU ...

Now we're checking for __ARC_UNALIGNED__ define emitted by the
compiler if it's going to use unaligned access and then we
force-enable it in hardware too.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Eugeniy Paltsev
cdfe6913c1 AXS10x: add spi flash support
AXS10x boards have n25q512 spi flash IC, so add corresponding
nodes to device tree and enaple corresponding options in
defconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Eugeniy Paltsev
fe3eb7a887 GPIO: CREG: improve flexibility of hsdk-creg-gpio driver
CREG GPIO is a driver for weird soc-specific output ports, which are
controlled by some fields in memory mapped register.

Example:

31                 9        7        5           0   < bit number
|                  |        |        |           |
[     not used     | gpio-1 | gpio-0 | <-shift-> ]   < 32 bit register
                       ^        ^
                       |        |
                write 0x2 == set output to "1" (activate)
                write 0x3 == set output to "0" (deactivate)

As of tooday we only support fixed (hardcoded) bit per gpio line,
activate / deactivatei and shift values. Fix that by read them from
device tree to be able to use this driver for other boards.

Remove "hsdk" prefix from compatible string as this driver can be
used with different boards like HSDK, AXS101, AXS103, etc.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-31 07:49:47 +03:00
Michal Simek
58008cbab5 Kconfig: Sort bool, default, select and imply options
Another round of sorting Kconfig entries aplhabetically.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-07-30 07:18:48 -04:00
Masahiro Yamada
28b538b69d .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore
Follow Linux commit 10b62a2f785a (".gitignore: move *.dtb and *.dtb.S
patterns to the top-level .gitignore").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-18 14:43:12 -04:00
Alexey Brodkin
2c3f9261c8 ARC: Add support for EM Development Kit board
Synopsys DesignWare ARC EM Development Kit (ARC EMDK) is
an FPGA-based development platform from Synopsys aimed to speed-up
development of software for ARC EM cores and entire subsystems based on
ARC EM like Data Fusion, Secure and Sensor & Control subsystems.

U-Boot is supposed to be used as a primary bootloader on EMDK allowing
users to easily load and start their application from micro-SD card.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
7af51f12bc ARC: Use elf32-bigarc in case of -EB
As it is stated in LD manual [1] the second entry in OUTPUT_FORMAT
corresponds to "-EB" command-line option which for us is "elf32-bigarc".

[1] https://sourceware.org/binutils/docs/ld/Format-Commands.html#Format-Commands

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
eb5c853938 ARC: Reset: Implement weak reset_cpu()
This will allow for board-specific implementation of reset.
Default version will just stop execution with help of BRK instruction.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
8f187142e5 ARC: Reset: Use __builtin_arc_brk() instead of open-coded ASM
For quite some time we have a GCC's built-in which inserts BRK
instruction so let's use it instead of simple insertion of in-line
assembly.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
ef2cd492ad ARC: Move .ivt section to the very beginning of the image
This is useful for cases when U-Boot image is put in ROM and
reset vector points to 0 where the very beginnign of the image reside.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
ce3071287e ARC: Improve relocation fix-ups
We used to have the one and only linker script for all ARC boards
and so we relied on a particular order of symbols there.

Because of that we used __ivt_end as the marker of the end of all the
code which won't be true any longer if we move .ivt section to any other
place. That said we'd better check for each section separately.

A couple of other improvements:
 1. There's no point to include the marker of section end in interested
    range because its address is beyond the section, i.e. we should
    compare with "<" but not "<=".

 2. .ivt section for ARCv2 cores is just an array of 32-bit ints and
    they are not swapped even on little-endia cores while in case of
    ARCompact cores .ivt contains valid code so swapping is required.

 3. Just in case add check for ARC600 which is also ARCompact
    and its .ivt is normal code.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
7530bb2175 ARC: Make sure .ivt section is not purged by garbage collector
Fixes commit fac4790491 ("arc: Eliminate unused code and data with GCC's garbage collector"),
see [1].

Since in case of ARCv2 .ivt only contains addrresses of
interrupt/exception handlers linker doesn't understand that this section
actually make a lot of sense and decides to get rid of it if we use
"--gc-sections".

And KEEP does exactly this, see [2].

[1] http://git.denx.de/?p=u-boot.git;a=commit;h=fac4790491f69b29755d92db2cad508849573ff7
[2] https://sourceware.org/binutils/docs/ld/Input-Section-Keep.html#Input-Section-Keep

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
d0a5023a35 ARC: Cache: Don't compare I$ and D$ line lengths
We don't care much about I$ line length really as there're
no per-line ops on I$ instead we only do full invalidation of it
on occasion of relocation and right before jumping to the OS.

Also as compared to Linux kernel where we don't support different
lengths of I$ and D$ lines in U-Boot we have to deal with such an
exotic configs if the target board is not supposed to run Linux kernel.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Eugeniy Paltsev
429fa25e17 ARC: init debug uart in early common arc code
The debug UART is intended for use very early in U-Boot to debug
problems before serial drivers are up.

Call debug_uart_init right before board_init_f.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-24 15:59:17 +03:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Eugeniy Paltsev
474e9312a8 ARC: Remove unused DECLARE_GLOBAL_DATA_PTR from init_helpers.c
"Global data" structure "gd" is not used in init_helpers.c
thus DECLARE_GLOBAL_DATA_PTR might be safely removed.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-17 20:52:17 +03:00
Eugeniy Paltsev
f770b3ee18 ARC: HSDK: Enable SPI flash support
HSDK board has sst26wf016 SPI flash IC which we want to support.

Add SPI controller, CS-gpio and SPI flash nodes to hsdk device tree.
Enable corresponding options in hsdk defconfig.

For SPI write functionality to work we need [1] which
adds support of sst26xxx ICs.

[1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:27:56 +03:00
Eugeniy Paltsev
ada8affdfe ARC: HSDK: Add platform-specific commands
This patch add support of hsdk platform-specific commands:

hsdk_clock set - set clock from axi_freq, cpu_freq and tun_freq
environment variables/command line arguments

hsdk_clock get - save clock frequencies to axi_freq, cpu_freq
and tun_freq environment variables

hsdk_clock print - show CPU, AXI, DDR and TUNNEL current
clock frequencies.

hsdk_clock print_all - show all currently used clock frequencies.

hsdk_init - setup board HW in one of pre-defined configuration
(hsdk_hs34 / hsdk_hs36 / hsdk_hs36_ccm / hsdk_hs38 /
hsdk_hs38_ccm / hsdk_hs38x2 / hsdk_hs38x3 / hsdk_hs38x4)

hsdk_go - run baremetal application on hsdk configured
by hsdk_init command.

This patch changes default behaviour of 'bootm' command:
now we are able to set number of CPUs to be kicked by setting
'core_mask' environment variable before 'bootm' command run.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:27:56 +03:00
Eugeniy Paltsev
bdc9f02fab ARC: AXS10x: DTS: Remove unused interrupt properties
Some device tree nodes (like ethernet, ohci, ehci) in axs10x_mb.dtsi
were copied from linux device tree, so they have interrupts properties.
As we don't use interrupts in uboot we don't have interrupt controller
node in AXS10x device tree. In result we get warnings when we compile
such device tree.

So remove unused interrupts properties to get rid of this warnings.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-04-02 12:26:13 +03:00
Eugeniy Paltsev
f665c14f04 ARC: bootm: Refactor GO and PREP subcommands implementation
Refactor GO and PREP subcommands implementation for a simpler
override in the boards platform code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-23 15:57:51 +03:00
Eugeniy Paltsev
6b85b26e4b ARC: Cache: Refactor arc_ioc_setup()
Move all checks before cache flush and IOC setup.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:55 +03:00
Eugeniy Paltsev
9f0253c61a ARC: Cache: Add missing cache cleanup before cache disable
Add missing cache cleanup before cache disable:
 * Flush and invalidate L1 D$ before disabling. Flush and invalidate
   SLC before L1 D$ disabling (as it will be bypassed for data)
   Otherwise we can lose some data when we disable L1 D$ if this data
   isn't flushed to next level cache. Or we can get wrong data if L1 D$
   has some entries after enable which we modified when the L1 D$ was
   disabled.
 * Invalidate L1 I$ before disabling. Otherwise we can execute wrong
   instructions after L1 I$ enable if we modified any code when
   L1 I$ was disabled.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:55 +03:00
Eugeniy Paltsev
7241944a5b ARC: Cache: Add more HW configuration checks
Add additional cache configuration checks and note about
supported configurations.

It is unlikely to face some configuration in real life but
it's better to be prepared and refuse to work on those.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:55 +03:00
Eugeniy Paltsev
375945bac2 ARC: Implement a function to sync and cleanup caches
Implement specialized function to clenup caches (and therefore
sync instruction and data caches) which can be used for cleanup before linux
launch or to sync caches during U-Boot self-relocation.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
95336738f1 ARC: Cache: Fix SLC operations when SLC is bypassed for data
If L1 D$ is disabled SLC is bypassed for data and all
load/store requests are sent directly to main memory.

If L1 I$ is disabled SLC is NOT bypassed for instructions
and all instruction requests are fetched through SLC.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
c75eeb0bcb ARC: Cache: Implement [i,d]cache_enabled() as separate functions
Implement icache_enabled() and dcache_enabled() as separate functions
which can be used with "inline" attribute. This is a preparation to
make them always_inline.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
48b04832d8 ARC: Move IOC enabling to compile-time options
Use CONFIG_ARC_DBG_IOC_ENABLE Kconfig option instead of
ioc_enable global variable.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
246ba284ec ARC: Cache: Move PAE exists check into slc_upper_region_init()
Move check for PAE existence into slc_upper_region_init()
instead of its caller as more appropriate place.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
bf8974eda4 ARC: Move cache global variables to arch_global_data
There is a problem with current implementation if we start U-Boot
from ROM, as we use global variables before ther initialization,
so these variables get overwritten when we copy .data section
from ROM.

Instead we move these global variables into our "global data"
structure so that we may really start from ROM.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
7579087320 ARC: Cache: Get rid of [slc,pae,icache,dcache]_exists global variables
There is a problem with current implementation if we start U-Boot
from ROM, as we use global variables before ther initialization,
so these variables get overwritten when we copy .data section
from ROM.

Instead we'll use icache_exists(), dcache_exists(), slc_exists(), pae_exists()
functions which directly check BCRs every time.

In U-Boot case ops are used only during self-relocation and DMA
so we shouldn't be hit by noticeable performance degradation.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
ea9f6f1e87 ARC: Cache: Move SLC status check into slc_entire_op() and slc_rgn_op()
As of today we check SLC status before each call of __slc_rgn_op()
or __slc_entire_op(). So move status check into __slc_rgn_op()
and __slc_entire_op().

As we need to check status before *each* function execution and we
call slc_entire_op() and slc_rgn_op() from different places we add
this check directly into SLC entire/line functions instead of
their callers to avoid code duplication.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
05c6a26a04 ARC: Cache: Use is_isa_arcv2() instead of CONFIG_ISA_ARCV2 ifdef
Use is_isa_arcv2() function where it is possible instead of
CONFIG_ISA_ARCV2 define check to make code cleaner at the same time
keeping pretty much the same functionality - code in branches
under "if (is_isa_arcv2())" won't be compiled if CONFIG_ISA_ARCV2
is not defined, still we need a couple of CONFIG_ISA_ARCV2
ifdefs to make compiler happy. That's because code in
!is_isa_x() branch gets compiled and only then gets optimized
away.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
c877a8911d ARC: Cache: Allways check D$ status before entire/line ops
As we are planning to get rid of dozens of ifdef's in cache.c we
would better check D$ status before each entire/line operation
then check CONFIG_SYS_DCACHE_OFF config option.

This makes the code cleaner as well as D$ entire/line functions
remain functional even if we enable or disable D$ in run-time.

As we need to check status before *each* function execution and we
call D$ entire/line functions from different places we add
this check directly into D$ entire/line functions instead of
their callers to avoid code duplication.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
88ae27eda3 ARC: Move BCR encodings to separate header file
We're starting to use more and more BCRs and having their
definitions in-lined in sources becomes a bit annoying
so we move it all to a separate header.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
Eugeniy Paltsev
a6f557c4e0 ARC: Cache: Move IOC initialization to a separate function
Move IOC initialization from cache_init() to a separate function.

This is the preparation for the next patch where we'll switch
to is_isa_arcv2() function usage instead of "CONFIG_ISA_ARCV2"
ifdef.

Also it makes cache_init function a bit cleaner.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:49 +03:00
Eugeniy Paltsev
c27814be33 ARC: Flush & invalidate D$ with a single command
We don't implement separate flush_dcache_all() intentionally as
entire data cache invalidation is dangerous operation even if we flush
data cache right before invalidation.

There is the real example:
We may get stuck in the following code if we store any context (like
BLINK register) on stack in invalidate_dcache_all() function.

BLINK register is the register where return address is automatically saved
when we do function call with instructions like 'bl'.

void flush_dcache_all() {
	__dc_entire_op(OP_FLUSH);
	// Other code //
}

void invalidate_dcache_all() {
	__dc_entire_op(OP_INV);
	// Other code //
}

void foo(void) {
	flush_dcache_all();
	invalidate_dcache_all();
}

Now let's see what really happens during that code execution:

foo()
  |->> call flush_dcache_all
  	[return address is saved to BLINK register]
  	[push BLINK] (save to stack)              ![point 1]
  	|->> call __dc_entire_op(OP_FLUSH)
  		[return address is saved to BLINK register]
  		[flush L1 D$]
  		return [jump to BLINK]
  	<<------
  	[other flush_dcache_all code]
  	[pop BLINK] (get from stack)
  	return [jump to BLINK]
  <<------
  |->> call invalidate_dcache_all
  	[return address is saved to BLINK register]
  	[push BLINK] (save to stack)               ![point 2]
  	|->> call __dc_entire_op(OP_FLUSH)
  		[return address is saved to BLINK register]
  		[invalidate L1 D$]                 ![point 3]
  		// Oops!!!
  		// We lose return address from invalidate_dcache_all function:
  		// we save it to stack and invalidate L1 D$ after that!
  		return [jump to BLINK]
  	<<------
  	[other invalidate_dcache_all code]
  	[pop BLINK] (get from stack)
  	// we don't have this data in L1 dcache as we invalidated it in [point 3]
  	// so we get it from next memory level (for example DDR memory)
  	// but in the memory we have value which we save in [point 1], which
  	// is return address from flush_dcache_all function (instead of
  	// address from current invalidate_dcache_all function which we
  	// saved in [point 2] !)
  	return [jump to BLINK]
  <<------
  // As BLINK points to invalidate_dcache_all, we call it again and
  // loop forever.

Fortunately we may do flush and invalidation of D$ with a single one
instruction which automatically mitigates a situation described above.

And because invalidate_dcache_all() isn't used in common U-Boot code we
implement "flush and invalidate dcache all" instead.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:49 +03:00
Eugeniy Paltsev
5e0c68edad ARC: Introduce is_isa_X() functions
Introduce is_isa_arcv2() and is_isa_arcompact() functions.

These functions only check configuration options and return
compile-time constant so they can be used instead of #ifdef's to
to write cleaner code.

Now we can write:
-------------->8---------------
if (is_isa_arcv2())
	ioc_configure();
-------------->8---------------
instead of:
-------------->8---------------
ifdef CONFIG_ISA_ARCV2
	ioc_configure();
endif
-------------->8---------------

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:49 +03:00
Eugeniy Paltsev
5d7a24d646 ARC: Cache: Add support for FLUSH_N_INV D$ operations
As of today __dc_line_op() and __dc_entire_op() support
only separate flush (OP_FLUSH) and invalidate (OP_INV) operations.

Add support of combined flush and invalidate (OP_FLUSH_N_INV)
operation which we planing to use in subsequent patches.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:44 +03:00
Eugeniy Paltsev
c4ef14d2cc ARC: Cache: Remove per-line I$ operations as unused
__cache_line_loop() function was copied from Linux kernel
where per-line instruction cache operations are really used.

In U-Boot we use only entire I$ ops, so we can drop support of
per-line I$ ops from __cache_line_loop() because __cache_line_loop()
is never called with OP_INV_IC parameter.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:37 +03:00
Eugeniy Paltsev
16aeee81d9 ARC: Cache: Move I$ entire operation to a separate function
Move instruction cache entire operation to a separate function
because we are planing to use it in other places like
sync_icache_dcache_all().

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:29 +03:00
Alexey Brodkin
71621525c3 arc: Fine-tune implementation of memory barriers
We improve on 2 things:
 1. Only ARC HS family has "dmb" instructions so do compile-time
    check for automatically defined macro __ARCHS__.
    Previous check for ARCv2 ISA was not good enough because ARC EM
    family is v2 ISA as well but still "dmb" instaruction is not
    supported in EM family.

 2. Still if there's no dedicated instruction for memory barrier
    let's at least insert compile-time barrier to make sure
    compiler deosn't reorder critical memory operations.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 16:21:34 +03:00
Alexey Brodkin
264d298fda arc: Introduce a possibility to not relocate U-boot
Disabling relocation might be useful on ARC for 2 reasons:
 a) For advanced debugging with Synopsys proprietary MetaWare debugger
    which is capable of accessing much more specific hardware resources
    compared to gdb. For example it may show contents of L1 and L2 caches,
    internal states of some hardware blocks etc.

    But on the downside MetaWare debugger still cannot work with PIE.
    Even though that limitation could be work-arounded with change of ELF's
    header and stripping down all debug info but with it we won't have
    debug info for source-level debugging which is quite inconvenient.

 b) Some platforms which might benefit from usage of U-Boot basically
    don't have enough RAM to accommodate relocation of U-Boot so we
    keep code in flash and use as much of RAM as possible for more
    interesting things.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
2018-03-21 16:21:34 +03:00
Alexey Brodkin
fac4790491 arc: Eliminate unused code and data with GCC's garbage collector
Finally GCC's garbage collector works on ARC so let's use it.
That's what I may see for HSDK:

Before:
   text	   data	    bss	    dec	    hex	filename
 290153	  10068	 222616	 522837	  7fa55	u-boot

After:
   text	   data	    bss	    dec	    hex	filename
 261999	   9460	 222360	 493819	  788fb	u-boot

Overall ~5% of memory footprint saved.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 16:21:34 +03:00
Alexey Brodkin
0a097ba54b arc: Don't halt slaves
This commit basically reverts two commits:
 1. cf628f772e ("arc: arcv1: Disable master/slave check")
 2. 6cba327bd9 ("arcv2: Halt non-master cores")

With mentioned commits in-place we experience more trouble than
benefits. In case of SMP Linux kernel this is really required as
we have all the cores running from the very beginning and then we
need to allow master core to do some preparatory work while slaves
are not getting in the way.

In case of U-Boot we:
 a) Don't really run more than 1 core in parallel
 b) We may use whatever core for that

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 16:21:34 +03:00
Alexey Brodkin
2178817c4a arc: Get rid of handwritten string routines
U-Boot is a bit special piese of software because it is being
only executed once on power-on as compared to operating system
for example. That's why we don't care much about performance
optimizations instead we're more concerned about size. And up-to-date
compilers might produce much smaller code compared to
performance-optimized routines copy-pasted from the Linux kernel.

Here's an example:
------------------------------->8--------------------------
--- size_asm_strings.txt
+++ size_c_strings.txt
@@ -1,2 +1,2 @@
    text	   data	    bss	    dec	    hex	filename
- 121260	   3784	   3308	 128352	  1f560	u-boot
+ 120448	   3784	   3308	 127540	  1f234	u-boot
------------------------------->8--------------------------

See we were able to shave off ~800 bytes of .text section.

Also usage of string routines implemented in C gives us an ability
to support more HW flavors for free: generated instructions will match
our target as long as correct compiler option is used.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 16:21:34 +03:00
Alexey Brodkin
4280342adb fdt: Implement weak arch_fixup_fdt()
Only ARM and in some configs MIPS really implement arch_fixup_fdt().
Others just use the same boilerplate which is not good by itself,
but what's worse if we try to build with disabled CONFIG_CMD_BOOTM
and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was
apparently implemented in arch/xxx/lib/bootm.c.

Now with weak arch_fixup_fdt() right in image-fdt.c where it is
used we get both items highlighted above fixed.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-18 12:53:38 -07:00
Alexey Brodkin
d53b128df4 arc: Fix final linkage with Elf32 tools
ARC Elf32 tools by default enable usage of so-called "small data"
section or in ARC PRM parlance "GP-relative addressing".

The idea is to put up to 2kB of frequently used data into a separate
location and use indirect addressing via dedicated core register (GP).
Where GP is used as a base for offset calculation.

And so if "-msdata" toggle is passed to the compiler either explicitly
or implicitly (that's Elf32 tools case) it will try to put some data
in that "small data" area and then to calculate real offset from GP
to be encoded in instructions we need to know the base value which
liker gets from __SDATA_BEGIN__ symbol in hte linker script.

In U-Boot we don't use that feature and linker script doesn't define
__SDATA_BEGIN__ which gives us the following linkage error if we use
Elf32 tools:
------------------------->8-------------------
  LD      u-boot
.../bin/arc-elf32-ld.bfd: Error: Linker symbol __SDATA_BEGIN__ not found
.../bin/arc-elf32-ld.bfd: final link failed: Bad value
------------------------->8-------------------

Note if uClibc or glibc tools are used that problem doesn't happen
because usage of "small data section" is disabled by default as not very
useful for bigger executables. Moreover GP is just another name of r26
so we're loosing 1 core register which is not used by the compiler as a
generic register with "-msdata".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-02-15 15:44:47 +03:00
Eugeniy Paltsev
c0e6769a82 ARC: Invalidate instruction and data caches early on boot
This is useful to make sure no stale data exists in caches after bootloaders.

The worst thing could be some lines of cache were locked in a bootloader
for example during DDR recalibration and never unlocked. This may lead
to really unpredictable issues later down the line.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
7897f4e54c ARC: HSDK: DTS: Add cgu-clk node
Add cgu-clk (clock generation unit) node to HSDK device tree.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
19b10a42f6 ARC: Cache: Fix style violations reported by checkpatch
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
b0146f9e29 ARC: Cache: Disable IOC by default
We'd like to keep IOC HW at the same state as t is right after reset when we
start Linux kernel so there will be no re-configuration of IOC on the go.

The point is U-Boot doesn't benefit a lot from IOC as it doesn't do a
lot of DMA operations especially on multiple cores simultaneously.

At the same time re-configuration of IOC in run-time might become quite
a tricky experience because we need to make sure there're no DMA
trannsactions in flight otherwise unexpected consequencses might affect
us much later and debugging those kinds of issues will be a real
nightmare.

That said let's make our life easier a little bit.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:34 +03:00
Eugeniy Paltsev
41cada4d24 ARC: ARCv2: Cache: Fixed operation without IOC
Previous SLC management implementation is broken. Seems like it was
never sufficiently tested probably because most of the time IOC was used
instead (i.e. no manual cache operations were done).

Now if we disable IOC in U-boot we'll get a lot of errors while using
DMA-enabled peripherals.

This time we fix it by substitution of broken per-line SLC operations
region operations as it is done in the Linux kernel (we took it from
v4.14 which is the latest stable as of today).

Among other things this implementation might be a bit faster because
instead of iteration over each and every cache line we're taking care
about entire region in one go.

Main changes:
 * Replaced __slc_line_op (per line operations) by __slc_rgn_op
   (region operations).

 * Reworked __slc_entire_op to get rid of __after_slc_op and
   __before_slc_op functions.
   Note flush fix (flush only instead of flush-n-inv when OP_FLUSH is
   used, see [1] for more details) is already incorporated here.

 * Added SLC invalidation to invalidate_icache_all().

 * Added (start >= end) check to invalidate_dcache_range() and
   flush_dcache_range() as some buggy drivers pass region start == end.

 * Added read-out of MMU BCR so we may know if PAE40 exists in HW and then
   act on a particular AUX regs accordingly.

[1] http://lists.infradead.org/pipermail/linux-snps-arc/2018-January/003357.html

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:34 +03:00
Eugeniy Paltsev
3cf239394a ARC: cache: explicitly initialize "*_exists" variables
dcache_exists, icache_exists, slc_exists and ioc_exists global
variables in "arch/arc/lib/cache.c" remain uninitialized if
SoC doesn't have corresponding HW.

This happens because we use the next constructions for their
definition and initialization:
-------------------------->>---------------------
int ioc_exists __section(".data");

if (/* condition */)
		ioc_exists = 1;
-------------------------->>---------------------

That's quite a non-trivial issue as one may think of it.
The point is we intentionally put those variables in ".data" section
so they might survive relocation (remember we initilaize them very early
before relocation and continue to use after reloaction). While being
non-initialized and not explicitly put in .data section they would end-up
in ".bss" section which by definition is filled with zeroes.
But since we place those variables in .data section we need to care
about their proper initialization ourselves.

Also while at it we change their type to "bool" as more appropriate.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
64f4742631 ARC: add defines of some cache and xCCM AUX registers
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
e59c379720 ARC: add macro to get CPU id
ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to
uniquely identify each core in a multi-core system.

I.e. with help of this macro each core may get its index in SMP system.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11 11:36:22 +03:00
Eugeniy Paltsev
fc86faf9d6 ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO
With CONFIG_CMD_GPIO compilation reports error:
-------------------------->8---------------------
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
 #include <asm/gpio.h>
                      ^
-------------------------->8---------------------

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-10 21:13:05 +03:00
Alexey Brodkin
f2a226780f arc: cache: Add required NOPs after invalidation of instruction cache
As per ARC HS databook (see chapter 5.3.3.2) it is required to add
3 NOPs after each write to IC_IVIC which we do from now on.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
2017-11-24 19:38:23 +03:00
Alexey Brodkin
d764a20f2b arc: bootm: Move slave cores kick-starting under !fake
Currently slave cores will be kick-started even if we want
to dry run bootm which is not what we really want.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
2017-11-24 19:38:07 +03:00
Paul Burton
593477c6b3 arc: Use asm-generic/io.h
Convert the arc architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arc this is primarily a matter of removing code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-10-02 21:52:20 -04:00
Simon Glass
00caae6d47 env: Rename getenv/_f() to env_get()
We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16 08:30:24 -04:00
Alexey Brodkin
67482f57e6 arc: Add support for HS Development Kit board
ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
 * Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz
 * 4Gb of DDR (we use only lowest 1Gb out of it now)
 * Lots of DesigWare peripherals
 * Different connectivity modules:
     - Synopsys HAPS HT3
     - Arduino-compatible connector
     - MikroBUS

This initial commit supports the following peripherals:
 * UART (DW 8250)
 * Ethernet (DW GMAC)
 * SD/MMC (DW Mobile Storage)
 * USB 1.1 & 2.0

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-06-29 19:34:10 +03:00
Alexey Brodkin
97a63144a9 arcv2: Set IOC aperture so it covers available DDR
We used to use the same memory layout and size for a couple of
boards and thus we just hardcoding IOC aperture start and size.

Now when we're getting more boards with more memory on board we
need to have an ability to set IOC so it matches real DDR layout
and size.

Even though it is not really a must but for simplicity we assume
IOC covers all the DDR we have, that gives us a chance to not
bother where DMA buffers are allocated - any part of DDR is OK.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-06-29 19:34:10 +03:00
Alexey Brodkin
cf628f772e arc: arcv1: Disable master/slave check
ARCompact cores are not supposed to be used in SMP designs
(this doesn't stop people from creation of heterogeneous chips,
for an example keep reading) so there's no point in
checking ARCNUM and halting somebody if we build for ARC700.

Moreover on AXS101 board we have ARC770 in the ASIC together with
other ARC cores and ARC770 happens to be the last node in JTAG chain
with ARCNUM = 4. And existing check halts the one and only core we
want keep running.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-06-29 19:34:10 +03:00
Simon Glass
d6d2d0b5e2 arc: Make u-boot-arc.h a private header
Rather than including this arch-specific header file in common.h, include
it from within arc's u-boot.h header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:31 -04:00
Simon Glass
f1683aa73c board_f: Rename initdram() to dram_init()
This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-13 09:40:57 -04:00
Alexey Brodkin
40a808f173 ARCv2: SLC: Make sure busy bit is set properly on SLC flushing
As reported in STAR 9001165532, an SLC control reg read (for checking
busy state) right after SLC invalidate command may incorrectly return
NOT busy causing software to NOT spin-wait while operation is underway.
(and for some reason this only happens if L1 cache is also disabled - as
required by IOC programming model)

Suggested workaround is to do an additional Control Reg read, which
ensures the 2nd read gets the right status.

Same fix made in Linux kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-04-11 17:54:31 +03:00
Simon Glass
e47b2d674f board_f: Make relocation functions generic
This header file is used by three archs. It could be used by all of them
since relocation is a common function. Move it into a generic file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-05 16:36:57 -04:00
Simon Glass
96d4b75c0d board_f: Make init_helpers generic
This header file is used by two archs. It could be used by all of them
since it allows the cache to be on during relocation. Move it into a
generic file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-05 16:36:56 -04:00
Alexey Brodkin
6cba327bd9 arcv2: Halt non-master cores
Even though we expect only master core to execute U-Boot code
let's make sure even if for some reason slave cores attempt to
execute U-Boot in parallel with master they get halted very early.

If platform wants it may kick-start slave cores before passing control
to say Linux kernel or any other application that want to see all cores
of SMP SoC up and running.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-03-31 22:09:36 +03:00
Vlad Zakharov
3daa7c7b83 arc: use timer driver for ARC boards
This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-24 14:47:52 +03:00
Vlad Zakharov
0c77092e81 arc: dts: separate single axs10x.dts file
We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.

Earlier device tree sources in U-Boot were very simplified and hadn't been
updated for quite a long period of time.

So this commit is the first step on the road to unified device tree blobs.

First of all we re-organize device tree sources for AXS10X boards.
As AXS101 and AXS103 boards consist of AXS10X motherboard and AXC001 and
AXC003 cpu tiles respectively we add corresponding device tree source
files: axs10x_mb.dtsi for motherboard, axc001.dtsi and axc003.dtsi for
cpu tiles and axs101.dts and axs103.dts to represent actual boards.

Also we delete axs10x.dts as it is no longer used.

One more important change - we add timer device to ARC skeleton device
tree sources as both ARC700 and ARCHS cores contain such timer.
We add core_clk nodes to abilis_tb100, nsim, axc001 and axc003 device tree
sources as it is referenced via phandle from timer node in common
skeleton.dtsi file.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-24 14:47:52 +03:00
Vlad Zakharov
ad9b5f77df drivers: timer: Introduce ARC timer driver
This commit introduces timer driver for ARC.

ARC timers are configured via ARC AUX registers so we use special
functions to access timer control registers.

This driver allows utilization of either timer0 or timer1
depending on which one is available in real hardware. Essentially
only existing timers should be mentioned in board's Device Tree
description.

Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-24 14:20:55 +03:00
Simon Glass
a421192fb8 Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig
This converts the following to Kconfig:
   CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25 16:43:48 -05:00
Masahiro Yamada
63c0941726 libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY
Commit e2f88dfd2d ("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.

This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt().  It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed build error for x86:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-12-02 20:54:34 -07:00
Masahiro Yamada
4491327d59 Remove arch/${ARCH}/include/asm/errno.h
Unlike Linux, nothing about errno.h is arch-specific in U-Boot.
As you see, all of arch/${ARCH}/include/asm/errno.h is just a
wrapper of <asm-generic/errno.h>.  Actually, U-Boot does not
export headers to user-space, so we just have to care about the
consistency in the U-Boot tree.

Now all of include directives for <asm/errno.h> are gone.
Deprecate <asm/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-09-23 17:56:18 -04:00
Alexey Brodkin
7c8d816053 arc: Use -mcpu=XXX instead of obsolete -marcXXX
With newer ARC tools old way of CPU specification gets obsolete,
so we're switching to newer and more common way of setting "-mcpu".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-09-16 12:12:26 +03:00
Alexey Brodkin
65fcba1251 arc: Rename AXS101 board to more generic AXS10x
As of now we have 2 flavors of ARC SDP boards:
 1) AXS101 - with ARC770 in ASIC
 2) AXS103 - with ARC HS38 in FPGA

Both options share exactly the same base-board and only differ with
CPU-tiles in use. That means all peripherals are the same (they are
implemented in FPGA on the base-board) and so generic board could be
used for both.

While at it:
 * Recreated defconfigs with savedefconfig
 * In include/configs/axs10x.h numerical sizes replaced with
defines from linux/sizes.h for better readability.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-08-05 12:50:33 +03:00
Alexey Brodkin
cc8be222d1 arc: Rename ARCangel4 board to nSIM
ARCangel was one of the main development boards back in the day but
now it's gone and replaced by other boards like ARC SDP.

But we also used to have simulation platform very similar to ARCangel4
in terms of CPU settings as well as basic IO like UART. Even though
ARCangel4 is long gone now we have a replacement for simulation which is
a plain or stand-alone nSIM and Free nSIM.

Note Free nSIM is available for download here:
https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi

And while at it:
 * Finally switch hex numerical values in nsim.h to defines from
   include/linux/sizes.h
 * Add defconfigs with ARC HS38 cores
 * Recreated all defconfigs with savedefconfig

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-05 12:50:25 +03:00