Add board code for R8A779F0 S4 Spider board.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
Sort headers, use clrbits_le32(), use BIT macros where appropriate
Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
Add Kconfig entry and PRR ID to support R8A779F0 S4 SoC.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update commit message]
Add DTs for R8A779F0 S4 Spider CPU boards and Breakout boards.
Based on Linux next 20230228 DTs up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
Add R8A779F0 S4 DT extras for U-Boot.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update compatible string to match latest upstream]
Add initial DT for R8A779F0 S4 SoC. Based on Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
This adds R-Car Generation 4 (Gen4) support as Renesas ARM64 SoC.
In this version, reusing R-Car Gen3 lowlevel initialize routine [1]
and R-Car Gen3 memory map tables [2] .
[1] arch/arm/mach-rmobile/lowlevel_init_gen3.S
[2] arch/arm/mach-rmobile/memmap-gen3.c
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: - Enable DTO support by default
- Sort the Kconfig lists
- Select RCAR_64 Kconfig option to pull in all the shared
Kconfig options with Gen3, and use where applicable to
deduplicate entries.
- Fix reference [2] typo in commit message
- Drop config options moved to Kconfig, rename rest to CFG_
accordingly to synchronize with upstream changes. Drop
removed CONFIG_VERY_BIG_RAM.
- Move board size limit to arch/Kconfig
- Move GICR_BASE to headers instead of common config]
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the serial nodes of the LX2160A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tag the serial nodes with bootph-all in order to have these nodes and
the drivers available before relocation.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sync the serial nodes of the LS1088A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Move the serial nodes under the soc node. No changes are made to the
nodes, just their location is changed.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The u-boot dts for these boards do not have an soc node, unlike its
Linux counterpart. This patch just adds the soc node as seen in Linux,
the next patches will move some nodes under it.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY. The device trees are already queued for inclusion in Linux 6.3.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support for Data Modul i.MX8M Plus eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR, USB.
Signed-off-by: Marek Vasut <marex@denx.de>
Add WDT reboot bindings on DH i.MX6 DHSOM to permit the platform
to reboot via WDT in U-Boot. These are custom U-Boot bindings,
hence they are placed in -u-boot.dtsi .
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
U-Boot can be booted from NAND without SPL by prepending the DCD header to
the actual U-Boot binary. However this requires prepending 1024 bytes to
u-boot.imx (DCD + u-boot.bin).
There is already a similar target to build spl/u-boot-nand-spl.imx, add the
same option for no-SPL boot.
Tested on i.MX6ULL.
The resulting layout of u-boot-nand.imx is:
- Offset 0x0000 (0 KiB): padding
- Offset 0x0400 (1 KiB): DCD header
- Offset 0x1000 (4 KiB): u-boot.bin
Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
J721e SK has been broken since at least March 2022.
The main-navss and mcu-navss nodes were renamed and this caused the
A72 SPL to fail early in the boot even before the serial port was
enabled. Fix this.
A later patch series between v2022.07 and v2022.10 additionally broke
boot on this board by introducing hbmc nodes which are not present on
this board. The right fix is to disable these by default in the SOC
dtsi file, but for now we can also disable them in the u-boot dtsi.
With both these fixed, we can now boot the j721e SK board fully from
mainline u-boot.
Fixes: 58d61fb5a7 ("arm: dts: k3-j721e-sk: Add initial A72 specific dts support")
Fixes: 297daac43a ("arm: dts: k3-j721e-mcu-wakeup: Add HyperBus Controller node")
Reported-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
[gadiyar@ti.com: update commit description]
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Bryan Brattlof <bb@ti.com>
Originally, the mmc aliases node was present in imx6qdl-pico.dtsi.
After the sync with Linux in commit d0399a46e7 ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.
This causes a boot regression in which the eMMC card cannot be found anymore.
Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the eMMC (esdhc3) was
mapped to mmc0.
Fixes: d0399a46e7 ("imx6dl/imx6qdl: synchronise device trees with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
---------------------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/15819
i.MX patches queued for next:
- Conversions to DM_SERIAL
- Fixes for Toradex boards
- Gateworks Boards
- i.MX8ULP
- EQoS support / fixes, changes in boards
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Merge tag 'u-boot-imx-next-20230331' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
u-boot-imx-next-20230331 for next
---------------------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/15819
i.MX patches queued for next:
- Conversions to DM_SERIAL
- Fixes for Toradex boards
- Gateworks Boards
- i.MX8ULP
- EQoS support / fixes, changes in boards
The FEC interface mode is now configured in common board_interface_eth_init()
and called by FEC MAC driver when appropriate. Drop the board side duplicates
if the same functionality.
Signed-off-by: Marek Vasut <marex@denx.de>
The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.
Signed-off-by: Marek Vasut <marex@denx.de>
The assigned-clock no longer have to be dropped, the clock are now
defined in clk-imx8mp.c and used by DWMAC driver to configure the
DWMAC clock. Drop the workarounds from U-Boot specific DT extras.
Signed-off-by: Marek Vasut <marex@denx.de>
In order for i2c_num==4 and 5 to stay invalid for non-imx8mp SOCs, the
i2c_ccgr[] array must be sized by the number of initializers present,
not with a hard-coded 6 which would implicitly initialize the last two
elements with zeroes.
Also, the bounds check is off-by-one.
Fixes: c92c3a4453 "ARM: imx: imx8mp: Enable support for i2c5 and i2c6 on i.MX8MP"
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Implement common board_interface_eth_init() and call it from the FEC
driver to configure IOMUXC GPR[1] register according to the PHY mode
obtained from DT. This supports all three interface modes supported by
the i.MX8M Mini/Nano/Plus FEC and supersedes the current board-side
configuration of the same IOMUX GPR[1] duplicated in the board files.
Signed-off-by: Marek Vasut <marex@denx.de>
Implement common board_interface_eth_init() and call it from the DWMAC
driver to configure IOMUXC GPR[1] register according to the PHY mode
obtained from DT. This supports all three interface modes supported by
the i.MX8M Plus DWMAC and supersedes current board-side configuration
of the same IOMUX GPR[1] duplicated in the board files.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
The DWMAC clock in i.MX8M Plus were so far configured via ad-hoc
architecture code. Replace that with DM clock instead. This way,
the driver claims all its required clock, enables and disables
them, and even gets the CSR clock rate and sets the TX clock rate,
without any need of architecture specific register fiddling. Drop
the architecture specific code while at it too.
The adjustment here is modeled after STM32MP15xx clock handling
in this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK3 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR and USB 3.0 host.
Signed-off-by: Marek Vasut <marex@denx.de>
The PHY nodes may be activated via DTO in case another SoM variant
is populated into the development kit. Do not delete the nodes.
Signed-off-by: Marek Vasut <marex@denx.de>
The i.MX8MP DHCOM SoM may come with either external RGMII PHY or
LAN8740Ai RMII PHY on the SoM attached to FEC MAC. Add pin mux
settings for both options, so that DT overlay can override these
settings on SoM variant with the LAN8740Ai PHY.
Signed-off-by: Marek Vasut <marex@denx.de>
The i.MX8MP DHCOM SoM may come with either KSZ9131RNXI RGMII PHY
or LAN8740Ai RMII PHY on the SoM attached to EQoS MAC. Add pin
mux settings for both options, so that DT overlay can override
these settings on SoM variant with the LAN8740Ai PHY.
Signed-off-by: Marek Vasut <marex@denx.de>
The current variant of the SoM has LAN8740Ai PHY connected to EQoS
strapped to MDIO address 0 , adjust the MDIO address to match the
hardware.
Signed-off-by: Marek Vasut <marex@denx.de>
Definitions are according to the MV78460 Hardware Specifications.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
A385 BootROM fills into bits [31:28] of register 0x182d0 tracing value,
which represents in which state BootROM currently is. BootROM fills one
of the possible values: 0x2 (CPU initialization), 0x3 (UART detection),
0x6 (UART booting), 0x8 (PCI Express booting), 0x9 (parallel or SPI NOR
booting), 0xA (parallel or SPI NAND booting), 0xB (SATA booting) and 0xE
(SD / eMMC booting).
Meaning of these values matches TRACE_* macros from Marvell soc_spec.h file:
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/blob/u-boot-2013.01-armada-18.06/tools/marvell/doimage_mv/soc_spec.h
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This allows to merge BOOT_FROM_MMC and BOOT_FROM_MMC_ALT constants to one
macro. And also allows to extend other BOOT_FROM_* macros for other
variants.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
A385 BootROM treats strapping configuration 0x22 as SPI-NAND. So remove
incorrect definition 0x22 as SATA. SATA on A385 has configuration 0x2A.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
A385 BootROM treats strapping configuration 0x3f as invalid. When booting
fails (e.g. because of invalid configuration) then BootROM fallbacks to
UART booting.
Detecting BootROM fallback to UART booting is implemented in U-Boot since
commit 2fd4284051 ("ARM: mach-mvebu: handle fall-back to UART boot").
So there is no need to define BOOT_FROM_UART_ALT constant and special
handling for it anymore, remove it.
This change effectively revers commit f3a88e2ca1 ("arm: mvebu: fix boot
from UART on ClearFog Base").
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Show correct information in debug() output and use correct names for variables.
No functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
[upstream of vendor commit 19a96f7c40a8fc1d0a6546ac2418d966e5840a99]
The Clearfog devices have only one SDHC device. This is either eMMC if
it is populated on the SOM or SDHC if not. The Linux device tree assumes
the SDHC case. Detect if the device is an eMMC and fixup the device-tree
so it will be detected by Linux.
Ported from vendor repo at https://github.com/SolidRun/u-boot
Signed-off-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
A388 Clearfog MMC is either SD Card or eMMC with different behaviour for
both. Setting the device to non-removable in the u-boot.dtsi allows both
to correctly detect the device.
Signed-off-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Originally, the mmc aliases node was present in imx6qdl-pico.dtsi.
After the sync with Linux in commit d0399a46e7 ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.
This causes a boot regression in which the eMMC card cannot be found anymore.
Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the eMMC (esdhc3) was
mapped to mmc0.
Fixes: d0399a46e7 ("imx6dl/imx6qdl: synchronise device trees with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
