This introduces 200MHz Micron parts timing information based on x-loader
to <asm/arch-omap3/mem.h> and Numonyx MCFG calculation. The memory init
logic is also based on what x-loader does in these cases. Note that
while previously u-boot would be flashed in with SW ECC in this case it
now must be flashed with HW ECC. We also change CONFIG_SYS_TEXT_BASE to
0x80100000.
Cc: Dirk Behme <dirk.behme@gmail.com>
Beagleboard rev C5, xM rev A:
Tested-by: Tom Rini <trini@ti.com>
Beagleboard xM rev C:
Tested-by: Matt Ranostay <mranostay@gmail.com>
Beagleboard rev B7, C2, xM rev B:
Tested-by: Matt Porter <mporter@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
This changes to making the board be responsible for providing the
memory initialization timings in SPL and converts the devkit8000
to this framework. In SPL we try and initialize both CS0 and CS1.
Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Signed-off-by: Tom Rini <trini@ti.com>
- booting from NOR Flash with direct boot method
- POST support
- LOGBUF support
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Christian Riesch <christian.riesch@omicron.at>
The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors
that contain pinmux configurations for emac, uarts, memory controllers...
In an earlier patch such pinmux configurations were added to the arch
tree. This patch makes the hawkboard use these definitions instead of
defining its own.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Syed Mohammed Khasim <sm.khasim@gmail.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors
that contain pinmux configurations for emac, uarts, memory controllers...
In an earlier patch such pinmux configurations were added to the arch
tree. This patch makes the da850evm use these definitions instead of
defining its own.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
The previous commit changed it to "zero two" instead of the proper "Oh two". This was completely broken!
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Acked-by: Tom Rini <trini@ti.com>
Fix:
arch/arm/cpu/arm926ejs/davinci/libdavinci.o: In function `timer_init':
/work/agust/git/u-boot/arch/arm/cpu/arm926ejs/davinci/timer.c:62:
undefined reference to `davinci_arm_clk_get'
drivers/i2c/libi2c.o: In function `i2c_init':
/work/agust/git/u-boot/drivers/i2c/davinci_i2c.c:102:
undefined reference to `davinci_arm_clk_get'
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
This patch removes the definition of stack sizes for
irq and fiq if the CONFIG_USE_IRQ is undefined before.
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
This patch removes the unused definition of SDRC_R_C_B
from the config files.
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Acked-by: Tom Rini <trini@ti.com>
This patch removes the CONFIG_OMAP3430, because it is unused.
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Change the CONFIG_SYS_TEXT_BASE and the addresses of SDRAM
buffers used by SPL(heap and BSS) keeping in mind the
following requirements:
1. Make sure that SPL's heap and BSS doesn't come in the way
of Linux kernel, which is typically loaded at 0x80008000. This
will be important when SPL directly loads kernel.
2. Align the CONFIG_SYS_TEXT_BASE between TI internal
U-Boot and mainline U-Boot. This avoids a lot of confusion
and allows for the inter-operability of x-loader, SPL,
internal U-Boot, mainline U-Boot etc. The internal U-Boot's
address can not be changed to that of mainline U-Boot
as internal U-Boot doesn't have relocation and 0x80100000
used by mainline U-Boot will clash with kernel
3. Assume only a minimum amount of memory that may be available
on any practical OMAP4/5 board in future too. We are assuming
a minimum of 128 MB of memory
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
V2: Add missing u-boot-spl.lds, convert bitshifts to division,
convert to spl_onenand_load_image()
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Add support for the Ethernut 5 open hardware design, based
on Atmel's AT91SAM9XE512 SoC.
V4
- Fix several coding style issues.
- Move machine type to config file.
- Remove use of CONFIG_ATMEL_LEGACY.
Signed-off-by: Tim Schendekehl <tim.schendekehl@egnite.de>
This patch groups together all the common functions for LaCie boards:
Ethernet PHY and MAC address initializations.
Moreover the configurations for LaCie Kirkwood boards are merged into
a single file: include/configs/lacie_kw.h
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
This patch adds support for the LaCie 2Big Network v2 board, based on
the Marvell Kirkwood 6281 SoC.
Additional information is available at:
http://lacie-nas.org/doku.php?id=2big_network_v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
I don't know what exactly the code was going for, but the object code
is the same before/after my change, and in looking at the env strings,
this seems to be OK.
Otherwise gcc warns:
cc1: warning: unknown escape sequence: '\$'
cc1: warning: unknown escape sequence: '\)'
cc1: warning: unknown escape sequence: '\040'
cc1: warning: unknown escape sequence: '\$'
cc1: warning: unknown escape sequence: '\)'
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The ecovec board has SH7724, 256MB DDR2-SDRAM, USB,
Ethernet, and more.
This patch supports the following functions:
- 256MB DDR2-SDRAM
- USB
- I2C
- Ethernet
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The new sh_eth driver uses the phy driver. So, this patch enables it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The new sh_eth driver uses the phy driver. So, this patch enables it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
When DDR-ECC is effective, the physical memory which can be used
reduces this boardby half. However, this mode can chenge to disable.
When it was disabled, user can use 512 MB of physical memory.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: "Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>
Acked-by: "Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The new sh_eth driver uses the phy driver. So, this patch enables it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* 'master' of git://git.denx.de/u-boot-mpc85xx:
mpc85xx: support for Freescale COM Express P2020
arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning
mpc85xx: support board-specific reset function
powerpc/85xx: verify the localbus device tree address before booting the OS
mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
powerpc/p3060qds: Add board related support for P3060QDS platform
powerpc/85xx: clean up and document the QE/FMAN microcode macros
powerpc/85xx: always implement the work-around for Erratum SATA_A001
powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h
powerpc/85xx: Add workaround for erratum A-003474
powerpc/85xx: fixup flexcan device tree clock-frequency
powerpc/85xx: Add workaround for erratum CPU-A003999
This patch switches PMC440 board code to the CONFIG_PCI_BOOTDELAY option
instead of using a private implemention. This relies on Anatolji's patch
that moves the pcidelay handling behind pci_target_init.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This adds support for the Freescale COM Express P2020 board. This board
is similar to the P1_P2_RDB, but has some extra (as well as missing)
peripherals.
Unlike all other mpc85xx boards, it uses a watchdog timeout to reset.
Using the HRESET_REQ register does not work.
This board has no NOR flash, and can only be booted via SD or SPI. This
procedure is documented in Freescale Document Number AN3659 "Booting
from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is
provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated
Processor Reference Manual" (section 4.5).
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The P3060QDS is a Freescale reference board for the six-core P3060 SOC.
P3060QDS Board Overview:
Memory subsystem:
- 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
- 128M Bytes NOR flash single-chip memory
- 16M Bytes SPI flash
- 8K Bytes AT24C64 I2C EEPROM for RCW
Ethernet:
- Eight Ethernet controllers (4x1G + 4x1G/2.5G)
- Three VSC8641 PHYs on board (2xRGMII + 1xMII)
- Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
PCIe: Two PCI Express 2.0 controllers/ports
USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
I2C: Four I2C controllers
UART: Supports two dUARTs up to 115200 bps for console
RapidIO: Two RapidIO, sRIO1 and sRIO2
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman. Both the QE and the Fman
use the QE Firmware binary format to package their respective microcode data,
which is why the same macros are used for both. A given SOC will only have
a QE or an Fman, so this is safe.
Unfortunately, the current macro definition and usage has inconsistencies.
For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman
firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address
of NAND. There's no way to know by looking at a variable how it's supposed
to be used.
In the future, the code which uploads QE firmware and Fman firmware will
be merged.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Macro CONFIG_FSL_SATA_V2 is defined if the SOC has a V2 Freescale SATA
controller, so it should be defined in config_mpc85xx.h instead of the various
board header files. So now CONFIG_FSL_SATA_V2 is always defined on the P1013,
P1022, P2041, P3041, P5010, and P5020. It was already defined for the
P1010 and P1014.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch fixes the build breakage for the davinci_sonata board.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sergey Kubushyn <ksi@koi8.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
This patch fixes the build breakage for the davinci_schmoogie board.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sergey Kubushyn <ksi@koi8.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
MACH_TYPE_FARADAY was dropped from mach-types.h. Add it back to
board config file.
Signed-off-by: Yan-Pai Chen <ypchen@faraday-tech.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Change my old email address which is no longer valid.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
As a result of the commit 6833260 the uart16550 driver
is broken for Microblaze big endian systems, because of
the missing 3 byte offset. Other than as described, not
all U-Boot BSP will treat properly the 3 byte offset.
This why prefer to mask out the 3 byte offset in general
and setup correct _REG_SIZE value depending on edianess.
Signed-off-by: Stephan Linz <linz@li-pro.net>
Tested-by: Michal Simek <monstr@monstr.eu>
* 'master' of git://git.denx.de/u-boot-nios:
nios2: Offer ft_board_setup() capability and call fdt_fixup_ethernet().
board/nios2-generic: Use altera_pio driver and remove board specific driver
gpio: Add driver for Altera's PIO core
nios2: Pseudo implement dcache_status/enable/disable()
* 'master' of git://git.denx.de/u-boot-arm:
arm, davinci: add DAVINCI_MMC_CLKID
arm, davinci_emac: fix driver bug if more then 3 PHYs are detected
arm, davinci: da850/dm365 lowlevel cleanup
omap5: Add omap5_evm board build support.
omap4/5: Add support for booting with CH.
omap5: emif: Add emif/ddr configurations required for omap5 evm
omap5: clocks: Add clocks support for omap5 platform.
omap5: Add minimal support for omap5430.
omap: Checkpatch fixes
omap4: make omap4 code common for future reuse
GCC4.6: Squash warnings in onenand_base.c
GCC4.6: Fix common/usb.c on xscale
OneNAND: Add simple OneNAND SPL
PXA: vpac270: Enable the new generic MMC driver
PXA: Cleanup serial_pxa
PXA: Drop csb226 and innokom boards (unmaintained)
m28evk: Fix comment about the number of RAM banks
mx31: Fix checkpatch warnings in generic.c
mx31: Use proper IO accessor for GPR register
mx31: Remove duplicate definition for GPR register
qong: Use generic function for configuring GPR register
M28EVK: Enable USB HOST support
iMX28: Add USB HOST driver
iMX28: Add USB and USB PHY register definitions
M28: Add memory detection into SPL
iMX28: Fix ARM vector handling
M28: Add doc/README.m28 documentation
M28: Add MMC SPL
iMX28: Add support for DENX M28EVK board
iMX28: Add u-boot.sb target to Makefile
iMX28: Add image header generator tool
iMX28: Add driver for internal RTC
iMX28: Add GPMI NAND driver
iMX28: Add APBH DMA driver
iMX28: Add SPI driver
iMX28: Add GPIO control
iMX28: Add I2C bus driver
iMX28: Add PINMUX control
FEC: Add support for iMX28 quirks
iMX28: Add SSP MMC driver
iMX28: Initial support for iMX28 CPU
MX25: zmx25: GCC4.6 fix build warnings
da850: add new config file for AM18xx
BeagleBoard: config: Switch to ttyO2
OMAP3: Change omap3_evm maintainer
devkit8000: Fix NAND SPL on boards with 256MB NAND
integrator: enable Vpp and disable flash protection
integrator: add system controller header
integrator: make flash writeable on boot
integrator: use io-accessors for board init
integrator: move text offset to config
integrator: pass configs for core modules
ARM: remove superfluous setting of arch_number in board specific code.
SPL: Allow ARM926EJS to avoid compiling in the CPU support code
integrator: do not test first part of the memory
arm: a320: fix broken timer
ARM: define CONFIG_MACH_TYPE for all ronetix boards
dm646x: pass board revision info to kernel
dm646x: add new configuration for dm6467T
arm, davinci: Fix setting of the SDRAM configuration register
arm, davinci: Remove the duplication of LPSC functions
arm, davinci: Rename AM1808 lowlevel functions to DA850
da8xxevm: fix build error
ARM: re-add MACH_TYPE_XXXXXX for VCMA9 board and add CONFIG_MACH_TYPE
This patch adds the build support for the
omap5_evm board.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Configuration header(CH) is 512 byte header attached to an OMAP
boot image that will help ROM code to initialize clocks, SDRAM
etc and copy U-Boot directly into SDRAM. CH can help us in
by-passing SPL and directly boot U-boot, hence it's an alternative
for SPL. However, we intend to support both CH and SPL for OMAP4/5.
Initialization done through CH is limited and is not equivalent
to that done by SPL. So U-Boot has to distinguish between the
two cases and handle them accordingly. This patch takes care
of doing this.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds the minimal support for OMAP5. The platform and machine
specific headers and sources updated for OMAP5430.
OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture.
It's a dual core SOC with GIC used for interrupt handling and SCU for cache
coherency.
Also moved some part of code from the basic platform support that can be made
common for OMAP4/5. Rest is kept out seperately. The same approach is followed
for clocks and emif support in the subsequent patches.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
In order to support 1920x01080 resolution, we must increase the alloc
length.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
m28evk has one bank of RAM.
Fix the comment.
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
This enables the second port, aka. the port with the USB connector on the
M28EVK.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
This code allows the DDR DRAM size to be detected at runtime. The RAM size is
stored into two scratch registers, from which it is then fetched in U-Boot.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
This patch introduces proper ARM vector handling for i.MX28 CPU. This issue
wasn't addressed because the interrupts weren't enabled on any ARMv5 core,
therefore the issue wasn't noticed earlier.
In previous implementation, the vectoring code used by i.MX28 CPU when an
exception happened was that of the SPL. With this change, the branch target when
an exception happens can be reconfigured by U-Boot.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
This patch adds SPL code for the M28 board.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
This contains support for the following components:
- DUART
- MMC
- Both FEC interfaces
- NAND
- I2C (RTC, EEPROM)
- SPI (FLASH)
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
add new configuration file da850_am18xxevm.h for AM18xx boards
which are based on da850 SOC. AM18xx has WINBOND spi flash which
is indicated in the config file. And make appropriate changes in
board.cfg for building.
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This is needed to support the latest kernel versions.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The devkit8000 ships with either a 128MB or 256MB NAND chip. In
order for SPL to work with 256MB NAND CONFIG_SYS_NAND_5_ADDR_CYCLE
needs to be set. After talking with Scott Wood this should be
safe to set even for smaller NAND chips.
Cc: Scott Wood <scottwood@freescale.com>
Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Do away with the config.mk file and move the text offset to the
config files to make things easier.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We cause CCSRBAR to be relocated in the SPL phase of NAND boot which
isn't expected and breaks things. Fixing the board config.h to NOT
relocate CCSR during the CONFIG_NAND_SPL phase.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add board_eth_init(). PCIe network card is also supported.
Put RGMII init after tsec_eth_init().
Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3.
Signed-off-by: Ebony Zhu
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
add a function in board file to pass board revision
info to kernel. Revision number 0 and 1 are passed in
case of DM6467 and DM6467T respectively.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
add new configuration file for dm6467T and appropraite changes
in boards.cfg. dm6467T is the new varaiant of dm6467 SOC which
supports 33 MHz reference clock where as dm6467 supports 27 MHz
reference clock.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The new MPC8360EMDS board changes the oscillator to 33.33MHz
in order to support QE 500MHz since 2008.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 'master' of git://git.denx.de/u-boot-arm:
Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board
arm: jadecpu: Readd MACH_TYPE_JADECPU
at91: defined mach-types for otc570 board in board config file
at91: defined mach-types for meesc board in board config file
mx31pdk: Enable D and I caches
ehci-mxc: remove incorrect comment
README: Fix supported i.MX SoC list for CONFIG_MXC_SPI
mx53: Turn off child clocks before reconfigure perclk_root
qong: enable support for compressed images
imx: imx31_phycore.h: fix checkpatch warnings
vision2: Remove unused get_board_rev function
mx53smd: Remove unused get_board_rev function
mx53ard: Remove unused get_board_rev function
mx53evk: Remove unused get_board_rev function
mx53evk: Add RTC support
mx53loco: Remove unused get_board_rev function
mx53evk: Remove unneeded '1' from mx53evk.h
OMAP3: mvblx: Initial support for mvBlueLYNX-X
ARM: dig297: Define MACH_TYPE_OMAP3_CPS and CONFIG_MACH_TYPE
omap3: mem: Move comments next to definitions
omap3: mem: Clean-up whitespaces
omap3: mem: Define and use common macros
Davinci: ea20: added PREBOOT to configuration
Davinci: ea20: added I2C support
Davinci: ea20: added video support
VIDEO: davinci: add framebuffer to da8xx
ARM: Davinci: added missing registers to hardware.h
Davinci: ea20: add gpios for LCD backlight control
Davinci: ea20: add gpio for keeping power on in board_late_init
Davinci: ea20: Add default U-Boot environment
Davinci: ea20: Add early init to get early output from console
Davinci: ea20: Add NAND support
Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
Davinci: ea20: set console on UART0
arm, davinci: add cam_enc_4xx support
arm926ejs, davinci: add missing spi defines for dm365
arm926ejs, davinci: add cpuinfo for dm365
arm, davinci: add lowlevel function for dm365 soc
arm, davinci: add header files for dm365
spl, nand: add 4bit HW ecc oob first nand_read_page function
arm, davinci: add support for new spl framework
spl: add option for adding post memory test to the SPL framework
net, davinci_emac: make clock divider in MDIO control register configurable
arm, usb, davinci: make USBPHY_CTL register configurable
usb, davinci: add enable_vbus() weak function
omap3evm: fix errors caused by multiple definitions
omap3evm: Add (quick) configuration for NAND only
omap3evm: Add (quick) configuration for MMC/SD only
omap3evm: move common config options to new file
omap3evm: Prepare to split configuration
omap3evm: Reorder related config options
omap/spl: actually enable the console
davinci_emac: compilation fix, phy is array now
omap3evm: Set environment variable 'ethaddr'
arm, arm926: fix missing symbols in NAND_SPL mode
arm, davinci: Add function lpsc_syncreset()
arm, davinci: replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
arm/km: portl2 environment address update to P1B
arm/km: adapt bootcounter evaluation
arm/km: enable jffs2 cmds
arm/km: trigger reconfiguration for the Xilinx FPGA
arm/km: add boardid and hwkey to kernel command line
ARM: Reintroduce MACH_TYPE_KM_KIRKWOOD for keymile ARM boards
netspace_v2: enable I2C EEPROM support
netspace_v2: fix SDRAM configuration
armada100: define CONFIG_SYS_CACHELINE_SIZE
pantheon: define CONFIG_SYS_CACHELINE_SIZE
kirkwood: define CONFIG_SYS_CACHELINE_SIZE
kirkwood: drop empty asm-offsets.s file
arm/km/mgcoge3un: enhance "waitforne" feature
arm/km: add variable waitforne to mgcoge3un
gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared
ARM: dreamplug: fix compilation
ARM: DockStar: fix compilation
ARM: netspace_v2: fix warnings
am335x: Drop board_sysinfo struct
am335x: Temporarily add MACH_TYPE define
misc:pmic:samsung Enable PMIC driver at C210 Universal target
dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p UNIVERSAL C210 target
dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target
smdkv310: use macro for mmc data read function address
smdkv310: use spl framework for mmc spl
SMDKV310: use get_ram_size() to validate dram size
SMDKV310: Initialize board id using CONFIG_MACH_TYPE
ORIGEN : use absolute paths and fix tool naming
ORIGEN : enable device tree support
MX25: tx25: Fix building due to missing MACH_TYPE
mx31: Add board support for HALE TT-01
mx31: add ESD control registers
mx31: define pins and init for UART2 and CSPI3
MX35: add support for flea3 board
MX51: vision2: add MACH_TYPE in config file
vision2: Remove unused header file
mx51evk: Remove unused get_board_rev function
mx51evk: Remove unneeded '1' from mx51evk.h
I2C: Fix mxc_i2c.c problem on imx31_phycore
mx35pdk: Add RTC support
mx51evk: Use GPIO API for configuring the IOMUX
mx51evk: Add RTC support
rtc: Make mc13783-rtc driver generic
qong: remove unneeded IOMUX settings
qong: Use mx31_set_gpr to setup USBH2 pins
mx31: Introduce mx31_set_gpr function
mx31pdk: Add MC13783 PMIC support
qong: remove unneeded "1" from qong.h
misc: pmic: fix regression in pmic_fsl.c (SPI)
mx5 configs: CONFIG_PRIME should really be CONFIG_ETHPRIME
MX35: Drop unnecessary prototypes from imx-regs.h
I2C: added I2C-2 and I2C-3 to MX35
MX35: factorize common assembly code
MX35: add reset cause as provided by other i.MX
MX35: add pins definition for UART3
MX35: added ESDC structure to imx-regs
* 'master' of git://git.denx.de/u-boot-coldfire:
ColdFire: The EB+MCF-EV123 boards config update
ColdFire: Fix the compile issue for M52277
ColdFire:Moving the remaining coldfire boards to boards.cfg
This also fixes a build warning:
main.c: In function 'main_loop':
main.c:311:16: warning: variable 'bootlimit' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de>
After commit 327474f854, the
M52277EVB_stmicro configuration fail to build. Fix it by moving
the env outside the flash and update the lds file.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
* re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
quotation from Albert ARIBAUD:
"Recently the ARM mach-types.h file has been brought in sync with its
Linux original, leasing to a number of boards not being listed any more,
as the new list only contains boards which have actual Linux support or
were declared less than one year ago.
The symptom is a build failure with a message of the form "error:
'MACH_TYPE_XXXXXX' undeclared (first use in this function)".
U-Boot maintainers of such boards (in Cc: of this mail) should provide a
patch to re-introduce the MACH_TYPE_XXXXXX definition in their boards'
config header file in include/configs/."
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
quotation from Albert ARIBAUD:
"Recently the ARM mach-types.h file has been brought in sync with its
Linux original, leasing to a number of boards not being listed any more,
as the new list only contains boards which have actual Linux support or
were declared less than one year ago.
The symptom is a build failure with a message of the form "error:
'MACH_TYPE_XXXXXX' undeclared (first use in this function)".
U-Boot maintainers of such boards (in Cc: of this mail) should provide a
patch to re-introduce the MACH_TYPE_XXXXXX definition in their boards'
config header file in include/configs/."
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
- enable support for unzip command
- enable support for compressed bitmap images
We also have to increase the malloc() arena a bit for this.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
No board information is passed for MX53EVK, so remove get_board_rev function.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
No board information is passed for MX53LOCO, so remove get_board_rev function.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Remove unneeded '1' from mx53evk.h.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Add support for the MATRIX VISION mvBlueLYNX-X, an OMAP3-based
intelligent camera.
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
MACH_TYPE_OMAP3_CPS was dropped in the latest mach-types sync (47af6f61bc)
because it is not mainlined in Linux.
Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Wolfgang Denk <wd@denx.de>
CC: Tom Rini <tom.rini@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The new MPC8360EMDS board supports 512MB DDR since 2008.
For 512MB DDR:
BAT0 is used for the first 256MB memory, BAT4 is used for the second
256MB memory and the address space of SDRAM follows the DDR, so if the
size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of
DDR is 512MB, the BAT4 will be used for the second 256MB memory and
there is no BAT for SDRAM.
Therefore, if the size of DDR is 512MB, this patch will use BAT6 for
SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the
codes relocates to the DDR.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Kim Phillips <kim.phillips@freescale.com>
Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring
Cleanup the setting of the csnbds to respect the setting of
CONFIG_SYS_DDR_SDRAM_BASE
Use __ilog2 instead of writing the code to compute it
Disable unused CS configs
Ensure ddrlaw.bar is configured
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
