powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds

The new MPC8360EMDS board changes the oscillator to 33.33MHz
in order to support QE 500MHz since 2008.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
Jerry Huang 2011-11-07 13:20:21 +08:00 committed by Kim Phillips
parent d37be07ee5
commit 6be55ee225
3 changed files with 50 additions and 10 deletions

View file

@ -542,11 +542,16 @@ MPC8349EMDS powerpc mpc83xx mpc8349emds freesca
MPC8349ITX powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX
MPC8349ITXGP powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000
MPC8349ITX_LOWBOOT powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX,SYS_TEXT_BASE=0xFE000000
MPC8360EMDS powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:
MPC8360EMDS_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1
MPC8360EMDS_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_33M,PQ_MDS_PIB=1
MPC8360EMDS_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_66M,PQ_MDS_PIB=1
MPC8360EMDS_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCISLAVE
MPC8360EMDS_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_66MHZ
MPC8360EMDS_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ
MPC8360EMDS_66_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_66MHZ,PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1
MPC8360EMDS_33_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1
MPC8360EMDS_66_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_66MHZ,PCI,PCI_33M,PQ_MDS_PIB=1
MPC8360EMDS_33_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_33M,PQ_MDS_PIB=1
MPC8360EMDS_66_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_66MHZ,PCI,PCI_66M,PQ_MDS_PIB=1
MPC8360EMDS_33_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_66M,PQ_MDS_PIB=1
MPC8360EMDS_66_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_66MHZ,PCI,PCISLAVE
MPC8360EMDS_33_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCISLAVE
MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK
MPC8360ERDK_33 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK:CLKIN_33MHZ
MPC8360ERDK_66 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK

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@ -87,28 +87,36 @@ Freescale MPC8360EMDS Board
4. Compilation
MPC8360EMDS shipped with 33.33MHz or 66MHz oscillator(check U41 chip).
Assuming you're using BASH shell:
export CROSS_COMPILE=your-cross-compile-prefix
cd u-boot
make distclean
make MPC8360EMDS_config
make MPC8360EMDS_XX_config
make
MPC8360 support PCI in host and slave mode.
MPC8360EMDS support ATM, PCI in host and slave mode.
To make u-boot support ATM :
1) Make MPC8360EMDS_XX_ATM_config
To make u-boot support PCI host 66M :
1) DIP SW support PCI mode as described in Section 1.1.
2) Make MPC8360EMDS_HOST_66_config
2) Make MPC8360EMDS_XX_HOST_66_config
To make u-boot support PCI host 33M :
1) DIP SW setting is similar as Section 1.1, except for SW3[4] is 1
2) Make MPC8360EMDS_HOST_33_config
2) Make MPC8360EMDS_XX_HOST_33_config
To make u-boot support PCI slave 66M :
1) DIP SW setting is similar as Section 1.1, except for SW9[3] is 1
2) Make MPC8360EMDS_SLAVE_config
2) Make MPC8360EMDS_XX_SLAVE_config
(where XX is:
33 - 33.33MHz oscillator
66 - 66MHz oscillator)
5. Downloading and Flashing Images

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@ -39,6 +39,18 @@
/*
* System Clock Setup
*/
#ifdef CONFIG_CLKIN_33MHZ
#ifdef CONFIG_PCISLAVE
#define CONFIG_83XX_PCICLK 33330000 /* in HZ */
#else
#define CONFIG_83XX_CLKIN 33330000 /* in Hz */
#endif
#ifndef CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_CLK_FREQ 33330000
#endif
#elif defined(CONFIG_CLKIN_66MHZ)
#ifdef CONFIG_PCISLAVE
#define CONFIG_83XX_PCICLK 66000000 /* in HZ */
#else
@ -48,10 +60,24 @@
#ifndef CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_CLK_FREQ 66000000
#endif
#else
#error Unknown oscillator frequency.
#endif
/*
* Hardware Reset Configuration Word
*/
#ifdef CONFIG_CLKIN_33MHZ
#define CONFIG_SYS_HRCW_LOW (\
HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
HRCWL_DDR_TO_SCB_CLK_1X1 |\
HRCWL_CSB_TO_CLKIN_8X1 |\
HRCWL_VCO_1X2 |\
HRCWL_CE_PLL_VCO_DIV_4 |\
HRCWL_CE_PLL_DIV_1X1 |\
HRCWL_CE_TO_PLL_1X15 |\
HRCWL_CORE_TO_CSB_2X1)
#elif defined(CONFIG_CLKIN_66MHZ)
#define CONFIG_SYS_HRCW_LOW (\
HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
HRCWL_DDR_TO_SCB_CLK_1X1 |\
@ -61,6 +87,7 @@
HRCWL_CE_PLL_DIV_1X1 |\
HRCWL_CE_TO_PLL_1X6 |\
HRCWL_CORE_TO_CSB_2X1)
#endif
#ifdef CONFIG_PCISLAVE
#define CONFIG_SYS_HRCW_HIGH (\