mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
microblaze: Remove address offset for uart16550
U-Boot BSP handle 0x3 offset for big endian systems. Little endian Microblaze systems don't use any offset. Signed-off-by: Michal Simek <monstr@monstr.eu>
This commit is contained in:
parent
1252df0659
commit
68332608bc
1 changed files with 1 additions and 1 deletions
|
@ -44,7 +44,7 @@
|
|||
# define CONFIG_SYS_NS16550_REG_SIZE -4
|
||||
# define CONFIG_CONS_INDEX 1
|
||||
# define CONFIG_SYS_NS16550_COM1 \
|
||||
(XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
|
||||
(XILINX_UART16550_BASEADDR + 0x1000)
|
||||
# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
|
||||
# define CONFIG_BAUDRATE 115200
|
||||
|
||||
|
|
Loading…
Reference in a new issue