Commit graph

24518 commits

Author SHA1 Message Date
Simon Glass
4f427a421f fdt: Update functions which write to an FDT to return -ENOSPC
When writing values into an FDT it is possible that there will be
insufficient space. If the caller gets a useful error then it can
potentially deal with the situation.

Adjust these functions to return -ENOSPC when the FDT is full.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:46 -04:00
Simon Glass
63b4b5bae5 fdt: Add DEV_TREE_BIN option to specify a device tree binary file
In some cases, an externally-built device tree binary is required to be
attached to U-Boot. An example is when using image signing, since in that
case the .dtb file must include the public keys.

Add a DEV_TREE_BIN option to the Makefile, and update the documentation.

Usage is something like:

	make DEV_TREE_BIN=boot/am335x-boneblack-pubkey.dtb

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:46 -04:00
Simon Glass
31890ae299 hash: Export the function to show a hash
This function is useful for displaying a hash value, so export it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:46 -04:00
Simon Glass
7e4154a553 am33xx/omap: Allow cache enable for all Sitara/OMAP
Enable the cache for all devices, unless CONFIG_SYS_DCACHE_OFF is defined.
This speeds up the Beaglebone Black boot considerable.

(Tested only on Beaglebone Black with SD card boot)

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:39 -04:00
Simon Glass
89742924c8 Check that u-boot.bin size looks correct
Check that the image size matches the size we get from u-boot.bin. If it
doesn't, that generally means that some extra sections are being added to
u-boot.bin, meaning that it is not possible to access data appended to
the U-Boot binary. This is used for device tree, so needs to work.

This problem was introduced by commit b02bfc4. By adding a test we can
prevent a reccurence.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:39 -04:00
Simon Glass
6469a34678 mx31ads: Fix the U-Boot binary output
Correct the binary output so that image_binary_size is really at the
end of the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:39 -04:00
Simon Glass
b8f91eb867 cm_t335: Fix the U-Boot binary output
Correct the binary output so that image_binary_size is really at the
end of the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:39 -04:00
Simon Glass
ad3cd07f04 ti: am335x: Fix the U-Boot binary output
This should include the hash so that image_binary_size is really at the
end of the image, and not some 300 bytes earlier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:39 -04:00
Jeroen Hofstee
18b06652cd tools: include u-boot version of sha256.h
When building tools the u-boot specific sha256.h is required, but the
host version of sha256.h is used when present. This leads to build errors
on FreeBSD which does have a system sha256.h include. Like libfdt_env.h
explicitly include u-boot's sha256.h.

cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Simon Glass <sjg@chromium.org>
2014-06-11 16:25:38 -04:00
Jeroen Hofstee
9262233a96 Makefile: fix clang warnings due to clang support
Building u-boot tools with clang as a host compiler e.g. on
FreeBSD with `gmake HOSTCC=clang CONFIG_USE_PRIVATE_LIBGCC=y tools`
leads to many warnings [1] for every compiler invocation since
commit 598e2d33. Part of mentioned commit imports linux patches:

 - kbuild: LLVMLinux: Adapt warnings for compilation with clang
 - kbuild: LLVMLinux: Add Kbuild support for building kernel with Clang

No version of clang supports the gcc fno-delete-null-pointer-checks
though, but it is only passed to clang. Gcc does not have the clang
specific Qunused-arguments for the target. Furthermore several
warnings are disabled which aren't encountered in u-boot. Since such
a build has worked for quite some time and works after removing these
changes, just remove the clang specific handling to restore normal
building with clang as hostcc.

[1] Actual warnings
-------------------
  GEN     include/autoconf.mk.dep
arm-freebsd-gcc: unrecognized option '-Qunused-arguments'

  HOSTCC  scripts/basic/fixdep
clang: warning: argument unused during compilation:
                '-fno-delete-null-pointer-checks'

cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-06-11 16:25:38 -04:00
Tom Rini
28b62f0de3 Merge branch 'master' of git://git.denx.de/u-boot-spi 2014-06-11 11:40:11 -04:00
Tom Rini
61e76f5370 Merge branch 'master' of git://git.denx.de/u-boot-usb 2014-06-10 20:37:00 -04:00
Lukasz Majewski
3d83e6752d dfu: Disable default calculation of CRC32
Patch (SHA1: bd694244db)
dfu: Introduction of the "dfu_hash_algo" env variable for checksum method
setting

already introduced more generic handling of the crc32 calculation.
Up till now the CRC32 of received data was calculated unconditionally.
This patch changes this and from now - by default the crc32 is NOT
calculated anymore.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-06-11 02:31:48 +02:00
Stephen Warren
e0672b3c3a usb: ci_udc: terminate ep0 INs with a zlp when required
Sometimes, a zero-length packet is required at the end of an IN
transaction so that the host knows the device is done sending data.
Enhance ci_udc to send a zlp when necessary. See the comments for
more details.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Stephen Warren
b7c0051687 usb: ci_udc: clean up all allocations in unregister
usb_gadget_unregister_driver() is called to tear down the USB device mode
stack. Fix the driver to stop the USB HW (which causes any attached host
to notice the disappearance of the device), and free all allocations
(which obviously prevents memory leaks).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Stephen Warren
9a7d34be13 usb: ci_udc: fix probe error cleanup
If allocation of the ep0 req fails, clean up all the allocations that
were made in ci_udc_probe().

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Stephen Warren
bdf81611e4 usb: ci_udc: fix freeing of ep0 req
ci_ep_alloc_request() avoids allocating multiple request objects for ep0
by keeping a record of the first req allocated for ep0, and always
returning that instead of allocating a new req. However, if this req is
ever freed, the record of the previous allocation is not cleared, so
ci_ep_alloc_request() will keep returning this stale pointer. Fix
ci_ep_free_request() to clear the record of the previous allocation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Stephen Warren
43a8f25b6c usb: ci_udc: call udc_disconnect() from ci_pullup()
ci_pullup()'s !is_on path contains a cut/paste copy of udc_disconnect().
Remove the duplication by simply calling udc_disconnect() instead.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Tom Rini
76b21026ce Prepare v2014.07-rc3
Signed-off-by: Tom Rini <trini@ti.com>
2014-06-10 11:55:44 -04:00
Nobuhiro Iwamatsu
1dbd7280dc net: sh-eth: Fix typo from rESR_RTLF to EESR_RTLF
'r' of rESR_RTLF is a mistake of E.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-06-10 17:05:03 +09:00
Nobuhiro Iwamatsu
e2752db052 net: sh-eth: Fix coding style
This fixes checkpatch's warning.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-06-10 17:05:03 +09:00
Nobuhiro Iwamatsu
62cbddc493 net: sh-eth: Add support R7S72100 of rmobile
The R7S72100 of ARM SoC that Renesas manufactured has one Ether port.
This has the same IP SH-Ether. This patch adds support of the R7S72100
in SH-Ether.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-06-10 17:05:03 +09:00
Poddar, Sourav
1f436a6ddf sf: probe: Fix quad bit set path
Currently, flash quad bit is set in "spi_flash_validate_params" and later
at the end in the same api, we write 0 to status register for few flashes,
thereby overriding the quad bit set. This fix moves the quad bit setting
outside this api in "spi_flash_probe_slave"

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-06-08 23:12:27 +05:30
Andrew Ruder
c1c0dd2644 spi: soft_spi: Support NULL din/dout buffers
This mirrors the conventions used in other SPI drivers (kirkwood,
davinci, atmel, et al) where the din/dout buffer can be NULL when the
received/transmitted data isn't important.  This reduces the need for
allocating additional buffers when write-only/read-only functionality is
needed.

In the din == NULL case, the received data is simply not stored.  In the
dout == NULL case, zeroes are transmitted.

Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-06-08 23:12:27 +05:30
Siva Durga Prasad Paladugu
0472808608 sf: params: Added support for Spansion S25FL512S_512K
Added support for Spansion chip "S25FL512S_512K".

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-06-08 23:12:27 +05:30
Tom Rini
55e8250bd3 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-06-08 07:58:41 -04:00
Albert ARIBAUD
5ed28948a3 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-06-08 09:14:19 +02:00
Tom Rini
83bad1026b arm:am43xx: Add TPS65218 support to scale voltages up
This family is supported by the TPS65218 PMIC.  Implement a scale_vcores
to set the MPU and CORE voltage correctly to the max frequency that is
supported (and what we will be scaling them to in setup_dplls()).

Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:16 -04:00
Tom Rini
86db550b38 power: Add support for the TPS65218 PMIC
Add a driver for the TPS65218 PMIC which is used by TI AM43xx SoCs and
may be used by TI AM335x SoCs.

Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:16 -04:00
Tom Rini
64ce2fbd6c arm:am33xx: Add a scale_vcores() hook
Similar to OMAP4/5 we need to scale the voltage up prior to changing the
clock frequencies up higher.  Add a similar hook to start with.

Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:16 -04:00
Tom Rini
feca6e676e am43xx: Only read the MPU frequency bits of CTRL_DEV_ATTR
Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:16 -04:00
Hannes Petermaier
1ab6f61a1a board/BuR/tseries: cosmetic changes
Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2014-06-06 17:46:16 -04:00
Hannes Petermaier
3e6a52c6ca board/BuR/common: Add CONFIG_CMD_I2C
in almost all cases we need the i2c commands within the u-boot shell.
So we enable them within the common section.

Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2014-06-06 17:46:15 -04:00
Hannes Petermaier
ef1bd8f416 board/BuR/tseries: only run gpmc_init(...) in NAND-build
if we have no NAND-Chip, we don't need the gpmc-controller and therefore
is no need to init it.

Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2014-06-06 17:46:15 -04:00
Hannes Petermaier
9a1063ebde board/BuR/tseries: Add support for using 8-bit on eMMC
Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2014-06-06 17:46:15 -04:00
Hannes Petermaier
29a0d9c08e board/BuR/common: introduce usage of CONFIG_SYS_GENERIC_BOARD
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2014-06-06 17:46:15 -04:00
Hannes Petermaier
25b0a729aa arch-am33xx: Add defines for timer0-7
For usage of timer6 within B&R we need this defines to enable clock
modules and clk-source.

Also the 'Timer register bits' are expanded.

By the way we add defines for all timers within AM335x SoC.

Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2014-06-06 17:46:15 -04:00
Lokesh Vutla
ccd2f8db81 ARM: AM43xx: Fix UART clocks enabling
After enabling a module, SW has to wait on IDLEST bit
until it is Fully functional. This wait is missing for UART module
and there is a immediate access of UART registers after this. So there
is a chance of hang on this module( This can happen when we are running
from MPU SRAM). So waiting for IDLEST bit.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-06-06 17:46:15 -04:00
Lokesh Vutla
fa03834fdf ARM: AM43xx: Fix mmcboot command in EXTRA_ENV_SETTINGS
loadbootenv expects devtype variable to be set. This is missing in
mmcboot command. With this the following error comes:
U-Boot# run mmcboot
mmc0 is current device
SD/MMC found on device 0
** Bad device usb 0 **
** Bad device usb 0 **
Fixing this by setting devtype as mmc.

Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-06-06 17:46:15 -04:00
Jeroen Hofstee
0970051d13 tam3517: fix NAND detection
commit a0a37183bd "ARM: omap: merge GPMC initialization code for
all platform" needs CONFIG_NOR, CONFIG_NAND or CONFIG_CMD_ONENAND
to be set to access flash. Add CONFIG_NAND for tam3517 derived
boards to prevent the following error: "nand: error: Unable to
find NAND settings in GPMC Configuration - quitting"

cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-06-06 17:46:15 -04:00
WingMan Kwok
1dbb64dcf9 keystone: k2hk: enable support of nand ecclayout command
Enable support of nand ecclayout command.

Acked-By: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-06-06 17:46:14 -04:00
Murali Karicheri
afee59cd49 keystone: init: enable UART1 to be able use it from kernel
Currently PWREMU_MGMT is not configured in the Linux generic UART
driver as this register seems to be specific TI UART IP. So this
needs to be enabled in u-boot to use UART1 from kernel space.

Acked-By: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-06-06 17:46:14 -04:00
Tom Rini
196311dc72 arm:am33xx: Rework s_init and add board_early_init_f
With the changes to the i2c framework (and adopting the omap24xx_i2c
driver to them) we can no longer call i2c functions prior to gd having
been set and cleared.  When SPL booting, this is handled by setting gd
to point to SRAM in s_init.  However in the cases where we are loaded
directly by ROM (memory mapped NOR or QSPI) we need to make use of the
normal hooks to slightly delay these calls.

Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:14 -04:00
Tom Rini
87acf194a2 arm:am33xx: Make dram_init call sdram_init() in some contexts
We have two contexts for booting these platforms.  One is SPL which is
roughly: reset, cpu_init_crit, lowlevel_init, s_init, sdram_init, _main,
board_init_f from SPL, ... then U-Boot loads.  The other is a
memory-mapped XIP case (NOR or QSPI) where we do not run an SPL.  In
this case we go, roughly: reset, cpu_init_crit, lowlevel_init, s_init,
_main, regular board_init_f.

In the first case s_init will set a valid gd and then be able to call
sdram_init which in many cases will need i2c (which needs a valid gd for
gd->cur_i2c_bus).  In this second case we must (and are able to and
should) defer sdram_init() into dram_init() called by board_init_f as gd
will have been set in _main and cleared in board_init_f.

Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:14 -04:00
Sourav Poddar
ce3cc8ecf5 ti: qspi: populate slave device to set flash quad bit.
The patch populates the slave data which will be used by flash driver to
set the  flash quad enable bit.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
2014-06-06 17:46:14 -04:00
Sourav Poddar
7a5f71bc40 am43xx_evm: Add qspiboot target
The ePOS EVM and EVM SK have QSPI as an option to boot.  Add a qspiboot
target that utilizes QSPI for env and so forth as an example of best
practices.  As QSPI is booted from directly we need to chang
CONFIG_SYS_TEXT_BASE.

Note that on ePOS EVM the QSPI and NAND are mutually exclusive choices
we need to handle that elsewhere, once NAND support is also added.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:12 -04:00
pekon gupta
867f03040f am335x: update README for BCH16
updates documentation with explanation on how to select ECC schemes.

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-06-06 17:46:11 -04:00
pekon gupta
46840f66ca mtd: nand: omap: add support for BCH16_ECC - NAND driver updates
This patch add support for BCH16_ECC to omap_gpmc driver.

*need to BCH16 ECC scheme*
With newer SLC Flash technologies and MLC NAND, and large densities, pagesizes
Flash devices have become more suspectible to bit-flips. Thus stronger
ECC schemes are required for protecting the data.
But stronger ECC schemes have come with larger-sized ECC syndromes which require
more space in OOB/Spare. This puts constrains like;
(a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data.
(b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have enough
OOB to satisfy following equation:
OOBsize per page >= 26 * (page-size / 512)

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-06-06 17:46:10 -04:00
pekon gupta
8d13a730de mtd: nand: omap_gpmc: use macro for register definitions
GPMC can support simultaneous processing of 8 512Byte data chunks, in parallel

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-06-06 17:46:08 -04:00
pekon gupta
68128e0a86 omap3: remove remnant macros GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT
OMAP3 used GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT macros
to configure GPMC controller for x7 or x8 bit device connected to its interface.
Now this information is encoded in CONFIG_SYS_NAND_DEVICE_WIDTH macro, so above
macros can be completely removed.

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-06-06 17:46:07 -04:00