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keystone: init: enable UART1 to be able use it from kernel
Currently PWREMU_MGMT is not configured in the Linux generic UART driver as this register seems to be specific TI UART IP. So this needs to be enabled in u-boot to use UART1 from kernel space. Acked-By: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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parent
196311dc72
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afee59cd49
4 changed files with 14 additions and 3 deletions
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@ -8,6 +8,7 @@
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*/
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#include <common.h>
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#include <ns16550.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/hardware.h>
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@ -30,6 +31,14 @@ int arch_cpu_init(void)
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share_all_segments(11); /* PCIE */
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#endif
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/*
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* just initialise the COM2 port so that TI specific
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* UART register PWREMU_MGMT is initialized. Linux UART
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* driver doesn't handle this.
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*/
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NS16550_init((NS16550_t)(CONFIG_SYS_NS16550_COM2),
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CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
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return 0;
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}
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@ -115,8 +115,6 @@
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#define K2HK_LPSC_ARM_SREFLEX 51
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#define K2HK_LPSC_TETRIS 52
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#define K2HK_UART0_BASE 0x02530c00
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/* DDR3A definitions */
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#define K2HK_DDR3A_EMIF_CTRL_BASE 0x21010000
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#define K2HK_DDR3A_EMIF_DATA_BASE 0x80000000
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@ -142,6 +142,9 @@ struct ddr3_emif_config {
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#define KS2_DDR3_PMCTL_OFFSET 0x38
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#define KS2_DDR3_ZQCFG_OFFSET 0xC8
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#define KS2_UART0_BASE 0x02530c00
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#define KS2_UART1_BASE 0x02531000
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#ifdef CONFIG_SOC_K2HK
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#include <asm/arch/hardware-k2hk.h>
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#endif
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@ -71,7 +71,8 @@
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_COM1 K2HK_UART0_BASE
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#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
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#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
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#define CONFIG_SYS_NS16550_CLK clk_get_rate(K2HK_CLK1_6)
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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