Both of these variables are used in a few hard-coded ways to set some
string values or print something to the user. In almost all cases, it's
just as useful to hard-code the value used. The exception here is
printing something closer to correct board name for p1_p2_rdb machines.
This can be done using something from the device tree, but for now
hard-code a non-CONFIG based value instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_BOOTM_NETBSD
CONFIG_BOOTM_RTEMS
CONFIG_DESIGNWARE_WATCHDOG
CONFIG_DISPLAY_CPUINFO
CONFIG_DM_ETH
CONFIG_DM_MMC
CONFIG_DM_REGULATOR
CONFIG_DM_SPI
CONFIG_DM_SPI_FLASH
CONFIG_ISO_PARTITION
CONFIG_OF_SEPARATE
CONFIG_SPI_FLASH_WINBOND
CONFIG_SPL_ETH
CONFIG_TIMER
CONFIG_USB_DWC3
CONFIG_USB_DWC3_GADGET
CONFIG_USB_DWC3_OMAP
CONFIG_USB_DWC3_PHY_OMAP
CONFIG_USB_EHCI_TEGRA
CONFIG_USB_GADGET_DOWNLOAD
CONFIG_USB_GADGET_DUALSPEED
CONFIG_USB_GADGET_MANUFACTURER
CONFIG_USB_GADGET_PRODUCT_NUM
CONFIG_USB_GADGET_VBUS_DRAW
CONFIG_USB_GADGET_VENDOR_NUM
This catches a number of cases where board config files were #undef
various CONFIG options when building SPL, and that doesn't work. Clean
up the related comments as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point DM and OF_CONTROL are used to configure how the USB ports
are enabled, with the exception of in SPL and no SPL_OF_CONTROL. Remove
a bunch of now unused logic to simplify the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable CONFIG_ATMEL_TCB_TIMER and disable CONFIG_ATMEL_PIT_TIMER.
This will allow using the TCB timer instead of the PIT one when running
under OP-TEE.
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
In order to use the TCB early in boot and in the SPL, add
u-boot,dm-pre-reloc property for the TCB and the clock that is used by
the driver (tcb0_clk).
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
When using interrupts property, a global interrupt controller needs to
be added to avoid warnings when compiling device-tree:
arch/arm/dts/at91-sama5d2_xplained.dtb: Warning (interrupts_property):
/ahb/apb/timer@f800c000: Missing interrupt-parent
Add AIC node as the sama5d2 global interrupt controller.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Add a driver for the timer counter block that can be found on sama5d2.
This driver will be used when booting under OP-TEE since the pit timer
which is part of the SYSC is secured. Channel 1 & 2 are configured to
be chained together which allows to have a 64bits counter.
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Align the DT for sama7g5 SoC and sama7g5 EK board with Linux devicetree
in version 5.18.
Some things remain still different, due to some things yet unimplemented in
certain drivers. These include in PMC, pinctrl, and others.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
In Linux this DT file is named at91-sama7g5ek.dts. Rename it accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Set blue led on at boot time in order to highlight that u-boot is loaded.
This is done for all sama5d2 based boards which contain an RGB led.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
sama7g5 and other SoCs (sama5d3, sam9x60) define in the Reset Controller
a RSTC_CR.EXTRST bit that asserts the nrst_out pin which resets external
devices.
This is particular useful for external devices that are configured in
stateful modes which can not be undone without reconfiguring the device
or without resetting the device. An example is an SPI NOR flash that is
configured in octal mode. The do_reset u-boot cmd does not call any
driver's remove method, but merely resets the CPU. As the code was, this
left the flash in octal mode, being impossible for the first stage boot
loaders to recover/identify the flash after a "software reset".
RSTC_CR.EXTRST comes in handy here, as it can be set at "software reset"
to assert low the nrst_out pin during a time defined by the RSTC_MR.ERSTL
field and reset the external devices (including the SPI NOR flash in the
example).
nrst_out is always asserted at "user reset" and it resets the external
devices correctly. Asserting nrst_out at "software reset" should behave
in a similar way. The only difference that I could find between the two
types of resets in regards to the nrst_out signal, is that at "user reset"
timing diagram the "Processor and Peripherals Reset Line" rises after six
MD_SLCK cycles after the nrst_out line rose, while at the "software reset"
timing diagram the "Processor and Peripherals Reset Line" is active for
3 MD_SLCK cycles + 2 MCK cycles. In other words, in the "software reset"
case the nrst_out signal can be active for a longer period of time than the
"Processor and Peripherals Reset Line" active time, depending on the
RSTC_MR.ERSTL value.
Using the default value (zero) for RSTC_MR.ERSTL, worked just fine for the
sama7g5 case. Tested QSPI0 and GMAC0/GMAC1 on sama7g5ek rev 4 after a
software reset with RSTC_CR.EXTRST=1 and RSTC_MR.ERSTL=0.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Convert AT91RESET_EXTRST to Kconfig for easier integration. The symbol is
not configurable from menuconfig, it will be automatically selected by SoCs
that select it explicitly via the "select" directive.
AT91RESET_EXTRST sets the Reset Controller's RSTC_CR.EXTRST bit which
asserts the nrst_out pin that resets external devices.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
sama5d2 contains in its ROM memory BCH code tables for NAND Flash ECC
correction. Enable the use of the GF tables defined in ROM. This should
speed up the boot process, as the tables are no longer constructed at
runtime. Tested with sama5d2-ptc-ek.
Reported-by: David Mosberger-Tang <davidm@egauge.net>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
To quote the author:
This series adds a stage pre-load before launching an image. This stage
is used to read a header before the image and this header contains the
signature of the full image. So u-boot may check the full image before
using any data of the image.
The support of this header is added to binman, and a command verify
checks the signature of a blob and set the u-boot env variable
"loadaddr_verified" to the beginning of the "real" image.
The support of this header is only added to binman, but it may also be
added to mkimage.
Add a subcommand preload to bootm that execute the preload
stage on the image. Right now, it checks the signature
of the image with the pre-load header. If the check
succeed, the u-boot env variable 'loadaddr_verified'
is set to the address of the image (without the header).
It allows to run such commands:
tftp script.img && bootm preload $loadaddr && source $loadaddr_verified
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Enable the support of stage pre-load in bootm.
For the moment, this stage allow to verify the
signature of the full image with a header.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Adds the support of the pre-load header with the image signature
to binman.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Set the variable pre-load-key-path with the shell variable
PRE_LOAD_KEY_PATH that contain the keys path (used for signature).
This variable pre-load-key-path is provided to binman.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit enhances mkimage to update the node
/image/pre-load/sig with the public key.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add the support of image pre load in spl or tpl
when loading an image from ram.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add a stage pre-load to the command bootm.
Right now, this stage may be used to read a
header and check the signature of the full
image.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add a stage pre-load that could
check or modify an image.
For the moment, only a header with a signature is
supported. This header has the following format:
- magic : 4 bytes
- version : 4 bytes
- header size : 4 bytes
- image size : 4 bytes
- offset image signature : 4 bytes
- flags : 4 bytes
- reserved0 : 4 bytes
- reserved1 : 4 bytes
- sha256 of the image signature : 32 bytes
- signature of the first 64 bytes : n bytes
- image signature : n bytes
- padding : up to header size
The stage uses a node /image/pre-load/sig to
get some informations:
- algo-name (mandatory) : name of the algo used to sign
- padding-name : name of padding used to sign
- signature-size : size of the signature (in the header)
- mandatory : set to yes if this sig is mandatory
- public-key (madatory) : value of the public key
Before running the image, the stage pre-load checks
the signature provided in the header.
This is an initial support, later we could add the
support of:
- ciphering
- uncompressing
- ...
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit adds the option SPL_RSA_VERIFY_WITH_PKEY.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit adds the options:
- SPL_ASYMMETRIC_KEY_TYPE
- SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE
- SPL_RSA_PUBLIC_KEY_PARSER
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit adds the options:
- SPL_ASN1_DECODER
- SPL_OID_REGISTRY
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Enhance the help for the config OID_REGISTRY.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Enhance the help for configs ASN1_COMPILER
and ASN1_decoder.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This is mostly cleanups/consolidations. clk_free is made to return void, and the
CCF wrappers present in almost every CCF clock are consolidated. I would
particularly like to have the latter upstream, since there are at least two
series adding support for new CCF drivers (imx8mq and imxrt1170) which can
benefit from these commits.
I had to fix up the last commit since I missed an include for at91.
CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/11521
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Merge tag 'clk-2022.04-next' of https://source.denx.de/u-boot/custodians/u-boot-clk into next
Clock patches for u-boot/next
This is mostly cleanups/consolidations. clk_free is made to return void, and the
CCF wrappers present in almost every CCF clock are consolidated. I would
particularly like to have the latter upstream, since there are at least two
series adding support for new CCF drivers (imx8mq and imxrt1170) which can
benefit from these commits.
I had to fix up the last commit since I missed an include for at91.
CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/11521
This converts most CCF drivers to use generic ops. imx6q is the only
outlier, where we retain the existing functionality by moving the check to
request().
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com
[ fixed missing include for at91 ]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Most CCF drivers follow a common pattern where their clock ops defer the
actual operation to the backing CCF clock. Add some generic implementations
of these functions to reduce duplication of code.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220320203446.740178-1-seanga2@gmail.com
These functions are exactly the same as their "nodev" varients, except they
accept a device and not an ofnode. Rewrite them to just call the other
function.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220227190113.1617498-1-seanga2@gmail.com
Most callers of this function do not check the return value, and it is
unclear what action they should take if it fails. If a function is freeing
multiple clocks, it should not stop just because the first one failed.
Since the callbacks can no longer fail, just convert the return type to
void.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-8-seanga2@gmail.com
When freeing a clock there is not much we can do if there is an error, and
most callers do not actually check the return value. Even e.g. checking to
make sure that clk->id is valid should have been done in request() in the
first place (unless someone is messing with the driver behind our back).
Just return void and don't bother returning an error.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220115222504.617013-2-seanga2@gmail.com
- drop CONFIG_LCD_BMP_RLE8
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Merge tag 'next-20220328' of https://source.denx.de/u-boot/custodians/u-boot-video into next
- drop old CFB code
- drop CONFIG_LCD_BMP_RLE8
This is not defined by any board. Even sandbox doesn't actually use
it since it has migrated to DM_VIDEO.
Drop this option. Remove the dead code also, for completeness, even
though the whole lcd.c file will be dropped soon.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This converts the following to Kconfig:
CONFIG_VIDEO_BCM2835
This is the final ad-hoc CONFIG_VIDEO_... to convert.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Matthias Brugger <mbrugger@suse.com>