Commit graph

2079 commits

Author SHA1 Message Date
Simon Glass
4fb2536e5b x86: Allow listing MTRRs in SPL
Move MTRR-listing code into a common file so it can be used from SPL.
Update the 'mtrr' command to call it.

Use this in SPL just before adjusting the MTRRs, so we can see the state
set up by the board. Only show it when debug is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17 17:08:44 +08:00
Simon Glass
d0dfbf548d x86: zimage: Export the function to obtain the cmdline
Allow reading the command line from a zimage, so that it can be recorded
in the bootflow.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2023-07-17 13:38:35 +08:00
Simon Glass
c886557c18 x86: Add a function to boot a zimage
Add a direct interface to booting a zimage, so that bootstd can call it
without going through the command-line interface.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17 13:38:35 +08:00
Tom Rini
8e21064cb3 Pull request efi-2023-07-rc7
Documentation:
 
 * Fix links to Linux kernel documentation
 
 UEFI:
 
 * Fix memory leak in efidebug dh subcommand
 * Fix underflow when calculating remaining variable store size
 * Increase default variable store size to 64 KiB
 * mkeficapsule: fix efi_firmware_management_capsule_header data type
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Merge tag 'efi-2023-07-rc7' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2023-07-rc7

Documentation:

* Fix links to Linux kernel documentation

UEFI:

* Fix memory leak in efidebug dh subcommand
* Fix underflow when calculating remaining variable store size
* Increase default variable store size to 64 KiB
* mkeficapsule: fix efi_firmware_management_capsule_header data type
2023-07-11 13:27:32 -04:00
Paul Barker
0ef6343439 x86: Update docs link in bootparam header
After Linux commit ff61f0791ce9, x86 documentation was moved to
arch/x86 and the link in bootparam.h was broken.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-07-09 03:53:08 +02:00
Tom Rini
260d4962e0 Merge tag v2023.07-rc4 into next
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-12 14:55:33 -04:00
Simon Glass
e2cb0468bd x86: samus: Don't include audio and SATA in TPL
These are not used in TPL so disable the drivers to save space.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
4cb3b9f01e x86: Simplify cpu_jump_to_64bit_uboot()
This copies the cpu_call64() function to memory address and then jumps to
it. This seems to work correctly even when called from SPL, which is
running from SPI flash.

Drop the copy as it is not needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
50574d42cf spl: Commit MTRRs only in board_init_f_r()
We don't need to commit the SPI-flash MTRR change immediately, since it is
now done in the board_init_f_r(). Also this causes chromebook_link64 to
hang, presumably since we are still running from CAR (Cache-as-RAM) in
SPL. Coral handles this OK, perhaps since it is running from a different
memory area, but it has no effect on Coral anyway.

Drop the extra mtrr_commit() in the SPL implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
80831b2a42 x86: spl: Avoid using init_cache_f_r() from SPL
This function is used by U-Boot proper. It does not set up MTRRs when SPL
is enabled, but we do want this done when it is called from SPL. In fact
it is confusing to use the same function from SPL, since there are quite
a few conditions there.

All init_cache_f_r() really does is commit the MTRRs and set up the cache.
Do this in the SPL's version of this function instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
4e7cbf746f x86: Tidy up address for loading U-Boot from SPL
Use the binman symbols for this, to avoid hard-coding the value. We could
use CONFIG_X86_OFFSET_U_BOOT for the address, but it seems better to
obtain the offset and size through the same mechanism.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
3d0f885a2a x86: spl: Show debugging for BSS
Show the area of memory cleared for BSS, when debugging is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
392720b429 x86: mrc: Correct SPL debug message
SPL printf() does not normally support %#x so just use %x instead. Hex is
expected in U-Boot anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
b194e432c3 x86: Tidy up availability of string functions
For now, just enable the fast-but-large string functions in 32-boot
U-Boot proper only. Avoid using them in SPL. We cannot use then in 64-bit
builds since we only have 32-bit assembly.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2023-05-11 10:25:29 +08:00
Simon Glass
afa3d90c08 x86: Support debug UART in 64-bit mode
The debug UART is already set up in SPL, so there is no need to do
anything here. We must provide the (empty) function though.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
5b465beac6 x86: ivybridge: Ensure LPC is available for GPIO base
The bd82x6x_get_gpio_base() does not work if the LPC is not set up.
Probe it early to avoid this problem.

In chromebook_link64 this problem shows up as an inability to read
the GPIO straps for the memory type.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
55171aedda dm: Emit the arch_cpu_init_dm() even only before relocation
The original function was only called once, before relocation. The new
one is called again after relocation. This was not the intent of the
original call. Fix this by renaming and updating the calling logic.

With this, chromebook_link64 makes it through SPL.

Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
2f5210b703 x86: coreboot: Show unimplemented sysinfo tags
Sometimes coreboot adds new tags that U-Boot does not know about. These
are silently ignored, but it is useful to at least know what we are
missing.

Add a way to collect this information. For Brya it shows:

   Unimpl. 38 41 37 34 42 40

These are:

   LB_TAG_PLATFORM_BLOB_VERSION
   LB_TAG_ACPI_CNVS
   LB_TAG_FMAP
   LB_TAG_VBOOT_WORKBUF
   LB_TAG_TYPE_C_INFO
   LB_TAG_BOARD_CONFIG

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
368fd56466 x86: coreboot: Collect the address of the ACPI tables
At present any ACPI tables created by prior-stage firmware are ignored.
It is useful to be able to view these in U-Boot.

Pick this up from the sysinfo tables and display it with the cbsysinfo
command. This allows the 'acpi list' command to work when booting from
coreboot.

Adjust the global_data condition so that acpi_start is available even if
table-generation is disabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Simon Glass
7a187a89fd x86: Adjust search range for sysinfo table
Avoid searching starting at 0 since this memory may not be available,
e.g. if protection against NULL-pointer access is enabled. The table
cannot be there anyway, since the first 1KB of memory was originally
used for the interrupt table and coreboot avoids it.

Start at 0x400 instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
Troy Kisky
d5d0e4d3e2 x86: cpu: qemu: qemu: remove SPL use with CONFIG_IS_ENABLED
CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT)
would check for CONFIG_SPL_SPL_X86_32BIT_INIT for SPL builds

Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-10 16:45:42 -04:00
Tom Rini
605bc145f9 Merge branch 'master' into next 2023-03-27 15:19:57 -04:00
Simon Glass
843e840dba x86: som-db5800-som-6867: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: e23cae3080 ("x86: som-db5800-som-6867: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Simon Glass
1683336094 x86: dfi-bt700: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: 5d1c8342ae ("x86: dfi-bt700: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Simon Glass
0086d4e5f1 x86: conga-qeval20-qa3-e3845: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: 388f93f963 ("x86: conga-qeval20-qa3-e3845: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-27 09:38:44 +08:00
Simon Glass
d86de9301b x86: bayleybay: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: f38be30868 ("x86: bayleybay: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Simon Glass
f1d87db49b x86: minnowmax: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Add documentation on how to make this change safely.

Fixes: 66e2c665f3 ("x86: minnowmax: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Simon Glass
5a2a1d8093 x86: Exit EFI boot services before starting kernel
When running the EFI app, we need to exit boot services before jumping
to Linux.

At some point it may be possible to jump to Linux and pass on the system
table, and:

  * install the device-tree as configuration table
  * use LoadImage() to load the kernel image (e.g. from memory)
  * start the image with StartImage()

This should allow the Linux efistub to be used. For now, this is not
implemented.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:22 +01:00
Simon Glass
37c9f9cc86 x86: Support booting a 64-bit kernel from 64-bit U-Boot
Add the missing code to handle this. For a 64-bit kernel the entry
address is 0x200 bytes after the normal entry.

Rename the parameter to boot_linux_kernel() accordingly. Update the
comments to indicate that these are addresses, not pointers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:21 +01:00
Simon Glass
1404914ddd x86: Add return-value comment to cpu_jump_to_64bit()
This does not mention what it returns. Add the missing documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:21 +01:00
Simon Glass
90f2b5abb5 x86: Adjust bootparam.h to be more like linux
This likely came from Linux originally, so update it to match v6.2 more.
This has no functional change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:21 +01:00
Simon Glass
edf35a3027 efi: Set RUN_64BIT correctly for the EFI app
The U-Boot EFI app can run as a 64-bit program, so set the Kconfig
correctly in that case. Make sure it doesn't build SPL, since there is
no need to switch from 32 to 64 bit when running.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-25 11:07:21 +01:00
Simon Glass
f62229227c efi: Support copy framebuffer
Add support for this to EFI in case it becomes useful. At present it just
slows things down. You can enable CONFIG_VIDEO_COPY to turn it on.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-13 13:53:01 +01:00
Simon Glass
40b8afe6f6 x86: Add a few more items to bdinfo
Add the timer and vendor/model information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-13 13:53:01 +01:00
Simon Glass
644e61448c efi: Support a 64-bit frame buffer address
The current vesa structure only provides a 32-bit value for the frame
buffer. Many modern machines use an address outside the range.

It is still useful to have this common struct, but add a separate
frame-buffer address as well.

Add a comment for vesa_setup_video_priv() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-03-13 13:53:01 +01:00
Tom Rini
5b197eee33 Prepare v2023.04-rc3
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Merge tag 'v2023.04-rc3' into next

Prepare v2023.04-rc3
2023-02-27 17:28:21 -05:00
Tom Rini
d85bc196cb x86: Pass -z execstack for EFI payload flags
To match how we link EFI executables elsewhere, and to silence a linker
warning, pass -z execstack here as well.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-23 13:29:20 -05:00
Simon Glass
8c103c33fb dm: dts: Convert driver model tags to use new schema
Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:43:26 -07:00
Simon Glass
91b614eef6 Correct SPL uses of USB_KEYBOARD
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_USB_KEYBOARD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
210af54947 Correct SPL uses of LMB
This converts 9 usages of this option to the non-SPL form, since there is
no SPL_LMB defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:39 -05:00
Simon Glass
b8bffe661f Correct SPL uses of BOOTSTAGE_REPORT
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_BOOTSTAGE_REPORT defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Simon Glass
ffff21fb27 x86: Correct Chrromebook typo
Fix a typo in a comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:25 -05:00
Tom Rini
6e7df1d151 global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20 12:27:24 -05:00
Tom Rini
53c47c59e6 convert rockchip to use binman
patman fix for checkpatch
 binman optional entries, improved support for ELF symbols
 trace improvements
 minor fdt refactoring
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Merge tag 'dm-pull-18jan23' of https://source.denx.de/u-boot/custodians/u-boot-dm

convert rockchip to use binman
patman fix for checkpatch
binman optional entries, improved support for ELF symbols
trace improvements
minor fdt refactoring
2023-01-19 09:46:57 -05:00
Simon Glass
33c60a38bb trace: Use notrace for short
The attribute syntax is quite verbose. Use the macro provided for this
purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:49:12 -07:00
Tom Rini
448e2b6327 event: Correct dependencies on the EVENT framework
The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.

With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.

Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf85 ("event: Convert misc_init_f() to use events")
Fixes: c5ef202557 ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-18 12:46:13 -05:00
Tom Rini
e8272cbd59 x86: Fix saying arch_cpu_init_dm in debug/docs
The function arch_cpu_init_dm was renamed to fsp_setup_pinctrl in these
cases, so rename debug / docs to match.

Cc: Simon Glass <sjg@chromium.org>
Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-18 12:46:13 -05:00
Tom Rini
92a5c89998 global: Migrate CONFIG_X86_REFCODE_RUN_ADDR to CFG
Perform a simple rename of CONFIG_X86_REFCODE_RUN_ADDR to CFG_X86_REFCODE_RUN_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
d4143373f1 global: Migrate CONFIG_X86_REFCODE_ADDR to CFG
Perform a simple rename of CONFIG_X86_REFCODE_ADDR to CFG_X86_REFCODE_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
fa2fd534b5 global: Migrate CONFIG_X86_MRC_ADDR to CFG
Perform a simple rename of CONFIG_X86_MRC_ADDR to CFG_X86_MRC_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
32b7e39db4 Convert CONFIG_STANDALONE_LOAD_ADDR to Kconfig
This converts the following to Kconfig:
   CONFIG_STANDALONE_LOAD_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:48 -05:00
Tom Rini
14f43797d0 Prepare v2023.01-rc4
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Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-21 13:09:01 -05:00
Bin Meng
58e2a35f2e x86: cosmetic: Fix a typo in the reserve_arch() comments
It should be fsp_continue().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-14 12:04:51 +08:00
Alistair Delva
767df6a27d x86: Fix i8259 ifdef include guard
When building U-Boot with clang, it notices that the i8259.h include
guard does not work correctly due to a typo. Fix it.

Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-12-14 12:04:51 +08:00
Sean Anderson
0db588caf9 x86: fsp: Only compile fsp_save_s3_stack if (SPL_)DM_RTC is enabled
This function calls rtc_write32, which has a different signature
depending on if (SPL_)DM_RTC is enabled or not. This could result in a
mismatch in SPL if DM_RTC was enabled but SPL_DM_RTC, as the non-DM
declaration would still be used in SPL even though the implementation
would be for non-DM_RTC. We are switching to the correct definitions in
the next commit, so this will become a compilation error. Since
fsp_save_s3_stack is not called from SPL, avoid compiling it if
(SPL_)DM_RTC is disabled.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-12-09 14:10:28 -05:00
Tom Rini
65cc0e2a65 global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:08 -05:00
Simon Glass
984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00
Tom Rini
218e2c45af - fix [hv]sync active vs back porch in dw_mipi_dsi
- simplefb rotation support
  - support splash as raw image from MMC
  - enhancements to Truetype console (multiple fonts and sizes)
  - drop old LCD support
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Merge tag 'video-20221030' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix [hv]sync active vs back porch in dw_mipi_dsi
 - simplefb rotation support
 - support splash as raw image from MMC
 - enhancements to Truetype console (multiple fonts and sizes)
 - drop old LCD support
2022-10-30 17:16:35 -04:00
Simon Glass
b86986c7b3 video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO
Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Heinrich Schuchardt
95e7cafa81 x86: provide typedef jmp_buf
The jmp_buf type is required by the C99 specification.
Defining it for x86 fixes building the longjmp unit test.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-29 07:36:33 -06:00
Heinrich Schuchardt
fc872ee84c x86: fix longjmp() implementation
If longjmp(jmp_buf env, int val) is called with val = 0, the setjmp()
macro must return 1.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-29 07:36:33 -06:00
Michal Suchanek
c726fc01cf dm: treewide: Use uclass_first_device_err when accessing one device
There is a number of users that use uclass_first_device to access the
first and (assumed) only device in uclass.

Some check the return value of uclass_first_device and also that a
device was returned which is exactly what uclass_first_device_err does.

Some are not checking that a device was returned and can potentially
crash if no device exists in the uclass. Finally there is one that
returns NULL on error either way.

Convert all of these to use uclass_first_device_err instead, the return
value will be removed from uclass_first_device in a later patch.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Simon Glass
f3543e6944 treewide: Drop image_header_t typedef
This is not needed and we should avoid typedefs. Use the struct instead
and rename it to indicate that it really is a legacy struct.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Simon Glass
d9d7c20b73 treewide: Drop bootm_headers_t typedef
This is not needed and we should avoid typedefs. Use the struct instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Pali Rohár
049704f808 board_f: Fix types for board_get_usable_ram_top()
Commit 37dc958947 ("global_data.h: Change ram_top type to phys_addr_t")
changed type of ram_top member from ulong to phys_addr_t but did not
changed types in board_get_usable_ram_top() function which returns value
for ram_top.

So change ulong to phys_addr_t type also in board_get_usable_ram_top()
signature and implementations.

Fixes: 37dc958947 ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-23 15:12:42 -04:00
Simon Glass
da62e1e861 video: Rename structs and functions to avoid VBE
Rename these to VESA, itself an abbreviation, to avoid a conflict with
Verified Boot for Embedded.

Rename this to avoid referencing VBE.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
cafe8712e8 video: Renname vbe.h to vesa.h
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename
the existing VBE (Vesa BIOS extensions) to allow this.

Verified Boot for Embedded is documented doc/develop/vbe.rst

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
4e4bf9449b common: Drop display_options.h from common header
Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:46:55 -04:00
Ashok Reddy Soma
65168910ad zynqmp: Run board_get_usable_ram_top() only on main U-Boot
With commit ce39ee28ec ("zynqmp: Do not place u-boot to reserved memory
location"), the function board_get_usable_ram_top() is allocating
MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this
much memory in case of mini U-Boot.

Keep these functions which use lmb under CONFIG_LMB so that they are
compiled and used only when LMB is enabled.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Tom Rini
bb20a105e9 Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOT_RAMDISK_HIGH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:09 -04:00
Tom Rini
b340199f82 spl: Ensure all SPL symbols in Kconfig have some SPL dependency
Tighten up symbol dependencies in a number of places.  Ensure that a SPL
specific option has at least a direct dependency on SPL.  In places
where it's clear that we depend on something more specific, use that
dependency instead.  This means in a very small number of places we can
drop redundant dependencies.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
8bea4bf7d3 tpl: Ensure all TPL symbols in Kconfig have some TPL dependency
Tighten up symbol dependencies in a number of places.  Ensure that a TPL
specific option has at least a direct dependency on TPL.  In places
where it's clear that we depend on something more specific, use that
dependency instead.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:03:31 -04:00
Andrew Scull
99e2fbcb69 linker_lists: Rename sections to remove . prefix
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.

Having a '.' in the section names conflicts with clang's ASAN
instrumentation which tries to add redzones between the linker list
elements, causing expected accesses to fail. However, clang doesn't try
to add redzones to user sections, which are names with all alphanumeric
and underscore characters.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-23 12:58:18 -04:00
Pali Rohár
b62450cf22 serial: Replace CONFIG_DEBUG_UART_BASE by CONFIG_VAL(DEBUG_UART_BASE)
CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or
CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards
to set different values for SPL, TPL and U-Boot Proper.

For ns16550 driver this support is there since commit d293759d55
("serial: ns16550: Add support for SPL_DEBUG_UART_BASE").

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-06 18:01:21 -04:00
Tom Rini
a581eba01d spl: Remove CONFIG_SPL_BOARD_LOAD_IMAGE
This symbol has been unused in code for some time now, remove
the final references.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:00 -04:00
Andrew Scull
2635e3b50f pci: Add mask parameter to dm_pci_map_bar()
Add a mask parameter to control the lookup of the PCI region from which
the mapping can be made.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 18:33:29 -04:00
Andrew Scull
12507a2d22 pci: Map bars with offset and length
Evolve dm_pci_map_bar() to include an offset and length parameter. These
allow a portion of the memory to be mapped and range checks to be
applied.

Passing both the offset and length as zero results in the previous
behaviour and this is used to migrate the previous callers.

Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03 15:50:46 -04:00
Tom Rini
2df59b2bd4 Remove duplication of table_compute_checksum function
It seems like there was some merge error when first cleaning up and
sharing this function.  We have both an inline version of the function
in include/tables_csum.h and a non-inline version in lib/tables_csum.c.
Rework things so that we only have the non-inline version (due to number
of calls, we should not inline this).

Fixes: 1befb38b86 ("x86: Move table csum into separate file")
Fixes: 2b445e4d31 ("x86: Move table csum into separate header")
Cc: Alexander Graf <agraf@csgraf.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-14 15:39:15 -04:00
Tom Rini
01f1ab67f3 Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-04 10:48:44 -04:00
Andy Shevchenko
ce1cbf1ae0 Revert "x86: Move FACP table into separate functions"
Before the culprit patch (see BugLink for the details):

  => acpi list
  Name      Base   Size  Detail
  ----  --------  -----  ------
  RSDP  000e4500     24  v02 U-BOOT
  RSDT  000e4530     38  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  XSDT  000e45e0     4c  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  CSRT  000e5490     58  v00 U-BOOT U-BOOTBL 20220401 INTL 0
  FACP  000e54f0    114  v06 U-BOOT U-BOOTBL 20220401 INTL 0
  DSDT  000e4780    c06  v02 U-BOOT U-BOOTBL 10000 INTL 20200925
  FACS  000e4740     40
  MCFG  000e5610     3c  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  SPCR  000e5650     50  v02 U-BOOT U-BOOTBL 20220401 INTL 0
  APIC  000e56a0     48  v02 U-BOOT U-BOOTBL 20220401 INTL 0

After the culprit patch:

  => acpi list
  Name      Base   Size  Detail
  ----  --------  -----  ------
  RSDP  000e4500     24  v02 U-BOOT
  RSDT  000e4530     34  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  XSDT  000e45e0     44  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  CSRT  000e53a0     58  v00 U-BOOT U-BOOTBL 20220401 INTL 0
  MCFG  000e5520     3c  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  SPCR  000e5560     50  v02 U-BOOT U-BOOTBL 20220401 INTL 0
  APIC  000e55b0     48  v02 U-BOOT U-BOOTBL 20220401 INTL 0

As a result Linux kernel can't find mandatory tables and fails
to boot.

Hence, revert it for good.

This reverts commit 379d3c1fd6.

BugLink: https://lore.kernel.org/all/20220131225930.GJ7515@bill-the-cat/
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-03-31 08:27:52 -04:00
Tom Rini
2abf048ab7 Prepare v2022.04-rc4
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Merge tag 'v2022.04-rc4' into next

Prepare v2022.04-rc4
2022-03-14 17:40:36 -04:00
Simon Glass
978a8a296e x86: Add an enum name for the GNVS firmware type
This enum is currently anonymous. Add a name so it can be used in the
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-03-14 15:20:40 +08:00
Simon Glass
7fe32b3442 event: Convert arch_cpu_init_dm() to use events
Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-10 08:28:36 -05:00
Simon Glass
00959d871c spl: x86: Correct the binman symbols for SPL
These symbols are incorrect, meaning that binman cannot find the
associated entry. This leads to errors like:

binman: Section '/binman/simple-bin': Symbol '_binman_spl_prop_size'
   in entry '/binman/simple-bin/u-boot-spl/u-boot-spl-nodtb':
   Entry 'spl' not found in list (mkimage,u-boot-spl-nodtb,
   u-boot-spl-bss-pad,u-boot-spl-dtb,u-boot-spl,u-boot-img,main-section)

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-22 10:05:44 -07:00
Simon Glass
aafb31fc95 acpi: Move acpi_write_tables() to a generic header
This function is used by both x86 and sandbox. Put it in a common header
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-11 11:29:23 -05:00
Moritz Fischer
058fb9f5ff acpi: Move MCFG implementation to common lib
MCFG tables are used on multiple arches. Move to common ACPI lib.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use sizeof(*mcfg) instead of sizeof(*header)
Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-09 12:30:13 -07:00
Moritz Fischer
ab2ffe7359 arch: x86: lib: acpi_table: Fix MCFG entries
Commit d953137526 ("x86: Move SSDT table to a writer function")
introduced a bug where the actual MCFG entries are no longer generated.

Cc: Simon Glass <sjg@chromium.org>
Fixes: d953137526 ("x86: Move SSDT table to a writer function")
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2022-02-09 12:30:13 -07:00
Rasmus Villemoes
3609e1dc5f dts: automatically build necessary .dtb files
When building for a custom board, it is quite common to maintain a
private branch which include some defconfig and .dts files. But to
hook up those .dts files requires modifying a file "belonging" to
upstream U-Boot, the arch/*/dts/Makefile. Forward-porting that branch
to a newer upstream then often results in a conflict which, while it
is trivial to resolve by hand, makes it harder to have a CI do "try to
build our board against latest upstream".

The .config usually includes information on precisely what .dtb(s) are
needed, so to avoid having to modify the Makefile, simply add the
files in (SPL_)OF_LIST to dtb-y.

A technicality is that (SPL_)OF_LIST is not always defined, so rework
the Kconfig symbols so that (SPL_)OF_LIST is always defined (when
(SPL_)OF_CONTROL), but only prompted for in the cases which used to be
their "depends on".

nios2 and microblaze already have something like this in their
dts/Makefile, and the rationale in commit 41f59f6853 is similar to
the above. So this simply generalizes existing practice. Followup
patches could remove the logic in those two makefiles, just as there's
potential for moving some common boilerplate from all the
arch/*/dts/Makefile files to the new scripts/Makefile.dts.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-09 12:26:12 -07:00
Simon Glass
9d2adca8c3 x86: Move acpi_get_rsdp_addr() ACPI tables to the writer
Move this over to use a writer file, moving the code from the x86
implementation.

There is no need to store a separate variable since we can simply access
the ACPI context.

With this, the original monolithic x86 function for writing ACPI tables
is gone.

Note that QEMU has its own implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Simon Glass
a7e53b93b1 x86: Move device-specific ACPI tables to a writer function
Move this over to use a writer function, moving the code from the x86
implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Simon Glass
78031ad431 x86: acpi: Update acpi_fill_csrt() to use acpi_ctx
Update this function to the newer style, so we can avoid passing and
returning an address through this function.

Also move this function out of the x86 code so it can be used by other
archs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-25 11:44:36 -07:00
Simon Glass
85b8161b14 x86: Move CSRT table to a writer function
Move this table over to use a writer function, moving the code from the
x86 implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Simon Glass
ef55f48788 x86: Move TCPA table to a writer function
Move this table over to use a writer function, for x86 only.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Simon Glass
c797f98bcd x86: Move MADT table to a writer function
Move this table over to use a writer function, for x86 only.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Simon Glass
9aacd83389 x86: Move TPM2 table to a writer function
Move this table over to use a writer function, for x86 only.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Simon Glass
d953137526 x86: Move SSDT table to a writer function
Move this table over to use a writer function, moving the code from the
x86 implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Simon Glass
379d3c1fd6 x86: Move FACP table into separate functions
Each board has its own way of creating this table. Rather than calling the
acpi_create_fadt() function for each one from a common acpi_write_fadt()
function, just move the writer into the board-specific code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-25 11:44:36 -07:00
Simon Glass
138d7ece70 x86: Move FADT table to a writer function
Move this table over to use a writer function, for x86 only.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Simon Glass
32af3261f7 x86: Move GNVS table to a writer function
Move this table over to use a writer function, for x86 only. Handle the
two cases

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Simon Glass
eacb6d0ba2 x86: Move DSDT table to a writer function
Move this table over to use a writer function, moving the code from the
x86 implementation.

Add a pointer to the DSDT in struct acpi_ctx so we can reference it later.

Disable this table for sandbox since we don't actually compile real ASL
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00